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2024-09-19i386: Add ssemov2, sseicvt2 for some load instructions that use memory on ↵Hu, Lin12-6/+11
operand2 The memory attr of some instructions should be 'load', but these are 'none', currently. gcc/ChangeLog: * config/i386/i386.md: Add ssemov2, sseicvt2. * config/i386/sse.md (sse2_cvtsi2sd): Apply sseicvt2. (sse2_cvtsi2sdq<round_name>): Ditto. (vec_set<mode>_0): Apply ssemov2 for 4, 6.
2024-09-19Match: Add interface match_cond_with_binary_phi for true/false argPan Li1-0/+120
When matching the cond with 2 args phi node, we need to figure out which arg of phi node comes from the true edge of cond block, as well as the false edge. This patch would like to add interface to perform the action and return the true and false arg in TREE type. The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * gimple-match-head.cc (match_cond_with_binary_phi): Add new func impl to match binary phi for true and false arg. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-09-19doc: Add more alias option and reorder Intel CPU -march documentationHaochen Jiang1-113/+121
Since r15-3539, there are requests coming in to add other alias option documentation. This patch will add all ot them, including corei7, corei7-avx, core-avx-i, core-avx2, atom, slm, gracemont and emerarldrapids. Also in the patch, I reordered that part of documentation, currently all the CPUs/products are just all over the place. I regrouped them by date-to-now products (since the very first CPU to latest Panther Lake), P-core (since the clients become hybrid cores, starting from Sapphire Rapids) and E-core (since Bonnell to latest Clearwater Forest). And in the patch, I refined the product names in documentation. gcc/ChangeLog: * doc/invoke.texi: Add corei7, corei7-avx, core-avx-i, core-avx2, atom, slm, gracemont and emerarldrapids. Reorder the -march documentation by splitting them into date-to-now products, P-core and E-core. Refine the product names in documentation.
2024-09-19i386: Enhance AVX10.2 convert testsHaochen Jiang15-82/+295
For AVX10.2 convert tests, all of them are missing mask tests previously, this patch will add them in the tests. gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c: Enhance mask test. * gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvthf82ph-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtne2ph2bf8-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtne2ph2bf8s-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtne2ph2hf8-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtne2ph2hf8s-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtneph2bf8-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtneph2bf8s-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtneph2hf8-2.c: Ditto. * gcc.target/i386/avx10_2-512-vcvtneph2hf8s-2.c: Ditto. * gcc.target/i386/avx512f-helper.h: Fix a typo in macro define.
2024-09-19i386: Add missing avx512f-mask-type.h includeHaochen Jiang4-0/+5
Since commit r15-3594, we fixed the bugs in MASK_TYPE for AVX10.2 testcases, but we missed the following four. The tests are not FAIL since the binutils part haven't been merged yet, which leads to UNSUPPORTED test. But the avx512f-mask-type.h needs to be included, otherwise, it will be compile error. gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_2-512-vpdpbssd-2.c: Include avx512f-mask-type.h. * gcc.target/i386/avx10_2-vminmaxsd-2.c: Ditto. * gcc.target/i386/avx10_2-vminmaxsh-2.c: Ditto. * gcc.target/i386/avx10_2-vminmaxss-2.c: Ditto.
2024-09-19testsuite/gcc.dg/pr84877.c: Add machinery to stabilize stack aligmnentHans-Peter Nilsson1-0/+26
This test awkwardly "blinks"; xfails and xpasses apparently randomly for cris-elf using the "gdb simulator". On inspection, I see that the stack address depends on the number of environment variables, deliberately passed to the simulator, each adding the size of a pointer. This test is IMHO important enough not to be just skipped just because it blinks (fixing the actual problem is a different task). I guess a random non-16 stack-alignment could happen for other targets as well, so let's try and add a generic machinery to "stabilize" the test as failing, by allocating a dynamic amount to make sure it's misaligned. The most target-dependent item here is an offset between the incoming stack-pointer value (within main in the added framework) and outgoing (within "xmain" as called from main when setting up the p0 parameter). I know there are other wonderful stack shapes, but such targets would fall under the "complicated situations"-label and are no worse off than before. * gcc.dg/pr84877.c: Try to make the test result consistent by misaligning the stack.
2024-09-19Daily bump.GCC Administrator8-1/+211
2024-09-19RISC-V: Fix signed SAT_ADD test case for int64_tPan Li1-8/+7
The int8_t test for signed SAT_ADD is sat_s_add-1.c, the sat_s_add-4.c should be for int64_t. Thus, update sat_s_add-4.c for int64_t type. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_s_add-4.c: Update test for int64_t instead of int8_t. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-09-18libstdc++: add bracesJason Merrill1-1/+1
GCC compiles with -fno-exceptions, so __throw_exception_again is a no-op, and compilation gives a -Wempty-body warning here, so let's wrap it as is already done in a few other files. libstdc++-v3/ChangeLog: * include/bits/basic_ios.h: Add braces.
2024-09-18[PATCH] configure: fix typosAndrew Kreimer2-2/+2
/ * configure.ac: Fix typos. * configure: Rebuilt.
2024-09-18c++: alias of decltype(lambda) is opaque [PR116714, PR107390]Patrick Palka2-2/+48
Here for using type = decltype([]{}); static_assert(is_same_v<type, type>); we strip the alias ahead of time during template argument coercion which effectively transforms the template-id into is_same_v<decltype([]{}), decltype([]{})> which is wrong because later substitution into the template-id will produce two new lambdas with distinct types and cause is_same_v to return false. This demonstrates that such aliases should be considered opaque (a notion that we recently introduced in r15-2331-g523836716137d0). (An alternative solution might be to consider memoizing lambda-expr substitution rather than always producing a new lambda, but this is much simpler.) PR c++/116714 PR c++/107390 gcc/cp/ChangeLog: * pt.cc (dependent_opaque_alias_p): Also return true for a decltype(lambda) alias. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/lambda-uneval18.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-09-18jit: Ensure ssize_t is definedFrancois-Xavier Coudert1-0/+5
On some targets it seems that ssize_t is not defined by any of the headers transitively included by <stdio.h>. This leads to a bootstrap fail when jit is enabled. gcc/jit/ChangeLog: * libgccjit.h: Include <sys/types.h>
2024-09-18hppa: Add peephole2 optimizations for REG+D loads and storesJohn David Anglin2-0/+103
The PA 1.x architecture only supports long displacements in integer loads and stores. Floating-point loads and stores only support short displacements. As a result, we have to wait until reload is complete before generating insns with long displacements. The PA 2.0 architecture supports long displacements in both integer and floating-point loads and stores. The peephole2 optimizations added in this change are only enabled when 14-bit long displacements aren't supported for floating-point loads and stores. 2024-09-18 John David Anglin <danglin@gcc.gnu.org> gcc/ChangeLog: * config/pa/pa.h (GENERAL_REGNO_P): Define. * config/pa/pa.md: Add SImode and SFmode peephole2 patterns to generate loads and stores with long displacements.
2024-09-18[PATCH v3] RISC-V: Fixed incorrect semantic description in DF to DI pattern ↵Jin Ma2-7/+18
in the Zfa extension on rv32. gcc/ChangeLog: * config/riscv/riscv.md: Change "truncate" to unspec for the Zfa extension on rv32. gcc/testsuite/ChangeLog: * gcc.target/riscv/zfa-fmovh-fmovp-bug.c: New test.
2024-09-18contrib: Set check-params-in-docs.py to skip tables of values of a paramFilip Kastl1-2/+11
Currently check-params-in-docs.py reports extra params being listed in invoke.texi. However, those aren't actual params but items in a table of possible values of the aarch64-autove-preference param. This patch changes check-params-in-docs.py to ignore similar tables. contrib/ChangeLog: * check-params-in-docs.py: Skip tables of values of a param. Remove code that skips items beginning with a number. Signed-off-by: Filip Kastl <fkastl@suse.cz>
2024-09-18Fail vectorization when not using SLP and --param vect-force-slp == 1Richard Biener4-0/+19
The following adds --param vect-force-slp to enable the transition to full SLP. Full SLP is enforced during stmt analysis where it detects failed SLP discovery and at loop analysis time where it avoids analyzing a loop with SLP disabled. Failure to SLP results in vectorization to fail. * params.opt (vect-force-slp): New param, default 0. * doc/invoke.texi (--param vect-force-slp): Document. * tree-vect-loop.cc (vect_analyze_loop_2): When analyzing without SLP but --param vect-force-slp is 1 fail. * tree-vect-stmts.cc (vect_analyze_stmt): Fail vectorization for non-SLP stmts when --param vect-force-slp is 1.
2024-09-18[PATCH 1/2] RISC-V: Fix the outer_code when calculating the cost of SET ↵Xianmiao Qu1-1/+1
expression. I think it is a typo. When calculating the 'SET_SRC (x)' cost, outer_code should be set to SET. gcc/ * config/riscv/riscv.cc (riscv_rtx_costs): Fix the outer_code when calculating the cost of SET expression.
2024-09-18[PATCH] RISC-V: Fix th.extu operands exceeding range on rv32.Xianmiao Qu2-1/+20
The Combine Pass may generate zero_extract instructions that are out of range. Drawing from other architectures like AArch64, we should impose restrictions on the "*th_extu<mode>4" pattern. gcc/ * config/riscv/thead.md (*th_extu<mode>4): Fix th.extu operands exceeding range on rv32. gcc/testsuite/ * gcc.target/riscv/xtheadbb-extu-4.c: New.
2024-09-18[PATCH] RISC-V: Allow zero operand for DI variants of vssubu.vxBohan Lei3-4/+26
The RISC-V vector machine description relies on the helper function `sew64_scalar_helper` to emit actual insns for the DI variants of vssub.vx and vssubu.vx. This works with vssub.vx, but can cause problems with vssubu.vx with the scalar operand being constant zero, because `has_vi_variant_p` returns false, and the operand will be taken without being loaded into a reg. The attached testcases can cause an internal compiler error as a result. Allowing a constant zero operand in those insns seems to be a simple solution that only affects minimum existing code. gcc/ChangeLog: * config/riscv/vector.md: Allow zero operand for DI variants of vssubu.vx gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vssubu-1.c: New test. * gcc.target/riscv/rvv/base/vssubu-2.c: New test.
2024-09-18c++: -Wdangling-reference diagnosticJason Merrill2-13/+12
The -Wdangling-reference diagnostic talks about the full-expression, but prints one call, while the full-expression in a declaration is the entire initialization. It seems more useful to point out the temporary that the compiler thinks we might be getting a dangling reference to. gcc/cp/ChangeLog: * call.cc (do_warn_dangling_reference): Return temporary instead of the call it's passed to. (maybe_warn_dangling_reference): Adjust diagnostic. gcc/testsuite/ChangeLog: * g++.dg/warn/Wdangling-reference1.C: Adjust diagnostic.
2024-09-18c++: -Wdangling-reference and empty class [PR115361]Jason Merrill9-12/+33
We can't have a dangling reference to an empty class unless it's specifically to that class or one of its bases. This was giving a false positive on the _ExtractKey pattern in libstdc++ hashtable.h. This also adjusts the order of arguments to reference_related_p, which is relevant for empty classes (unlike scalars). Several of the classes in the testsuite needed to gain data members to continue to warn. PR c++/115361 gcc/cp/ChangeLog: * call.cc (do_warn_dangling_reference): Check is_empty_class. gcc/testsuite/ChangeLog: * g++.dg/ext/attr-no-dangling6.C * g++.dg/ext/attr-no-dangling7.C * g++.dg/ext/attr-no-dangling8.C * g++.dg/ext/attr-no-dangling9.C * g++.dg/warn/Wdangling-reference1.C * g++.dg/warn/Wdangling-reference2.C * g++.dg/warn/Wdangling-reference3.C: Make classes non-empty. * g++.dg/warn/Wdangling-reference23.C: New test.
2024-09-18match.pd: Check trunc_mod vector obtap before folding.Jennifer Schmitz2-1/+24
In the pattern X - (X / Y) * Y to X % Y, this patch guards the simplification for vector types by a check for: 1) Support of the mod optab for vectors OR 2) Application before vector lowering for non-VL vectors. This is to prevent reverting vectorization of modulo to div/mult/sub if the target does not support vector mod optab. The patch was bootstrapped and tested with no regression on aarch64-linux-gnu and x86_64-linux-gnu. OK for mainline? Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com> gcc/ PR tree-optimization/116569 * match.pd: Guard simplification to trunc_mod with check for mod optab support. gcc/testsuite/ PR tree-optimization/116569 * gcc.dg/torture/pr116569.c: New test.
2024-09-18reload1.cc: rtl-optimization/116326 - Use RELOAD_ELIMINABLE_REGS.Georg-Johann Lay6-1/+233
The new macro is required because reload and LRA are using different representations for a multi-register frame pointer. As ELIMINABLE_REGS is used to initialize static const objects, it can't depend on -mlra. PR rtl-optimization/116326 gcc/ * reload1.cc (reg_eliminate_1): Initialize from RELOAD_ELIMINABLE_REGS if defined. * config/avr/avr.h (RELOAD_ELIMINABLE_REGS): Copy from ELIMINABLE_REGS. (ELIMINABLE_REGS): Don't mention sub-regnos of the frame pointer. * doc/tm.texi.in (Eliminating Frame Pointer and Arg Pointer) <RELOAD_ELIMINABLE_REGS>: Add documentation. * doc/tm.texi: Rebuild. gcc/testsuite/ * gcc.target/avr/torture/lra-pr116324.c: New test. * gcc.target/avr/torture/lra-pr116325.c: New test.
2024-09-18AVR: doc/install.texi - Update avr specific installation notes.Georg-Johann Lay1-11/+7
gcc/ * doc/install.texi (Host/Target specific installation notes for GCC) [avr]: Update web links to AVR-LibC and AVR Options. Remove outdated note about Binutils.
2024-09-18tree-optimization/116585 - SSA corruption with split_constant_offsetRichard Biener2-3/+40
split_constant_offset when looking through SSA defs can end up picking SSA leafs that are subject to abnormal coalescing. This can lead to downstream consumers to insert code based on the result (like from dataref analysis) in places that violate constraints for abnormal coalescing. It's best to not expand defs whose operands are subject to abnormal coalescing - and not either do something when a subexpression has operands like that already. PR tree-optimization/116585 * tree-data-ref.cc (split_constant_offset_1): When either operand is subject to abnormal coalescing do no further processing. * gcc.dg/torture/pr116585.c: New testcase.
2024-09-17phiopt: C++ify cond_if_else_store_replacementAndrew Pinski1-14/+11
This C++ify cond_if_else_store_replacement by using range fors and changing using a std::pair instead of 2 vecs. I had a hard time understanding the code when there was 2 vecs so having a vec of a pair makes it easier to understand the relationship between the 2. gcc/ChangeLog: * tree-ssa-phiopt.cc (cond_if_else_store_replacement): Use range fors and use one vec for then/else stores instead of 2. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-09-17phiopt: Add some details dump to cselimAndrew Pinski1-0/+21
While trying to debug PR 116747, I noticed there was no dump saying what was done. So this adds the debug dump and it helps debug what is going on in PR 116747 too. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-ssa-phiopt.cc (cond_if_else_store_replacement_1): Add debug dump. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-09-18RISC-V: Implement SAT_ADD for signed integer vectorPan Li13-0/+450
This patch would like to implement the ssadd for vector integer. Aka form 1 of ssadd vector. Form 1: #define DEF_VEC_SAT_S_ADD_FMT_1(T, UT, MIN, MAX) \ void __attribute__((noinline)) \ vec_sat_s_add_##T##_fmt_1 (T *out, T *op_1, T *op_2, unsigned limit) \ { \ unsigned i; \ for (i = 0; i < limit; i++) \ { \ T x = op_1[i]; \ T y = op_2[i]; \ T sum = (UT)x + (UT)y; \ out[i] = (x ^ y) < 0 \ ? sum \ : (sum ^ x) >= 0 \ ? sum \ : x < 0 ? MIN : MAX; \ } \ } DEF_VEC_SAT_S_ADD_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX) Before this patch: vec_sat_s_add_int64_t_fmt_1: ... vsetvli t1,zero,e64,m1,ta,mu vadd.vv v3,v1,v2 vxor.vv v0,v1,v3 vmslt.vi v0,v0,0 vxor.vv v2,v1,v2 vmsge.vi v2,v2,0 vmand.mm v0,v0,v2 vsra.vx v1,v1,t3 vxor.vv v3,v1,v4,v0.t ... After this patch: vec_sat_s_add_int64_t_fmt_1: ... vsetvli a6,zero,e64,m1,ta,ma vsadd.vv v1,v1,v2 ... The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/ChangeLog: * config/riscv/autovec.md (ssadd<mode>3): Add new pattern for signed integer vector SAT_ADD. * config/riscv/riscv-protos.h (expand_vec_ssadd): Add new func decl for vector ssadd expanding. * config/riscv/riscv-v.cc (expand_vec_ssadd): Add new func impl to expand vector ssadd pattern. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h: Add test data for vector ssadd. * gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-1.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-2.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-3.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-4.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-1.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-2.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-3.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-4.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-09-17PR 89213: Add better support for shifting vectors with 64-bit elementsMichael Meissner4-2/+222
This patch fixes PR target/89213 to allow better code to be generated to do constant shifts of V2DI/V2DF vectors. Previously GCC would do constant shifts of vectors with 64-bit elements by using: XXSPLTIB 32,4 VEXTSB2D 0,0 VSRAD 2,2,0 I.e., the PowerPC does not have a VSPLTISD instruction to load -15..14 for the 64-bit shift count in one instruction. Instead, it would need to load a byte and then convert it to 64-bit. With this patch, GCC now realizes that the vector shift instructions will look at the bottom 6 bits for the shift count, and it can use either a VSPLTISW or XXSPLTIB instruction to load the shift count. 2024-09-17 Michael Meissner <meissner@linux.ibm.com> gcc/ PR target/89213 * config/rs6000/altivec.md (UNSPEC_VECTOR_SHIFT): New unspec. (VSHIFT_MODE): New mode iterator. (vshift_code): New code iterator. (vshift_attr): New code attribute. (altivec_<mode>_<vshift_attr>_const): New pattern to optimize vector long long/int shifts by a constant. (altivec_<mode>_shift_const): New helper insn to load up a constant used by the shift operation. * config/rs6000/predicates.md (vector_shift_constant): New predicate. gcc/testsuite/ PR target/89213 * gcc.target/powerpc/pr89213.c: New test. * gcc.target/powerpc/vec-rlmi-rlnm.c: Update instruction count.
2024-09-18Daily bump.GCC Administrator4-1/+45
2024-09-17c++: fix constexpr cast from void* diag issue [PR116741]Marek Polacek2-2/+34
The result of build_fold_indirect_ref can be a COMPONENT_REF in which case using DECL_SOURCE_LOCATION will crash. Look at its op1 instead. PR c++/116741 gcc/cp/ChangeLog: * constexpr.cc (cxx_eval_constant_expression) <case CONVERT_EXPR>: If the result of build_fold_indirect_ref is a COMPONENT_REF, use its op1. Check DECL_P before calling inform. gcc/testsuite/ChangeLog: * g++.dg/cpp26/constexpr-voidptr4.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-09-17c++: ICE with -Wtautological-compare in template [PR116534]Marek Polacek2-3/+30
Pre r14-4793, we'd call warn_tautological_cmp -> operand_equal_p with operands wrapped in NON_DEPENDENT_EXPR, which works, since o_e_p bails for codes it doesn't know. But now we pass operands not encapsulated in NON_DEPENDENT_EXPR, and crash, because the template tree for &a[x] has null DECL_FIELD_OFFSET. This patch extends r12-7797 to cover the case when DECL_FIELD_OFFSET is null. PR c++/116534 gcc/ChangeLog: * fold-const.cc (operand_compare::operand_equal_p): If either field's DECL_FIELD_OFFSET is null, compare the fields with ==. gcc/testsuite/ChangeLog: * g++.dg/warn/Wtautological-compare4.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-09-17c++: crash with anon VAR_DECL [PR116676]Marek Polacek2-0/+58
r12-3495 added maybe_warn_about_constant_value which will crash if it gets a nameless VAR_DECL, which is what happens in this PR. We created this VAR_DECL in cp_parser_decomposition_declaration. PR c++/116676 gcc/cp/ChangeLog: * constexpr.cc (maybe_warn_about_constant_value): Check DECL_NAME. gcc/testsuite/ChangeLog: * g++.dg/cpp1z/constexpr-116676.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-09-17SVE intrinsics: Fold svdiv with all-zero operands to zero vectorJennifer Schmitz3-17/+393
This patch folds svdiv where one of the operands is all-zeros to a zero vector, if one of the following conditions holds: - the dividend is all zeros or - the divisor is all zeros, and the predicate is ptrue or the predication is _x or _z. This case was not covered by the recent patch that implemented constant folding, because that covered only cases where both operands are constant vectors. Here, the operation is folded as soon as one of the operands is a constant zero vector. Folding of divison by 0 to return 0 is in accordance with the semantics of sdiv and udiv. The patch was bootstrapped and regtested on aarch64-linux-gnu, no regression. OK for mainline? Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com> gcc/ * config/aarch64/aarch64-sve-builtins-base.cc (svdiv_impl::fold): Add folding of all-zero operands to zero vector. gcc/testsuite/ * gcc.target/aarch64/sve/fold_div_zero.c: New test. * gcc.target/aarch64/sve/const_fold_div_1.c: Adjust expected outcome.
2024-09-17Daily bump.GCC Administrator5-1/+689
2024-09-16aarch64: Improve vector constant generation using SVE INDEX instruction ↵Pengxuan Zheng6-9/+115
[PR113328] SVE's INDEX instruction can be used to populate vectors by values starting from "base" and incremented by "step" for each subsequent value. We can take advantage of it to generate vector constants if TARGET_SVE is available and the base and step values are within [-16, 15]. For example, with the following function: typedef int v4si __attribute__ ((vector_size (16))); v4si f_v4si (void) { return (v4si){ 0, 1, 2, 3 }; } GCC currently generates: f_v4si: adrp x0, .LC4 ldr q0, [x0, #:lo12:.LC4] ret .LC4: .word 0 .word 1 .word 2 .word 3 With this patch, we generate an INDEX instruction instead if TARGET_SVE is available. f_v4si: index z0.s, #0, #1 ret PR target/113328 gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_simd_valid_immediate): Improve handling of some ADVSIMD vectors by using SVE's INDEX if TARGET_SVE is available. (aarch64_output_simd_mov_immediate): Likewise. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/acle/general/dupq_1.c: Update test to use SVE's INDEX instruction. * gcc.target/aarch64/sve/acle/general/dupq_2.c: Likewise. * gcc.target/aarch64/sve/acle/general/dupq_3.c: Likewise. * gcc.target/aarch64/sve/acle/general/dupq_4.c: Likewise. * gcc.target/aarch64/sve/vec_init_3.c: New test. Signed-off-by: Pengxuan Zheng <quic_pzheng@quicinc.com>
2024-09-16modula2: gcc/m2/Make-lang.in fix includes during bootstrap buildGaius Mulley1-15/+14
This patch fixes the include directories used when building objects in gm2-compiler-boot. It adds the missing gm2-gcc directory and uses a new variable GM2_BOOT_INCLUDES for all gm2-compiler-boot rules. gcc/m2/ChangeLog: * Make-lang.in (GM2_BOOT_INCLUDES): New variable. (m2/gm2-compiler-boot/M2GCCDeclare.o): Rewrite to use GM2_BOOT_INCLUDES. (m2/gm2-compiler-boot/M2Error.o): Ditto. (m2/gm2-compiler-boot/%.o): Ditto. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-09-16AVR: Update weblinks to AVR-LibC.Georg-Johann Lay3-7/+8
AVR-LibC has moved to GitHub, adjust web links: https://github.com/avrdudes/avr-libc (project) https://avrdudes.github.io/avr-libc/avr-libc-user-manual (wwwdocs) gcc/ * doc/invoke.texi (AVR Options): Update AVR-LibC weblink from nongnu.org to https://github.com/avrdudes/avr-libc * doc/extend.texi (AVR Named Address Spaces): Same. (AVR Function Attributes): Same. * doc/install.texi (Cross-Compiler-Specific Options, AVR): Same.
2024-09-16aarch64: Emit ADD X, Y, Y instead of SHL X, Y, #1 for SVE instructions.Soumya AR35-96/+151
On Neoverse V2, SVE ADD instructions have a throughput of 4, while shift instructions like SHL have a throughput of 2. We can lean on that to emit code like: add z31.b, z31.b, z31.b instead of: lsl z31.b, z31.b, #1 The implementation of this change for SVE vectors is similar to a prior patch <https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659958.html> that adds the above functionality for Neon vectors. Here, the machine descriptor pattern is split up to separately accommodate left and right shifts, so we can specifically emit an add for all left shifts by 1. The patch was bootstrapped and regtested on aarch64-linux-gnu, no regression. OK for mainline? Signed-off-by: Soumya AR <soumyaa@nvidia.com> gcc/ChangeLog: * config/aarch64/aarch64-sve.md (*post_ra_v<optab><mode>3): Split pattern to accomodate left and right shifts separately. (*post_ra_v_ashl<mode>3): Matches left shifts with additional constraint to check for shifts by 1. (*post_ra_v_<optab><mode>3): Matches right shifts. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/acle/asm/lsl_s16.c: Updated instances of lsl-1 with corresponding add. * gcc.target/aarch64/sve/acle/asm/lsl_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_u8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c: Likewise. * gcc.target/aarch64/sve/adr_1.c: Likewise. * gcc.target/aarch64/sve/adr_6.c: Likewise. * gcc.target/aarch64/sve/cond_mla_7.c: Likewise. * gcc.target/aarch64/sve/cond_mla_8.c: Likewise. * gcc.target/aarch64/sve/shift_2.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/ldnt1sh_gather_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/ldnt1sh_gather_u64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/ldnt1uh_gather_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/ldnt1uh_gather_u64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_s16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_s32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_s8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_u16.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_u32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_u64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rshl_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/stnt1h_scatter_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/stnt1h_scatter_u64.c: Likewise. * gcc.target/aarch64/sve/sve_shl_add.c: New test.
2024-09-16PR modula2/116181 Use GCC tree location_t and separate pointer typesGaius Mulley77-1119/+2264
This patch fixes all remaining -Wodr warnings in the modula-2 front end. It removes the m2 Tree and m2 Location definitions and uses tree and location_t throughout. This allows the bootstrap tool mc to pick up the GCC definitions for these data types (for the C translation of m2 sources). The patch introduces a new module CDataTypes which contain two pointer types: CharStar and ConstCharStar. These map onto their C counterparts when processed by mc however currently gm2 treats them as ADDRESS. It might be sensible to have the gm2 versions of these data types implemented though a builtin module in the future. gcc/m2/ChangeLog: PR modula2/116181 * Make-lang.in (GM2-GCC-DEFS): Add gcctypes.def and CDataTypes.def. (MC-LIB-DEFS): Add CDataTypes.def. * Make-maintainer.in (m2/gm2-pge-boot/$(SRC_PREFIX)M2RTS.o): Change include path to pge-boot. (m2/gm2-pge-boot/$(SRC_PREFIX)SymbolKey.o): Ditto. (m2/gm2-pge-boot/$(SRC_PREFIX)NameKey.o): Ditto. (m2/gm2-pge-boot/$(SRC_PREFIX)Lists.o): Ditto. (m2/gm2-pge-boot/$(SRC_PREFIX)Output.o): Ditto. (m2/gm2-pge-boot/$(SRC_PREFIX)bnflex.o): Ditto. (m2/gm2-pge-boot/$(SRC_PREFIX)RTentity.h): Ditto. (m2/gm2-pge-boot/$(SRC_PREFIX)RTentity.o): Ditto. (m2/gm2-pge-boot/$(SRC_PREFIX)%.o): Ditto. (GM2PATH): Add -I$(srcdir)/m2/gm2-gcc. (m2/mc-boot-gen/$(SRC_PREFIX)%.h): Add -I$(srcdir)/m2/gm2-gcc. (m2/mc-boot-gen/$(SRC_PREFIX)%.cc): Ditto. * gm2-compiler/M2ALU.def (PushIntegerTree): Replace Tree with tree. (PopIntegerTree): Ditto. (PushRealTree): Ditto. (PopRealTree): Ditto. (PushComplexTree): Ditto. (PopComplexTree): Ditto. (PushSetTree): Ditto. (PopSetTree): Ditto. (PopConstructorTree): Ditto. (ConstructSetConstant): Ditto. (BuildRange): Ditto. (CheckOrResetOverflow): Ditto. (PushTypeOfTree): Ditto. * gm2-compiler/M2ALU.mod (Tree): Replace with ... (tree): ... this. (gcctypes): Import location_t and tree. (m2linemap): Remove import of location_t. * gm2-compiler/M2Base.def (m2linemap): Replace with ... (gcctypes): ... this. * gm2-compiler/M2Base.mod (gcctypes): Import of location_t. (m2linemap): Remove import of location_t. * gm2-compiler/M2Bitset.mod (m2tree): Remove import of Tree. * gm2-compiler/M2CaseList.mod (gcctypes): Import tree. (m2tree): Remove import of Tree. (Tree): Replace with ... (tree): ... this. * gm2-compiler/M2Emit.def (gcctypes): Import location_t. * gm2-compiler/M2GCCDeclare.def (gcctypes): Import tree. (PromoteToString): Replace Tree with tree. (PromoteToCString): Ditto. (ConstantKnownAndUsed): Ditto. * gm2-compiler/M2GCCDeclare.mod (gcctypes): Import tree. (m2tree): Remove import of Tree. (Tree): Replace with ... (tree): ... this. * gm2-compiler/M2GenGCC.def (gcctypes): Import tree. (m2tree): Remove import of Tree. (Tree): Replace with ... (tree): ... this. (GetHighFromUnbounded): Replace Tree with tree. (StringToChar): Ditto. (LValueToGenericPtr): Ditto. (ZConstToTypedConst): Ditto. (PrepareCopyString): Ditto. * gm2-compiler/M2GenGCC.mod (gcctypes): Import tree. (m2tree): Remove import of Tree. (Tree): Replace with ... (tree): ... this. * gm2-compiler/M2LangDump.def (gcctypes): Import tree. (m2tree): Remove import of Tree. (Tree): Replace with ... (tree): ... this. * gm2-compiler/M2LangDump.mod (Tree): Replace with ... (tree): ... this. * gm2-compiler/M2LexBuf.def (m2linemap): Replace with ... (gcctypes): ... this. * gm2-compiler/M2LexBuf.mod (m2linemap): Replace with ... (gcctypes): ... this. * gm2-compiler/M2Options.def (m2linemap): Replace with ... (gcctypes): ... this. * gm2-compiler/M2Options.mod (m2linemap): Replace with ... (gcctypes): ... this. * gm2-compiler/M2Range.def (m2linemap): Replace with ... (gcctypes): ... this. (CDataTypes): Import ConstCharStar. (CodeErrorCheck): Replace Tree with tree. (OverlapsRange): Ditto. (IsEqual): Ditto. (IsGreaterOrEqual): Ditto. (IsGreater): Ditto. (BuildIfCallWholeHandlerLoc): Replace Tree with tree. Replace ADDRESS with ConstCharStar. (BuildIfCallRealHandlerLoc): Ditto. (GetMinMax): Ditto. * gm2-compiler/M2Range.mod (m2tree): Remove Tree. (CodeErrorCheck): Replace Tree with tree. (OverlapsRange): Ditto. (IsEqual): Ditto. (IsGreaterOrEqual): Ditto. (IsGreater): Ditto. (GetMinMax): Ditto. (BuildIfCallWholeHandlerLoc): Replace Tree with tree. Replace ADDRESS with ConstCharStar. (BuildIfCallRealHandlerLoc): Ditto. * gm2-compiler/M2System.def (m2linemap): Replace with ... (gcctypes): ... this. * gm2-compiler/M2System.mod (m2linemap): Replace with ... (gcctypes): ... this. (CreateMinMaxFor): Replace Tree with tree. (CreateType): Ditto. (AttemptToCreateType): Ditto. (CreateSetType): Ditto. (AttemptToCreateSetType): Ditto. * gm2-compiler/P2SymBuild.mod (m2linemap): Replace with ... (gcctypes): ... this. * gm2-compiler/SymbolConversion.def (m2tree): Replace with ... (gcctypes): ... this. (Mod2Gcc): Replace Tree with tree. (Gcc2Mod): Ditto. (AddModGcc): Ditto. * gm2-compiler/SymbolConversion.mod (m2tree): Replace with ... (gcctypes): ... this. (Mod2Gcc): Replace Tree with tree. (Gcc2Mod): Ditto. (AddModGcc): Ditto. (Mod2GccWithoutGCCPoison): Ditto. * gm2-compiler/SymbolTable.def (m2tree): Replace with ... (gcctypes): ... this. (PutModuleFinallyFunction): Replace Tree with tree. (GetModuleFinallyFunction): Ditto. * gm2-compiler/SymbolTable.mod (m2tree): Replace with ... (gcctypes): ... this. (PutModuleFinallyFunction): Replace Tree with tree. (GetModuleFinallyFunction): Ditto. * gm2-compiler/m2flex.def (m2linemap): Replace with ... (gcctypes): ... this. * gm2-gcc/init.def (PerCompilationInit): Replace ADDRESS with ConstCharStar. (CDataTypes): Import ConstCharStar. * gm2-gcc/m2block.def (SYSTEM): Remove import. (CDataTypes): Import ConstCharStar. (m2linemap): Remove import. (m2tree): Remove import. (gcctypes): Import tree. (global_constant): Replace Tree with tree. (RememberInitModuleFunction): Ditto. (DumpGlobalConstants): Ditto. (RememberConstant): Ditto. (RememberType): Ditto. (pushDecl): Ditto. (popFunctionScope): Ditto. (pushFunctionScope): Ditto. (finishFunctionCode): Ditto. (finishFunctionDecl): Ditto. (GetErrorNode): Ditto. (includeDecl): Ditto. (GetGlobals): Ditto. (GetGlobalContext): Ditto. (begin_statement_list): Ditto. (push_statement_list): Ditto. (pop_statement_list): Ditto. (getLabel): Replace Tree with tree. Replace ADDRESS with ConstCharStar. * gm2-gcc/m2builtins.def (CDataTypes): Import ConstCharStar. (GetBuiltinConst): Replace Tree with tree. (GetBuiltinConstType): Ditto. (GetBuiltinTypeInfoType): Ditto. (GetBuiltinTypeInfo): Ditto. (BuiltinExists): Ditto. (BuildBuiltinTree): Ditto. (BuiltinMemCopy): Ditto. (BuiltinMemSet): Ditto. (BuiltInAlloca): Ditto. (BuiltInIsfinite): Ditto. * gm2-gcc/m2convert.def (CDataTypes): Import ConstCharStar. (ToWord): Ditto. (ToCardinal): Ditto. (ToInteger): Ditto. (ToBitset): Ditto. (ConvertToPtr): Ditto. (BuildConvert): Ditto. (ConvertConstantAndCheck): Ditto. (ConvertString): Ditto. (GenericToType): Ditto. * gm2-gcc/m2decl.cc (m2decl_BuildParameterDeclaration): Add const attribute. * gm2-gcc/m2decl.def (CDataTypes): Import ConstCharStar. (BuildModuleCtor): Ditto. (DeclareModuleCtor): Ditto. (DeclareM2linkForcedModuleInitOrder): Ditto. (DeclareM2linkStaticInitialization): Ditto. (BuildPtrToTypeString): Ditto. (BuildIntegerConstant): Ditto. (BuildStringConstantType): Ditto. (DeclareKnownVariable): Ditto. (DeclareKnownConstant): Ditto. (BuildParameterDeclaration): Ditto. (BuildEndFunctionDeclaration): Ditto. (RememberVariables): Ditto. (BuildConstLiteralNumber): Ditto. (BuildStringConstant): Ditto. (BuildCStringConstant): Ditto. (GetDeclContext): Ditto. * gm2-gcc/m2decl.h (m2decl_BuildParameterDeclaration): Add const attribute. * gm2-gcc/m2except.def (CDataTypes): Import ConstCharStar. (BuildThrow): Ditto. (BuildTryBegin): Ditto. (BuildTryEnd): Ditto. (BuildCatchBegin): Ditto. (BuildCatchEnd): Ditto. * gm2-gcc/m2expr.def (CDataTypes): Import ConstCharStar. (CSTIntToString): Ditto. (CSTIntToChar): Ditto. (CheckConstStrZtypeRange): Ditto. (CompareTrees): Ditto. (GetPointerOne): Ditto. (GetPointerZero): Ditto. (GetWordOne): Ditto. (GetWordZero): Ditto. (GetIntegerOne): Ditto. (GetIntegerZero): Ditto. (GetCardinalOne): Ditto. (GetCardinalZero): Ditto. (GetSizeOfInBits): Ditto. (GetSizeOf): Ditto. (BuildLogicalRotate): Ditto. (BuildLRRn): Ditto. (BuildLRLn): Ditto. (BuildMask): Ditto. (BuildMult): Ditto. (BuildMultCheck): Ditto. (BuildLRR): Ditto. (BuildLRL): Ditto. (BuildLogicalShift): Ditto. (BuildLSR): Ditto. (BuildLSL): Ditto. (BuildDivM2): Ditto. (BuildDivM2Check): Ditto. (BuildModM2): Ditto. (BuildModM2Check): Ditto. (BuildModFloor): Ditto. (BuildDivCeil): Ditto. (BuildModCeil): Ditto. (BuildDivFloor): Ditto. (BuildModTrunc): Ditto. (BuildDivTrunc): Ditto. (BuildDivTruncCheck): Ditto. (BuildRDiv): Ditto. (BuildSubCheck): Ditto. (BuildAddCheck): Ditto. (BuildSub): Ditto. (BuildAdd): Ditto. (FoldAndStrip): Ditto. (StringLength): Ditto. (TreeOverflow): Ditto. (RemoveOverflow): Ditto. (BuildCoerce): Ditto. (BuildTrunc): Ditto. (BuildNegate): Ditto. (BuildNegateCheck): Ditto. (BuildSetNegate): Ditto. (BuildTBitSize): Ditto. (BuildSize): Ditto. (BuildAddr): Ditto. (BuildOffset1): Ditto. (BuildOffset): Ditto. (BuildLogicalOrAddress): Ditto. (BuildLogicalOr): Ditto. (BuildLogicalAnd): Ditto. (BuildSymmetricDifference): Ditto. (BuildLogicalDifference): Ditto. (BuildLessThan): Ditto. (BuildGreaterThan): Ditto. (BuildLessThanOrEqual): Ditto. (BuildGreaterThanOrEqual): Ditto. (BuildEqualTo): Ditto. (BuildNotEqualTo): Ditto. (BuildIsSuperset): Ditto. (BuildIsNotSuperset): Ditto. (BuildIsSubset): Ditto. (BuildIsNotSubset): Ditto. (BuildIfConstInVar): Ditto. (BuildIfNotConstInVar): Ditto. (BuildIfVarInVar): Ditto. (BuildIfNotVarInVar): Ditto. (BuildForeachWordInSetDoIfExpr): Ditto. (BuildIfInRangeGoto): Ditto. (BuildIfNotInRangeGoto): Ditto. (BuildArray): Ditto. (BuildComponentRef): Ditto. (BuildIndirect): Ditto. (IsTrue): Ditto. (IsFalse): Ditto. (GetCstInteger): Ditto. (AreConstantsEqual): Ditto. (AreRealOrComplexConstantsEqual): Ditto. (DetermineSign): Ditto. (BuildCap): Ditto. (BuildAbs): Ditto. (BuildRe): Ditto. (BuildIm): Ditto. (BuildCmplx): Ditto. (BuildBinaryForeachWordDo): Ditto. (BuildBinarySetDo): Ditto. (ConstantExpressionWarning): Ditto. (BuildAddAddress): Ditto. (calcNbits): Ditto. (OverflowZType): Ditto. (BuildCondIfExpression): Ditto. * gm2-gcc/m2linemap.def (CDataTypes): Import ConstCharStar. * gm2-gcc/m2misc.def (m2tree): Replace with ... (gcctypes): ... this. (DebugTree): Replace Tree with tree. * gm2-gcc/m2pp.def (m2tree): Replace with ... (gcctypes): ... this. (DumpGimpleFd): Replace Tree with tree. * gm2-gcc/m2statement.cc (m2statement_BuildBuiltinCallTree): Remove unused location parameter. * gm2-gcc/m2statement.def (m2linemap): Replace with ... (gcctypes): ... this. (CDataTypes): Import CharStar. (DoJump): Replace Tree with tree. Replace ADDRESS with CharStar. (BuildStartFunctionCode): Replace Tree with tree. (BuildEndFunctionCode): Ditto. (BuildReturnValueCode): Ditto. (BuildAssignmentTree): Ditto. (BuildAssignmentStatement): Ditto. (BuildGoto): Ditto. (DeclareLabel): Ditto. (BuildIfThenDoEnd): Ditto. (BuildIfThenElseEnd): Ditto. (BuildParam): Ditto. (BuildFunctionCallTree): Ditto. (BuildProcedureCallTree): Ditto. (BuildIndirectProcedureCallTree): Ditto. (BuildFunctValue): Ditto. (BuildCall2): Ditto. (BuildCall3): Ditto. (SetLastFunction): Ditto. (GetLastFunction): Ditto. (GetParamTree): Ditto. (BuildTryFinally): Ditto. (BuildCleanUp): Ditto. (BuildAsm): Ditto. (BuildUnaryForeachWordDo): Ditto. (BuildExcludeVarConst): Ditto. (BuildExcludeVarVar): Ditto. (BuildIncludeVarConst): Ditto. (BuildIncludeVarVar): Ditto. (BuildStart): Ditto. (BuildEnd): Ditto. (BuildCallInner): Ditto. (BuildBuiltinCallTree): Remove unused location parameter. * gm2-gcc/m2statement.h (m2statement_BuildBuiltinCallTree): Remove unused location parameter. * gm2-gcc/m2tree.def (gcctypes): Import tree. (IsAConstant): Replace Tree with tree. (IsOrdinal): Ditto. (IsTreeOverflow): Ditto. (skip_const_decl): Ditto. (skip_type_decl): Ditto. (is_type): Ditto. (is_array): Ditto. (is_var): Ditto. (debug_tree): Ditto. (IstreeOverflow): Ditto. * gm2-gcc/m2treelib.def (m2linemap): Replace with ... (gcctypes): ... this. (get_set_address_if_var): Ditto. (get_set_field_rhs): Ditto. (get_set_field_lhs): Ditto. (get_set_address): Ditto. (get_set_value): Ditto. (get_field_no): Ditto. (get_rvalue): Ditto. (DoCall): Ditto. (build_modify_expr): Ditto. (do_jump_if_bit): Ditto. * gm2-gcc/m2type.def (m2linemap): Replace with ... (gcctypes): ... this. (m2tree): Remove. (CDataTypes): Import ConstCharStar and charStar. (ValueInTypeRange): Replace Tree with tree. (ValueOutOfTypeRange): Ditto. (ExceedsTypeRange): Ditto. (WithinTypeRange): Ditto. (BuildSubrangeType): Ditto. (BuildCharConstant): Ditto. (BuildCharConstantChar): Ditto. (BuildArrayConstructorElement): Ditto. (BuildEndArrayConstructor): Ditto. (BuildStartArrayConstructor): Ditto. (BuildRecordConstructorElement): Ditto. (BuildEndRecordConstructor): Ditto. (BuildStartRecordConstructor): Ditto. (BuildEndSetConstructor): Ditto. (BuildSetConstructorElement): Ditto. (BuildStartSetConstructor): Ditto. (BuildSetType): Ditto. (BuildConstPointerType): Ditto. (BuildPointerType): Ditto. (BuildEnumerator): Ditto. (BuildEndEnumeration): Ditto. (BuildStartEnumeration): Ditto. (BuildTypeDeclaration): Ditto. (GetMaxFrom): Ditto. (GetMinFrom): Ditto. (GetDefaultType): Ditto. (BuildEndType): Ditto. (BuildStartType): Ditto. (BuildVariableArrayAndDeclare): Ditto. (BuildProcTypeParameterDeclaration): Ditto. (BuildStartFunctionType): Ditto. (BuildEndFunctionType): Ditto. (GetTreeType): Ditto. (DeclareKnownType): Ditto. (GetM2ZType): Ditto. (GetM2RType): Ditto. (BuildSetTypeFromSubrange): Ditto. (BuildSmallestTypeRange): Ditto. (GetBooleanType): Ditto. (GetBooleanFalse): Ditto. (GetBooleanTrue): Ditto. (GetPackedBooleanType): Ditto. (GetCharType): Ditto. (GetByteType): Ditto. (GetVoidType): Ditto. (GetBitnumType): Ditto. (GetRealType): Ditto. (GetLongRealType): Ditto. (GetShortRealType): Ditto. (GetLongIntType): Ditto. (GetPointerType): Ditto. (GetCardinalType): Ditto. (GetIntegerType): Ditto. (GetWordType): Ditto. (GetM2CardinalType): Ditto. (GetBitsetType): Ditto. (GetM2CType): Ditto. (GetProcType): Ditto. (GetM2ComplexType): Ditto. (GetM2LongComplexType): Ditto. (GetM2ShortComplexType): Ditto. (GetM2Complex128): Ditto. (GetM2Complex96): Ditto. (GetM2Complex64): Ditto. (GetM2Complex32): Ditto. (GetM2Real128): Ditto. (GetM2Real96): Ditto. (GetM2Real64): Ditto. (GetM2Real32): Ditto. (GetM2Bitset32): Ditto. (GetM2Bitset16): Ditto. (GetM2Bitset8): Ditto. (GetM2Word64): Ditto. (GetM2Word32): Ditto. (GetM2Word16): Ditto. (GetM2Cardinal64): Ditto. (GetM2Cardinal32): Ditto. (GetM2Cardinal16): Ditto. (GetM2Cardinal8): Ditto. (GetM2Integer64): Ditto. (GetM2Integer32): Ditto. (GetM2Integer16): Ditto. (GetM2Integer8): Ditto. (GetISOLocType): Ditto. (GetISOByteType): Ditto. (GetISOWordType): Ditto. (GetShortCardType): Ditto. (GetM2ShortCardType): Ditto. (GetShortIntType): Ditto. (GetM2ShortIntType): Ditto. (GetM2LongCardType): Ditto. (GetM2LongIntType): Ditto. (GetM2LongRealType): Ditto. (GetM2RealType): Ditto. (GetM2ShortRealType): Ditto. (GetM2IntegerType): Ditto. (GetM2CharType): Ditto. (GetCSizeTType): Ditto. (GetCSSizeTType): Ditto. (BuildArrayStringConstructor): Ditto. (RealToTree): Ditto. (BuildStartRecord): Ditto. (BuildStartUnion): Ditto. (BuildStartVarient): Ditto. (BuildEndVarient): Ditto. (BuildStartFieldVarient): Ditto. (BuildEndFieldVarient): Ditto. (BuildStartFieldRecord): Ditto. (BuildFieldRecord): Ditto. (ChainOn): Ditto. (ChainOnParamValue): Ditto. (AddStringToTreeList): Ditto. (BuildEndRecord): Ditto. (SetAlignment): Ditto. (SetDeclPacked): Ditto. (SetTypePacked): Ditto. (SetRecordFieldOffset): Ditto. (BuildPackedFieldRecord): Ditto. (BuildNumberOfArrayElements): Ditto. (AddStatement): Ditto. (MarkFunctionReferenced): Ditto. (BuildArrayIndexType): Ditto. (GetArrayNoOfElements): Ditto. (BuildEndArrayType): Ditto. (PutArrayType): Ditto. (BuildStartArrayType): Ditto. (IsAddress): Ditto. (SameRealType): Ditto. * m2.flex (Gm2linemap.h): Include. * mc-boot/GDynamicStrings.cc: Rebuild. * mc-boot/GFIO.cc: Ditto. * mc-boot/GIndexing.cc: Ditto. * mc-boot/GM2Dependent.cc: Ditto. * mc-boot/GSArgs.cc: Ditto. * mc-boot/GStringConvert.cc: Ditto. * mc-boot/Gdecl.cc: Ditto. * mc-boot/Gdecl.h: Ditto. * mc-boot/Gdtoa.h: Ditto. * mc-boot/Gkeyc.cc: Ditto. * mc-boot/Gkeyc.h: Ditto. * mc-boot/Glibc.h: Ditto. * mc-boot/GmcComp.cc: Ditto. * mc-boot/GmcLexBuf.cc: Ditto. * mc-boot/GmcPreprocess.cc: Ditto. * mc-boot/GmcStream.cc: Ditto. * mc-boot/Gmcp1.cc: Ditto. * mc-boot/Gmcp3.cc: Ditto. * mc-boot/Gmcp4.cc: Ditto. * mc-boot/Gmcp5.cc: Ditto. * mc-boot/GnameKey.cc: Ditto. * mc-boot/Gvarargs.cc: Ditto. * mc/decl.def (putDefUnqualified): New procedure function. (isDefUnqualified): Ditto. * mc/decl.mod (defT): Add unqualified field. (charStarN): New variable. (constCharStarN): Ditto. (checkGccType): New procedure. (checkCDataTypes): Ditto. (import): Call checkGccType and checkCDataTypes. (putDefUnqualified): New procedure function. (isDefUnqualified): Ditto. * mc/keyc.def (useGccTree): New procedure. (useGccLocation): Ditto. * mc/keyc.mod (checkGccConfigSystem): Call checkGccConfigSystem. (useGccTree): New procedure. (useGccLocation): Ditto. * mc/mcp1.bnf (decl): Import putDefUnqualified. (Export): Call putDefUnqualified. * gm2-gcc/CDataTypes.def: New file. * gm2-gcc/gcctypes.def: New file. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-09-16AVR: Tweak >= and < compares with consts that are 0 mod 256.Georg-Johann Lay8-41/+572
The >= and < comparisons may skip comparing the lower bytes when the according bytes of the constant are all zeros. For example, uint16 >= 0x1200 is true iff hi8 (uint16) >= hi8 (0x1200) and similar for uint16 < 0x1200. Some comparisons against constants that are an integral power of 256 where already handled in the split preparation. That code has been outsourced to new avr_maybe_cmp_lsr() which may change the operands such that the resulting insns become a comparison of the high bytes against 0 plus a EQ / NE branch. For example, uint32 >= 0x10000 can be rewritten as (uint32 >> 16) != 0. The according asm output is performed by new avr_out_cmp_lsr(). gcc/ * config/avr/avr-protos.h (avr_out_cmp_lsr, avr_maybe_cmp_lsr): New. * config/avr/avr.cc (avr_maybe_cmp_lsr, avr_out_cmp_lsr): New functions. (avr_out_compare) [GEU, LTU]: Start output at byte CTZ(xval) / 8. (avr_adjust_insn_length) [ADJUST_LEN_CMP_LSR]: Handle case. * config/avr/avr.md (adjust_len) <cmp_lsr>: New attr value. (*cmp<mode>_lsr): New define_insn_and_split. (cbranch<mode>4_insn): When splitting, run avr_maybe_cmp_lsr() which may map the operands to *cmp<mode>_lsr. gcc/testsuite/ * gcc.target/avr/torture/cmp-lsr-i32.c: New test. * gcc.target/avr/torture/cmp-lsr-u16.c: New test. * gcc.target/avr/torture/cmp-lsr-u24.c: New test. * gcc.target/avr/torture/cmp-lsr-u32.c: New test. * gcc.target/avr/torture/cmp-lsr-u64.c: New test.
2024-09-16riscv: Fix duplicate assmbler label in @tlsdesc<mode> insnAndreas Schwab2-11/+8
Use %= instead of maintaining a sequence number manually, so that it doesn't result in a duplicate assembler label when the insn is duplicated. PR target/116693 * config/riscv/riscv.cc (riscv_legitimize_tls_address): Don't pass seqno to gen_tlsdesc and remove it. * config/riscv/riscv.md (@tlsdesc<mode>): Remove operand 1. Use %= instead of %1 in template.
2024-09-16libstdc++: Add .editorconfig filesJonathan Wakely2-0/+48
These config files set default formatting behaviour for a large number of common editors, see https://editorconfig.org The root=true setting in libstdc++-v3/.editorconfig prevents looking in parent directories for additional settings. If we add a .editorconfig at the top-level we might want to use root=true there instead, and allow libstdc++-v3/.editorconfig to inherit some some settings from there (and only override things we want to do differently). libstdc++-v3/ChangeLog: * .editorconfig: New file. * include/std/.editorconfig: New file.
2024-09-16vect: Set pattern_stmt_p on the newly created stmt_vec_infoAndrew Pinski1-0/+1
While adding simple_dce_worklist to the vectorizer, there was a regression due to the slp patterns would create a SSA name but never free it even if it never existed in the IR (this case as addsub but complex ones had the same issue). The reason why it was never freed was the stmt_vec_info was not marked as a pattern stmt, unlike the other pattern stmts that use vect_init_pattern_stmt instead of vec_info::add_pattern_stmt (which is used for SLP patterns). Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-vectorizer.cc (vec_info::add_pattern_stmt): Set pattern_stmt_p. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-09-16AVR: Tidy up enum and struct tags.Georg-Johann Lay6-67/+67
Use "rtx_code" for RTX codes, not "enum rtx_code" and not "RTX_CODE". Drop enum and struct tags if possible. gcc/ * config/avr/avr.cc: Use rtx_code for RTX codes. Drop enum and struct tags. * config/avr/avr.md: Same. * config/avr/avr-c.cc: Same. * config/avr/avr-dimode.md: Same. * config/avr/avr-passes.cc: Same. * config/avr/avr-protos.h: Same.
2024-09-16AVR: Partially revert r15-3623.Georg-Johann Lay1-22/+10
ADIW doesn't mix with CPC / SBIC because it's not only about propagating the Z flag but also about carry. gcc/ * config/avr/avr.cc (avr_out_compare): Don't mix ADIW with SBCI / CPC.
2024-09-16libstdc++: Update link to installation docsGerald Pfeifer2-2/+2
libstdc++-v3: * doc/xml/manual/intro.xml: Update link to installation docs. * doc/html/manual/make.html: Regenerate.
2024-09-16Daily bump.GCC Administrator6-1/+95
2024-09-15fortran: Remove useless nested end of scalarization chain handlingMikael Morin1-10/+1
Remove the special handling of end of nested scalarization chains, which advanced the chain to an element of a parent chain when the current one was reaching its end. That handling was superfluous as nested chains correspond to nested scalarizations of subexpressions and the scalarizations don't extend beyond their associated subexpression and don't use any scalarisation element from the parent expression. No change of behaviour, as the GFC_SE struct is supposed to be in its final state anyway when the last element from the chain has been consumed. gcc/fortran/ChangeLog: * trans-expr.cc (gfc_advance_se_ss_chain): Don't use an element from the parent scalarization chain when the current chain reaches its end.
2024-09-15c++: __extension__ and -Wconditionally-supportedJason Merrill2-0/+12
When we're explicitly choosing GCC extensions, we similarly shouldn't complain about optional features that GCC provides. This particular pattern of cast between function and object pointer is used by gthr-posix.h on some targets, including linux-gnu before glibc 2.34. gcc/cp/ChangeLog: * parser.cc (cp_parser_unary_expression) [RID_EXTENSION]: Also suppress -Wconditionally-supported. gcc/testsuite/ChangeLog: * g++.dg/warn/Wconditionally-supported-1.C: Add __extension__ cases.