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2024-08-16AVR: target/85624 - Use HImode for clrmemqi alignment.Georg-Johann Lay1-4/+2
gcc/ PR target/85624 * config/avr/avr.md (*clrmemqi*): Use HImode for alignment operand. (cherry picked from commit 507b4e147588c0fafe952b7226dd764ebeebb103)
2024-08-16Fortran: fix documentation of intrinsic RANDOM_INIT [PR114146]Harald Anlauf1-6/+6
gcc/fortran/ChangeLog: PR fortran/114146 * intrinsic.texi: Fix documentation of arguments of RANDOM_INIT, which is conforming to the F2018 standard.
2024-08-16modula2: change identifier names to avoid build warningsGaius Mulley1-12/+12
This fix avoids the following warnings: In implementation module ‘StdChans’: either the identifier has the same name as a keyword or alternatively a keyword has the wrong case (‘IN’ and ‘in’) 54 | stdnull: ChanId ; the symbol name ‘in’ is legal as an identifier, however as such it might cause confusion and is considered bad programming practice. gcc/m2/ChangeLog: * gm2-libs-iso/StdChans.mod (in): Rename to ... (inch): ... this. (out): Rename to ... (outch): ... this. (err): Rename to ... (errch): ... this. Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
2024-08-16Fix using keywords as identifiers to prevent warnings during buildGaius Mulley1-4/+4
m2pim/DynamicStrings.mod:1358:27: note: In procedure ‘Slice’: the symbol name ‘end’ is legal as an identifier, however as such it might cause confusion and is considered bad programming practice 1358 | start, end, o: INTEGER ; m2pim/DynamicStrings.mod:1358:27: note: either the identifier has the same name as a keyword or alternatively a keyword has the wrong case (‘END’ and ‘end’). gcc/m2/ChangeLog: * gm2-libs/DynamicStrings.mod (Slice): Rename end to stop. Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
2024-08-16testsuite: Verify -fshort-enums and -fno-short-enums in pr33738.CTorbjörn SVENSSON2-1/+29
For some targets, like Cortex-M on arm-none-eabi, the -fshort-enums is enabled by default. For these targets, the test case fails as sizeof(Alpha) < sizeof(int). To make the test case behave identical for targets that does enable -fshort-enums and those that does not, add -fno-short-enums in the test case and verify that the warning is not emitted. Then also create a copy and run the test with -fshort-enums and verify that the warning is emitted. Regtested on x86_64-pc-linux-gnu and arm-none-eabi. gcc/testsuite/ChangeLog: * g++.dg/warn/pr33738.C: Added -fno-short-enums. * g++.dg/warn/pr33738-2.C: Duplicate g++.dg/warn/pr33738.C with -fshort-enums and removed xfail. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
2024-08-16testsuite: Add -fno-short-enums to pr97315-1.CTorbjörn SVENSSON1-1/+1
The test case assumes that sizeof(tree_code) >= 2. On some targets, like Cortex-M on arm-none-eabi, -fshort-enums is enabled by default and in that case, sizeof(tree_code) will be 1 and the following warning is emitted: .../pr97315-1.C:8:13: warning: width of 'tree_base::code' exceeds its type Avoid the warning by forcing -fno-short-enums. gcc/testsuite/ChangeLog: * g++.dg/opt/pr97315-1.C: Add -fno-short-enums. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
2024-08-16testsuite: Add -fwrapv to signbit-5.cTorbjörn SVENSSON1-2/+1
On Cortex-M55 with MVE, the test case fails due to -INT_MAX being undefined. Adding -fwrapv solves the issues. Regtested on x86_64-pc-linux-gnu and arm-none-eabi for Cortex-M0/M3/M4/M7/M33/M55/M85/A7. gcc/testsuite/ChangeLog: * gcc.dg/signbit-5.c: Add -fwrapv and remove x86 exception. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> Co-authored-by: Yvan ROUX <yvan.roux@foss.st.com>
2024-08-16PR modula2/116378 m2 bootstrap fails on x86_64-darwinGaius Mulley9-20/+11
This patch fixes m2 bootstrap failure on x86_64-darwin. libc_open is defined with three parameters the last of which is an int for portability (rather than a vararg). This avoids portability problems by promoting mode_t to an int. In the future it could be tidied up by using the m2 optarg extension. gcc/m2/ChangeLog: PR modula2/116378 * gm2-libs-iso/TermFile.mod (termOpen): Add third argument for open. * gm2-libs/libc.def (open): Remove vararg and use INTEGER for mode parameter three. * mc-boot-ch/Glibc.c (tracedb_open): Replace mode_t with int. (libc_open): Rewrite without varargs. * mc-boot/Glibc.h (libc_open): Replace varargs with int mode. * pge-boot/Glibc.cc (libc_open): Rewrite. * pge-boot/Glibc.h (libc_open): Replace varargs with int mode. gcc/testsuite/ChangeLog: PR modula2/116378 * gm2/extensions/run/pass/testopen.mod: Add third argument for open. * gm2/isolib/run/pass/openlibc.mod: Ditto. * gm2/pim/run/pass/testaddr3.mod: Ditto. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-08-16c++: Pedwarn on [[]]; at class scope [PR110345]Jakub Jelinek2-1/+13
For C++ 26 P2552R3 I went through all the spots (except modules) where attribute-specifier-seq appears in the grammar and tried to construct a testcase in all those spots, for now for [[deprecated]] attribute. The fourth issue is that we just emit (when enabled) -Wextra-semi warning not just for lone semicolon at class scope (correct), but also for [[]]; or [[whatever]]; there too. While just semicolon is valid in C++11 and newer, https://eel.is/c++draft/class.mem#nt:member-declaration allows empty-declaration, unlike namespace scope or block scope something like attribute-declaration or empty statement with attributes applied for it aren't supported. While syntactically it matches attribute-specifier-seq [opt] decl-specifier-seq [opt] member-declarator-list [opt] ; with the latter two omitted, there is https://eel.is/c++draft/class.mem#general-3 which says that is not valid. So, the following patch emits a pedwarn in that case. 2024-08-16 Jakub Jelinek <jakub@redhat.com> PR c++/110345 * parser.cc (cp_parser_member_declaration): Call maybe_warn_extra_semi only if it is empty-declaration, if there are some tokens like attribute, pedwarn that the declaration doesn't declare anything. * g++.dg/cpp0x/gen-attrs-84.C: New test.
2024-08-16i386: Fix some vex insns that prohibit egprLingling Kong1-17/+32
Although these vex insn have evex counterpart, but when it uses the displayed vex prefix should not support APX EGPR. Like TARGET_AVXVNNI, TARGET_IFMA and TARGET_AVXNECONVERT. TARGET_AVXVNNIINT8 and TARGET_AVXVNNITINT16 also are vex insn should not support egpr. gcc/ChangeLog: * config/i386/sse.md (vpmadd52<vpmadd52type><mode>): Prohibit egpr for vex version. (vpdpbusd_<mode>): Ditto. (vpdpbusds_<mode>): Ditto. (vpdpwssd_<mode>): Ditto. (vpdpwssds_<mode>): Ditto. (*vcvtneps2bf16_v4sf): Ditto. (*vcvtneps2bf16_v8sf): Ditto. (vpdp<vpdotprodtype>_<mode>): Ditto. (vbcstnebf162ps_<mode>): Ditto. (vbcstnesh2ps_<mode>): Ditto. (vcvtnee<bf16_ph>2ps_<mode>): Ditto. (vcvtneo<bf16_ph>2ps_<mode>): Ditto. (vpdp<vpdpwprodtype>_<mode>): Ditto.
2024-08-15aarch64: Improve popcount for bytes [PR113042]Andrew Pinski5-13/+98
For popcount for bytes, we don't need the reduction addition after the vector cnt instruction as we are only counting one byte's popcount. This changes the popcount extend to cover all ALLI rather than GPI. Changes since v1: * v2 - Use ALLI iterator and combine all into one pattern. Add new testcases popcnt[6-8].c. * v3 - Simplify TARGET_CSSC path. Use convert_to_mode instead of gen_zero_extend* directly. Some other small cleanups. Bootstrapped and tested on aarch64-linux-gnu with no regressions. PR target/113042 gcc/ChangeLog: * config/aarch64/aarch64.md (popcount<mode>2): Update pattern to support ALLI modes. gcc/testsuite/ChangeLog: * gcc.target/aarch64/popcnt5.c: New test. * gcc.target/aarch64/popcnt6.c: New test. * gcc.target/aarch64/popcnt7.c: New test. * gcc.target/aarch64/popcnt8.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-08-16libstdc++-v3: Handle iconv as optional for newlib builds [PR116362]Hans-Peter Nilsson2-2/+34
Support for iconv in newlib seems to have been always assumed present by libstdc++-v3, but is default off. Though, it hasn't been used before recent libstdc++ changes that actually call iconv functions. This now leads to failures exposed by running the test-suite, unless the newlib being used has been explicitly configured with --enable-newlib-iconv. When failing, there are undefined references to iconv, iconv_open or iconv_close for multiple tests. Thankfully there's a macro in newlib.h that we can check to detect presence of iconv support for the newlib build that's used. libstdc++-v3: PR libstdc++/116362 * configure.ac: Check newlib configuration whether iconv is enabled. * configure: Regenerate.
2024-08-16libstdc++-v3: testsuite: Prune uncapitalized "in function" linker warningHans-Peter Nilsson1-0/+9
Newer newlib trigger warnings about certain functions not implemented (_getentropy) when testing libstdc++-v3. Since 2018 (circa binutils-2.31) the "in function" prefix isn't capitalized for those "not implemented" warnings when generated from the linker (a GNU ld feature used by newlib). Dejagnu up to and including at least dejagnu-1.6.3 (and git @ 42979bd3b9) assumes a capital "In function", leaving that part unpruned, and boom we have thousands of "excess errors" from the libstdc++-v3 testsuite. While gcc/testsuite/lib/prune.exp:prune_gcc_output already deals with this quirk with a vastly more generic pattern, I choose this simpler tweak. libstdc++-v3: * testsuite/lib/prune.exp (libstdc++-dg-prune): Prune uncapitalized "in function" warning from linker.
2024-08-16Daily bump.GCC Administrator5-1/+370
2024-08-15PHIOPT: Fix comment before factor_out_conditional_operationAndrew Pinski1-1/+1
I didn't update the comment before factor_out_conditional_operation correctly. this updates it to be correct and mentions unary operations rather than just conversions. Pushed as obvious. gcc/ChangeLog: * tree-ssa-phiopt.cc (factor_out_conditional_operation): Update comment.
2024-08-15RISC-V: use fclass insns to implement isfinite,isnormal and isinf builtinsVineet Gupta2-0/+101
Currently these builtins use float compare instructions which require FP flags to be saved/restored which could be costly in uarch. RV Base ISA already has FCLASS.{d,s,h} instruction to compare/identify FP values w/o disturbing FP exception flags. Now that upstream supports the corresponding optabs, wire them up in the backend. gcc/ChangeLog: * config/riscv/riscv.md: define_insn for fclass insn. define_expand for isfinite, isnormal, isinf. gcc/testsuite/ChangeLog: * gcc.target/riscv/fclass.c: New tests. Tested-by: Edwin Lu <ewlu@rivosinc.com> # pre-commit-CI #2060 Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
2024-08-15i386: Improve split of *extendv2di2_highpart_stv_noavx512vl.Roger Sayle2-2/+49
This patch follows up on the previous patch to fix PR target/116275 by improving the code STV (ultimately) generates for highpart sign extensions like (x<<8)>>8. The arithmetic right shift is able to take advantage of the available common subexpressions from the preceding left shift. Hence previously with -O2 -m32 -mavx -mno-avx512vl we'd generate: vpsllq $8, %xmm0, %xmm0 vpsrad $8, %xmm0, %xmm1 vpsrlq $8, %xmm0, %xmm0 vpblendw $51, %xmm0, %xmm1, %xmm0 But with improved splitting, we now generate three instructions: vpslld $8, %xmm1, %xmm0 vpsrad $8, %xmm0, %xmm0 vpblendw $51, %xmm1, %xmm0, %xmm0 This patch also implements Uros' suggestion that the pre-reload splitter could introduced a new pseudo to hold the intermediate to potentially help reload with register allocation, which applies when not performing the above optimization, i.e. on TARGET_XOP. 2024-08-15 Roger Sayle <roger@nextmovesoftware.com> Uros Bizjak <ubizjak@gmail.com> gcc/ChangeLog * config/i386/i386.md (*extendv2di2_highpart_stv_noavx512vl): Split to an improved implementation on !TARGET_XOP. On TARGET_XOP, use a new pseudo for the intermediate to simplify register allocation. gcc/testsuite/ChangeLog * g++.target/i386/pr116275-2.C: New test case.
2024-08-15fortran: Fix bootstrap in resolve.cc [PR116387]Jakub Jelinek1-1/+1
The r15-2934 change broke bootstrap: ../../gcc/fortran/resolve.cc: In function ‘bool resolve_operator(gfc_expr*)’: ../../gcc/fortran/resolve.cc:4649:22: error: too many arguments for format [-Werror=format-extra-args] 4649 | gfc_error ("Inconsistent coranks for operator at %%L and %%L", | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The following patch fixes that by using %L rather than %%L, the call has 2 location arguments. 2024-08-15 Jakub Jelinek <jakub@redhat.com> PR bootstrap/116387 * resolve.cc (resolve_operator): Use %L rather than %%L in format string.
2024-08-15c++: fix up cpp23/consteval-if3.C test [PR115583]Patrick Palka1-0/+1
Compiling with optimizations is needed to trigger the bug fixed by r15-2369. PR c++/115583 gcc/testsuite/ChangeLog: * g++.dg/cpp23/consteval-if13.C: Compile with -O.
2024-08-15Tweak base/index disambiguation in decompose_normal_address [PR116236]Richard Sandiford1-12/+28
The PR points out that, for an address like: (plus (zero_extend X) Y) decompose_normal_address doesn't establish a strong preference between treating X as the base or Y as the base. As the comment in the patch says, zero_extend isn't enough on its own to assume an index, at least not on POINTERS_EXTEND_UNSIGNED targets. But in a construct like the one above, X and Y have different modes, and it seems reasonable to assume that the one with the expected address mode is the base. This matters on targets like m68k that support index extension and that require different classes for bases and indices. gcc/ PR middle-end/116236 * rtlanal.cc (decompose_normal_address): Try to distinguish bases and indices based on mode, before resorting to "baseness".
2024-08-15late-combine: Preserve INSN_CODE when modifying notes [PR116343]Richard Sandiford5-2/+37
When it removes a definition, late-combine tries to update all uses in notes. It does this using the same insn_propagation class that it uses for patterns. However, insn_propagation uses validate_change, which in turn resets the INSN_CODE. This is inefficient in the best case, since it forces the pattern to be rerecognised even though changing a note can't affect the INSN_CODE. But in the PR it's a correctness problem: resetting INSN_CODE means we lose the NOOP_INSN_MOVE_CODE, which in turn means that rtl-ssa doesn't queue it for deletion. This patch adds a routine specifically for propagating into notes. A belt-and-braces fix would be to rerecognise noop moves in function_info::change_insns, but I can't think of a good reason why that would be necessary, and it could paper over latent bugs. gcc/ PR testsuite/116343 * recog.h (insn_propagation::apply_to_note): Declare. * recog.cc (insn_propagation::apply_to_note): New function. * late-combine.cc (insn_combination::substitute_note): Use apply_to_note instead of apply_to_rvalue. * rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Improve dumping of costs for noop moves. gcc/testsuite/ PR testsuite/116343 * gcc.dg/torture/pr116343.c: New test.
2024-08-15Fix Coarray in associate not a coarray. [PR110033]Andre Vehreschild6-45/+163
A coarray used in an associate did not become a coarray in the block of the associate. This patch fixes that and the same also in select type statements. PR fortran/110033 gcc/fortran/ChangeLog: * class.cc (gfc_is_class_scalar_expr): Coarray refs that ref only self, aka this image, are regarded as scalar, too. * resolve.cc (resolve_assoc_var): Ignore this image coarray refs and do not build a new class type. * trans-expr.cc (gfc_get_caf_token_offset): Get the caf token from the descriptor for associated variables. (gfc_conv_variable): Same. (gfc_trans_pointer_assignment): Assign token to temporary associate variable, too. (gfc_trans_scalar_assign): Add flag that assign is for associate and use it to assign the token. (is_assoc_assign): Detect that expressions are for associate assign. (gfc_trans_assignment_1): Treat associate assigns like pointer assignments where possible. * trans-stmt.cc (trans_associate_var): Set same_class only for class-targets. * trans.h (gfc_trans_scalar_assign): Add flag to trans_scalar_assign for marking associate assignments. gcc/testsuite/ChangeLog: * gfortran.dg/coarray/associate_1.f90: New test.
2024-08-15Add corank to gfc_expr.Andre Vehreschild23-200/+450
Compute the corank of an expression along side to the regular rank. This safe costly calls to gfc_get_corank (), which consecutively has been removed. In some locations the code needed some adaption to model the difference between expr.corank and gfc_get_corank correctly. The latter always returned the codimension of the expression and not its current corank, i.e. the resolution of all indezes. This commit is preparatory to fixing PR fortran/110033 and may contain parts of that fix already. gcc/fortran/ChangeLog: * arith.cc (reduce_unary): Use expr.corank. (reduce_binary_ac): Same. (reduce_binary_ca): Same. (reduce_binary_aa): Same. * array.cc (gfc_match_array_ref): Same. * check.cc (dim_corank_check): Same. (gfc_check_move_alloc): Same. (gfc_check_image_index): Same. * class.cc (gfc_add_class_array_ref): Same. (finalize_component): Same. * data.cc (gfc_assign_data_value): Same. * decl.cc (match_clist_expr): Same. (add_init_expr_to_sym): Same. * expr.cc (simplify_intrinsic_op): Same. (simplify_parameter_variable): Same. (gfc_check_assign_symbol): Same. (gfc_get_variable_expr): Same. (gfc_add_full_array_ref): Same. (gfc_lval_expr_from_sym): Same. (gfc_get_corank): Removed. * frontend-passes.cc (callback_reduction): Use expr.corank. (create_var): Same. (combine_array_constructor): Same. (optimize_minmaxloc): Same. * gfortran.h (gfc_get_corank): Add corank to gfc_expr. * intrinsic.cc (gfc_get_intrinsic_function_symbol): Use expr.corank. (gfc_convert_type_warn): Same. (gfc_convert_chartype): Same. * iresolve.cc (resolve_bound): Same. (gfc_resolve_cshift): Same. (gfc_resolve_eoshift): Same. (gfc_resolve_logical): Same. (gfc_resolve_matmul): Same. * match.cc (copy_ts_from_selector_to_associate): Same. * matchexp.cc (gfc_get_parentheses): Same. * parse.cc (parse_associate): Same. * primary.cc (gfc_match_rvalue): Same. * resolve.cc (resolve_structure_cons): Same. (resolve_actual_arglist): Same. (resolve_elemental_actual): Same. (resolve_generic_f0): Same. (resolve_unknown_f): Same. (resolve_operator): Same. (gfc_expression_rank): Same and set dimen_type for coarray to default. (gfc_op_rank_conformable): Use expr.corank. (add_caf_get_intrinsic): Same. (resolve_variable): Same. (gfc_fixup_inferred_type_refs): Same. (check_host_association): Same. (resolve_compcall): Same. (resolve_expr_ppc): Same. (resolve_assoc_var): Same. (fixup_array_ref): Same. (resolve_select_type): Same. (add_comp_ref): Same. (get_temp_from_expr): Same. (resolve_fl_var_and_proc): Same. (resolve_symbol): Same. * symbol.cc (gfc_is_associate_pointer): Same. * trans-array.cc (walk_coarray): Same. (gfc_conv_expr_descriptor): Same. (gfc_walk_array_ref): Same. * trans-array.h (gfc_walk_array_ref): Same. * trans-expr.cc (gfc_get_ultimate_alloc_ptr_comps_caf_token): Same. * trans-intrinsic.cc (trans_this_image): Same. (trans_image_index): Same. (conv_intrinsic_cobound): Same. (gfc_walk_intrinsic_function): Same. (conv_intrinsic_move_alloc): Same. * trans-stmt.cc (gfc_trans_lock_unlock): Same. (trans_associate_var): Same and adapt to slightly different behaviour of expr.corank and gfc_get_corank. (gfc_trans_allocate): Same. * trans.cc (gfc_add_finalizer_call): Same.
2024-08-15c++: c->B::m access resolved through current inst [PR116320]Patrick Palka2-3/+25
Here when checking the access of (the injected-class-name) B in c->B::m at parse time, we notice its context B (now the type) is a base of the object type C<T>, so we proceed to use C<T> as the effective qualifying type. But this C<T> is the dependent specialization not the primary template type, so it has empty TYPE_BINFO, which leads to a segfault later from perform_or_defer_access_check. The reason the DERIVED_FROM_P (B, C<T>) test guarding this code path works despite C<T> having empty TYPE_BINFO is because of its currently_open_class logic (added in r9-713-gd9338471b91bbe) which replaces a dependent specialization with the primary template type if we're inside it. So the safest fix seems to be to call currently_open_class in the caller as well. PR c++/116320 gcc/cp/ChangeLog: * semantics.cc (check_accessibility_of_qualified_id): Try currently_open_class when using the object type as the effective qualifying type. gcc/testsuite/ChangeLog: * g++.dg/template/access42.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-08-15c++/coroutines: fix passing *this to promise type, again [PR116327]Patrick Palka3-3/+31
In r15-2210 we got rid of the unnecessary cast to lvalue reference when passing *this to the promise type ctor, and as a drive-by change we also simplified the code to use cp_build_fold_indirect_ref. But it turns out cp_build_fold_indirect_ref does too much here, namely it has a shortcut for returning current_class_ref if the operand is current_class_ptr. The problem with that shortcut is current_class_ref might have gotten clobbered earlier if it appeared in the function body, since rewrite_param_uses walks and rewrites in-place all local variable uses to their corresponding frame copy. So later cp_build_fold_indirect_ref for *this will instead return the clobbered current_class_ref i.e. *frame_ptr->this, which doesn't make sense here since we're in the ramp function and not the actor function where frame_ptr is in scope. This patch fixes this by using the build_fold_indirect_ref instead of cp_build_fold_indirect_ref. PR c++/116327 PR c++/104981 PR c++/115550 gcc/cp/ChangeLog: * coroutines.cc (morph_fn_to_coro): Use build_fold_indirect_ref instead of cp_build_fold_indirect_ref. gcc/testsuite/ChangeLog: * g++.dg/coroutines/pr104981-preview-this.C: Improve coverage by adding a non-static data member use within the coroutine member function. * g++.dg/coroutines/pr116327-preview-this.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-08-15LoongArch: Implement scalar isinf, isnormal, and isfinite via fclassXi Ruoyao3-7/+119
Doing so can avoid loading FP constants from the memory. It also partially fixes PR 66262 as fclass does not signal on sNaN. gcc/ChangeLog: * config/loongarch/loongarch.md (extendsidi2): Add ("=r", "f") alternative and use movfr2gr.s for it. The spec clearly states movfr2gr.s sign extends the value to GRLEN. (fclass_<fmt>): Make the result SImode instead of a floating mode. The fclass results are really not FP values. (FCLASS_MASK): New define_int_iterator. (fclass_optab): New define_int_attr. (<FCLASS_MASK:fclass_optab><ANYF:mode>): New define_expand template. gcc/testsuite/ChangeLog: * gcc.target/loongarch/fclass-compile.c: New test. * gcc.target/loongarch/fclass-run.c: New test.
2024-08-15Movement between GENERAL_REGS and SSE_REGS for TImode doesn't need secondary ↵liuhongt5-8/+45
reload. It results in 2 failures for x86_64-pc-linux-gnu{\ -march=cascadelake}; gcc: gcc.target/i386/extendditi3-1.c scan-assembler cqt?o gcc: gcc.target/i386/pr113560.c scan-assembler-times \tmulq 1 For pr113560.c, now GCC generates mulx instead of mulq with -march=cascadelake, which should be optimal, so adjust testcase for that. For gcc.target/i386/extendditi2-1.c, RA happens to choose another register instead of rax and result in movq %rdi, %rbp movq %rdi, %rax sarq $63, %rbp movq %rbp, %rdx The patch adds a new define_peephole2 for that. gcc/ChangeLog: PR target/116274 * config/i386/i386-expand.cc (ix86_expand_vector_move): Restrict special case TImode to 128-bit vector conversions via V2DI under ix86_pre_reload_split (). * config/i386/i386.cc (inline_secondary_memory_needed): Movement between GENERAL_REGS and SSE_REGS for TImode doesn't need secondary reload. * config/i386/i386.md (*extendsidi2_rex64): Add a define_peephole2 after it. gcc/testsuite/ChangeLog: * gcc.target/i386/pr116274.c: New test. * gcc.target/i386/pr113560.c: Scan either mulq or mulx.
2024-08-15aarch64: Rename svpext to svpext_lane [PR116371]Richard Sandiford19-420/+420
When implementing the SME2 ACLE, I somehow missed off the _lane suffix on svpext. gcc/ PR target/116371 * config/aarch64/aarch64-sve-builtins-sve2.h (svpext): Rename to... (svpext_lane): ...this. * config/aarch64/aarch64-sve-builtins-sve2.cc (svpext_impl): Rename to... (svpext_lane_impl): ...this and update instantiation accordingly. * config/aarch64/aarch64-sve-builtins-sve2.def (svpext): Rename to... (svpext_lane): ...this. gcc/testsuite/ PR target/116371 * gcc.target/aarch64/sme2/acle-asm/pext_c16.c, gcc.target/aarch64/sme2/acle-asm/pext_c16_x2.c, gcc.target/aarch64/sme2/acle-asm/pext_c32.c, gcc.target/aarch64/sme2/acle-asm/pext_c32_x2.c, gcc.target/aarch64/sme2/acle-asm/pext_c64.c, gcc.target/aarch64/sme2/acle-asm/pext_c64_x2.c, gcc.target/aarch64/sme2/acle-asm/pext_c8.c, gcc.target/aarch64/sme2/acle-asm/pext_c8_x2.c: Replace with... * gcc.target/aarch64/sme2/acle-asm/pext_lane_c16.c, gcc.target/aarch64/sme2/acle-asm/pext_lane_c16_x2.c, gcc.target/aarch64/sme2/acle-asm/pext_lane_c32.c, gcc.target/aarch64/sme2/acle-asm/pext_lane_c32_x2.c, gcc.target/aarch64/sme2/acle-asm/pext_lane_c64.c, gcc.target/aarch64/sme2/acle-asm/pext_lane_c64_x2.c, gcc.target/aarch64/sme2/acle-asm/pext_lane_c8.c, gcc.target/aarch64/sme2/acle-asm/pext_lane_c8_x2.c: ...these new tests, testing for svpext_lane instead of svpext.
2024-08-15rs6000: Add TARGET_FLOAT128_HW guard for quad-precision insnsHaochen Gui3-15/+17
gcc/ * config/rs6000/rs6000.md (floatti<mode>2, floatunsti<mode>2, fix_trunc<mode>ti2): Add guard TARGET_FLOAT128_HW. * config/rs6000/vsx.md (xsxexpqp_<IEEE128:mode>_<V2DI_DI:mode>, xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>, xsiexpqpf_<mode>, xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>, xscmpexpqp_<code>_<mode>, *xscmpexpqp, xststdcnegqp_<mode>): Replace guard TARGET_P9_VECTOR with TARGET_FLOAT128_HW. (xststdc_<mode>, *xststdc_<mode>, isinf<mode>2): Add guard TARGET_FLOAT128_HW for the IEEE128 modes. gcc/testsuite/ * gcc.target/powerpc/float128-cmp2-runnable.c: Replace ppc_float128_sw with ppc_float128_hw and remove p9vector_hw.
2024-08-15rs6000: Implement optab_isnormal for SFDF and IEEE128Haochen Gui3-0/+47
gcc/ PR target/97786 * config/rs6000/vsx.md (isnormal<mode>2): New expand. gcc/testsuite/ PR target/97786 * gcc.target/powerpc/pr97786-7.c: New test. * gcc.target/powerpc/pr97786-8.c: New test.
2024-08-15rs6000: Implement optab_isfinite for SFDF and IEEE128Haochen Gui3-0/+44
gcc/ PR target/97786 * config/rs6000/vsx.md (isfinite<mode>2): New expand. gcc/testsuite/ PR target/97786 * gcc.target/powerpc/pr97786-4.c: New test. * gcc.target/powerpc/pr97786-5.c: New test.
2024-08-15rs6000: Implement optab_isinf for SFDF and IEEE128Haochen Gui6-45/+97
gcc/ PR target/97786 * config/rs6000/rs6000.md (constant VSX_TEST_DATA_CLASS_NAN, VSX_TEST_DATA_CLASS_POS_INF, VSX_TEST_DATA_CLASS_NEG_INF, VSX_TEST_DATA_CLASS_POS_ZERO, VSX_TEST_DATA_CLASS_NEG_ZERO, VSX_TEST_DATA_CLASS_POS_DENORMAL, VSX_TEST_DATA_CLASS_NEG_DENORMAL): Define. (mode_attr sdq, vsx_altivec, wa_v, x): Define. (mode_iterator IEEE_FP): Define. * config/rs6000/vsx.md (isinf<mode>2): New expand. (expand xststdcqp_<mode>, xststdc<sd>p): Combine into... (expand xststdc_<mode>): ...this. (insn *xststdcqp_<mode>, *xststdc<sd>p): Combine into... (insn *xststdc_<mode>): ...this. * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Rename CODE_FOR_xststdcqp_kf as CODE_FOR_xststdc_kf, CODE_FOR_xststdcqp_tf as CODE_FOR_xststdc_tf. * config/rs6000/rs6000-builtins.def: Rename xststdcdp as xststdc_df, xststdcsp as xststdc_sf, xststdcqp_kf as xststdc_kf. gcc/testsuite/ PR target/97786 * gcc.target/powerpc/pr97786-1.c: New test. * gcc.target/powerpc/pr97786-2.c: New test.
2024-08-15Value Range: Add range op for builtin isnormalHaochen Gui3-0/+126
The former patch adds optab for builtin isnormal. Thus builtin isnormal might not be folded at front end. So the range op for isnormal is needed for value range analysis. This patch adds range op for builtin isnormal. gcc/ * gimple-range-op.cc (class cfn_isfinite): New. (op_cfn_finite): New variables. (gimple_range_op_handler::maybe_builtin_call): Handle CFN_BUILT_IN_ISFINITE. * value-range.h (class frange): Declear known_isnormal and known_isdenormal_or_zero. (frange::known_isnormal): Define. (frange::known_isdenormal_or_zero): Define. gcc/testsuite/ * gcc.dg/tree-ssa/range-isnormal.c: New test.
2024-08-15Value Range: Add range op for builtin isfiniteHaochen Gui2-0/+92
The former patch adds optab for builtin isfinite. Thus builtin isfinite might not be folded at front end. So the range op for isfinite is needed for value range analysis. This patch adds range op for builtin isfinite. gcc/ * gimple-range-op.cc (class cfn_isfinite): New. (op_cfn_finite): New variables. (gimple_range_op_handler::maybe_builtin_call): Handle CFN_BUILT_IN_ISFINITE. gcc/testsuite/ * gcc.dg/tree-ssa/range-isfinite.c: New test.
2024-08-15Value Range: Add range op for builtin isinfHaochen Gui4-2/+108
The builtin isinf is not folded at front end if the corresponding optab exists. So the range op for isinf is needed for value range analysis. This patch adds range op for builtin isinf. gcc/ PR target/114678 * gimple-range-op.cc (class cfn_isinf): New. (op_cfn_isinf): New variables. (gimple_range_op_handler::maybe_builtin_call): Handle CASE_FLT_FN (BUILT_IN_ISINF). gcc/testsuite/ PR target/114678 * gcc.dg/tree-ssa/range-isinf.c: New test. * gcc.dg/tree-ssa/range-sincos.c: Remove xfail for s390. * gcc.dg/tree-ssa/vrp-float-abs-1.c: Likewise.
2024-08-15Daily bump.GCC Administrator5-1/+191
2024-08-14c++: ICE with NSDMIs and fn arguments [PR116015]Marek Polacek3-3/+47
The problem in this PR is that we ended up with {.rows=(&<PLACEHOLDER_EXPR struct Widget>)->n, .outer_stride=(&<PLACEHOLDER_EXPR struct MatrixLayout>)->rows} that is, two PLACEHOLDER_EXPRs for different types on the same level in one { }. That should not happen; we may, for instance, neglect to replace a PLACEHOLDER_EXPR due to CONSTRUCTOR_PLACEHOLDER_BOUNDARY on the constructor. The same problem happened in PR100252, which I fixed by introducing replace_placeholders_for_class_temp_r. That didn't work here, though, because r_p_for_c_t_r only works for non-eliding TARGET_EXPRs: replacing a PLACEHOLDER_EXPR with a temporary that is going to be elided will result in a crash in gimplify_var_or_parm_decl when it encounters such a loose decl. But leaving the PLACEHOLDER_EXPRs in is also bad because then we end up with this PR. TARGET_EXPRs for function arguments are elided in gimplify_arg. The argument will get a real temporary only in get_formal_tmp_var. One idea was to use the temporary that is going to be elided anyway, and then replace_decl it with the real object once we get it. But that didn't work out: one problem is that we elide the TARGET_EXPR for an argument before we create the real temporary for the argument, and when we get it, the context that this was a TARGET_EXPR for an argument has been lost. We're also in the middle end territory now, even though this is a C++-specific problem. A solution is to simply stop eliding TARGET_EXPRs whose initializer is a CONSTRUCTOR. Such copies can't be (at the moment) elided anyway. But not eliding all TARGET_EXPRs would be a pessimization. PR c++/116015 gcc/cp/ChangeLog: * call.cc (convert_for_arg_passing): Don't set_target_expr_eliding when the TARGET_EXPR initializer is a CONSTRUCTOR. gcc/ChangeLog: * gimplify.cc (gimplify_arg): Do not strip a TARGET_EXPR whose initializer is a CONSTRUCTOR. gcc/testsuite/ChangeLog: * g++.dg/cpp1y/nsdmi-aggr23.C: New test.
2024-08-14s390: Remove vector intrinsicsStefan Schulze Frielinghaus1-14/+0
The following intrinsics are not implemented. Thus, remove them. gcc/ChangeLog: * config/s390/vecintrin.h (vec_vstbrh): Remove. (vec_vstbrf): Remove. (vec_vstbrg): Remove. (vec_vstbrq): Remove. (vec_vstbrf_flt): Remove. (vec_vstbrg_dbl): Remove. (vec_vsterb): Remove. (vec_vsterh): Remove. (vec_vsterf): Remove. (vec_vsterg): Remove. (vec_vsterf_flt): Remove. (vec_vsterg_dbl): Remove.
2024-08-14s390: Fix high-level builtins vec_gfmsum{,_accum}_128Stefan Schulze Frielinghaus3-2/+6
Starting with r14-9449-g9f2b16ce1efef0 builtins were streamlined with those in LLVM. In particular s390_vgfm{,a}g have been changed from UV16QI to UINT128 in order to match those in LLVM. However, these low-level builtins are directly used by the high-level builtins vec_gfmsum{,_accum}_128 which expect UV16QI instead. Therefore, introduce new low-level builtins s390_vgfm{,a}g_128 and make use of them, respectively. gcc/ChangeLog: * config/s390/s390-builtin-types.def (BT_FN_UV16QI_UV2DI_UV2DI): New. (BT_FN_UV16QI_UV2DI_UV2DI_UV16QI): New. * config/s390/s390-builtins.def (s390_vgfmg_128): New. (s390_vgfmag_128): New. * config/s390/vecintrin.h (vec_gfmsum_128): Use s390_vgfmg_128. (vec_gfmsum_accum_128): Use s390_vgfmag_128.
2024-08-14Fortran: fix minor frontend GMP leaksHarald Anlauf2-3/+9
gcc/fortran/ChangeLog: * simplify.cc (gfc_simplify_sizeof): Clear used gmp variable. * target-memory.cc (gfc_target_expr_size): Likewise.
2024-08-14i386: Optimization for APX NDD is always zero-uppered for shiftLingling Kong2-0/+128
gcc/ChangeLog: PR target/113729 * config/i386/i386.md (*ashlqi3_1_zext<mode><nf_name>): New define_insn. (*ashlhi3_1_zext<mode><nf_name>): Ditto. (*<insn>qi3_1_zext<mode><nf_name>): Ditto. (*<insn>hi3_1_zext<mode><nf_name>): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr113729.c: Add testcase for shift and rotate.
2024-08-14i386: Optimization for APX NDD is always zero-uppered for logicLingling Kong2-0/+134
gcc/ChangeLog: PR target/113729 * config/i386/i386.md (*andqi_1_zext<mode><nf_name>): New define_insn. (*andhi_1_zext<mode><nf_name>): Ditto. (*<code>qi_1_zext<mode><nf_name>): Ditto. (*<code>hi_1_zext<mode><nf_name>): Ditto. (*negqi_1_zext<mode><nf_name>): Ditto. (*neghi_1_zext<mode><nf_name>): Ditto. (*one_cmplqi2_1_zext<mode>): Ditto. (*one_cmplhi2_1_zext<mode>): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr113729.c: Add more tests.
2024-08-14i386: Optimization for APX NDD is always zero-uppered for sub/adc/sbbLingling Kong3-8/+305
gcc/ChangeLog: PR target/113729 * config/i386/i386.md (*subqi_1_zext<mode><nf_name>): New define_insn. (*subhi_1_zext<mode><nf_name>): Ditto. (*addqi3_carry_zext<mode>): Ditto. (*addhi3_carry_zext<mode>): Ditto. (*addqi3_carry_zext<mode>_0): Ditto. (*addhi3_carry_zext<mode>_0): Ditto. (*addqi3_carry_zext<mode>_0r): Ditto. (*addhi3_carry_zext<mode>_0r): Ditto. (*subqi3_carry_zext<mode>): Ditto. (*subhi3_carry_zext<mode>): Ditto. (*subqi3_carry_zext<mode>_0): Ditto. (*subhi3_carry_zext<mode>_0): Ditto. (*subqi3_carry_zext<mode>_0r): Ditto. (*subhi3_carry_zext<mode>_0r): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr113729.c: Add more test. * gcc.target/i386/pr113729-adc-sbb.c: New test.
2024-08-14i386: Optimization for APX NDD is always zero-uppered for ADDLingling Kong2-0/+107
gcc/ChangeLog: PR target/113729 * config/i386/i386.md (*addqi_1_zext<mode><nf_name>): New define. (*addhi_1_zext<mode><nf_name>): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr113729.c: New test.
2024-08-14Restrict pr116202-run-1.c test to riscv_v targetMark Wielaard1-1/+1
The testcase uses -march=rv64gcv and dg-do run, so should be restricted to a riscv_v target. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr116202-run-1.c (dg-do run): Add target riscv_v.
2024-08-14Prevent future proc_ptr parsing issues in associate [PR102973]Andre Vehreschild1-0/+1
A global variable is set when proc_ptr parsing in an associate is expected. In the case of an error, that flag was not reset, which is fixed now. gcc/fortran/ChangeLog: PR fortran/102973 * match.cc (gfc_match_associate): Reset proc_ptr parsing flag on error.
2024-08-14Fix ICE in build_function_decl [PR116292]Andre Vehreschild2-3/+51
Fix ICE by getting the vtype only when a derived or class type is prevent. Also take care about the _len component for unlimited polymorphics. gcc/fortran/ChangeLog: PR fortran/116292 * trans-intrinsic.cc (conv_intrinsic_move_alloc): Get the vtab only for derived types and classes and adjust _len for class types. gcc/testsuite/ChangeLog: * gfortran.dg/move_alloc_19.f90: New test.
2024-08-14genoutput: Accelerate the place_operands function.Xianmiao Qu1-23/+88
With the increase in the number of modes and patterns for some backend architectures, the place_operands function becomes a bottleneck int the speed of genoutput, and may even become a bottleneck int the overall speed of building the GCC project. This patch aims to accelerate the place_operands function, the optimizations it includes are: 1. Use a hash table to store operand information, improving the lookup time for the first operand. 2. Move mode comparison to the beginning to avoid the scenarios of most strcmp. I tested the speed improvements for the following backends, Improvement Ratio x86_64 197.9% aarch64 954.5% riscv 2578.6% If the build machine is slow, then this improvement can save a lot of time. I tested the genoutput output for x86_64/aarch64/riscv backends, and there was no difference compared to before the optimization, so this shouldn't introduce any functional issues. gcc/ * genoutput.cc (struct operand_data): Add member 'eq_next' to point to the next member with the same hash value in the hash table. (compare_operands): Move the comparison of the mode to the very beginning to accelerate the comparison of the two operands. (struct operand_data_hasher): New, a class that takes into account the necessary elements for comparing the equality of two operands in its hash value. (operand_data_hasher::hash): New. (operand_data_hasher::equal): New. (operand_datas): New, hash table of konwn pattern operands. (place_operands): Use a hash table instead of traversing the array to find the same operand. (main): Add initialization of the hash table 'operand_datas'.
2024-08-13Revert "[rtl-optimization/116244] Don't create bogus regs in alter_subreg"Jeff Law4-281/+2
This reverts commit e9738e77674e23f600315ca1efed7d1c7944d0cc.
2024-08-13testsuite: Fix fam-in-union-alone-in-struct-2.c with unsigned char [PR116148]Kewen Lin1-1/+1
As PR116148#c7 shows, fam-in-union-alone-in-struct-2.c still fails on hppa which is a BE environment, but by checking more (also confirmed by John in PR116148#c12), it's due to that signedness of plain char on hppa is signed therefore the value of with_fam_3_v.a[7] "8f" get sign extended as "ffffff8f" then the verification will fail. This patch is to change plain char with unsigned char to avoid that. PR testsuite/116148 gcc/testsuite/ChangeLog: * c-c++-common/fam-in-union-alone-in-struct-2.c: Change the type of member a[] of union with_fam_3 with unsigned char.