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2022-11-28arm: improve tests for vabdq*Andrea Corallo24-73/+464
gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vabdq_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise.
2022-11-28arm: improve tests for vabavq*Andrea Corallo12-24/+384
gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise.
2022-11-28arm: improve tests for vmax*Andrea Corallo60-257/+1318
gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
2022-11-28arm: improve tests for vmin*Andrea Corallo60-255/+1320
gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.
2022-11-28arm: improve tests and fix vcmp*Andrea Corallo170-421/+4512
gcc/ChangeLog: * config/arm/mve.md (@mve_vcmp<mve_cmp_op>q_<mode>): Fix spacing. * config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m) (__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Improve test. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise.
2022-11-28arm: improve tests and fix vdupq*Andrea Corallo25-59/+567
gcc/ChangeLog: * config/arm/mve.md (mve_vdupq_n_f<mode>) (mve_vdupq_n_<supf><mode>, mve_vdupq_m_n_<supf><mode>) (mve_vdupq_m_n_f<mode>): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise.
2022-11-28arm: improve vidupq* testsAndrea Corallo18-88/+634
gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Improve tests. * gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise.
2022-11-28arm: improve tests and fix vdwdupq*Andrea Corallo19-103/+655
gcc/ChangeLog: * config/arm/mve.md (mve_vdwdupq_m_wb_u<mode>_insn): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c : Improve test. * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c : Likewise.
2022-11-28arm: improve tests and fix vddupq*Andrea Corallo19-96/+642
gcc/ChangeLog: * config/arm/mve.md (mve_vddupq_u<mode>_insn): Fix 'vddup.u' spacing. (mve_vddupq_m_wb_u<mode>_insn): Likewise. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test. * gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_n_u16.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c : Likewise. * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c : Likewise.
2022-11-28arm: fix 'vmsr' spacing and register capitalizationAndrea Corallo4-7/+7
gcc/ChangeLog: * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Fix 'vmsr' spacing and reg capitalization. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Update test. * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise.
2022-11-28arm: improve vcreateq* testsAndrea Corallo10-10/+220
gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
2022-11-28tree-optimization/107876 - unswitching of switchRichard Biener2-1/+47
The following shows a missed update of dominators when unswitching removes unreachable edges from switch stmts it unswitches. Fixed by wiping dominator info in that case. PR tree-optimization/107876 * tree-ssa-loop-unswitch.cc (clean_up_after_unswitching): Wipe dominator info if we removed an edge. * g++.dg/tree-ssa/pr107876.C: New testcase.
2022-11-28tree-optimization/107867 - failed abnormal cleanup in forwpropRichard Biener2-0/+29
The following makes sure to perform abnormal cleanup when forwprop propagates into a call. PR tree-optimization/107867 * tree-ssa-forwprop.cc (pass_forwprop::execute): Handle abnormal cleanup after substitution. * g++.dg/pr107867.C: New testcase.
2022-11-28LoongArch: Optimize immediate load.Lulu Cheng5-34/+110
The immediate number is split in the Split pass, not in the expand pass. Because loop2_invariant pass will extract the instructions that do not change in the loop out of the loop, some instructions will not meet the extraction conditions if the machine performs immediate decomposition while expand pass, so the immediate decomposition will be transferred to the split process. gcc/ChangeLog: * config/loongarch/loongarch.cc (enum loongarch_load_imm_method): Remove the member METHOD_INSV that is not currently used. (struct loongarch_integer_op): Define a new member curr_value, that records the value of the number stored in the destination register immediately after the current instruction has run. (loongarch_build_integer): Assign a value to the curr_value member variable. (loongarch_move_integer): Adds information for the immediate load instruction. * config/loongarch/loongarch.md (*movdi_32bit): Redefine as define_insn_and_split. (*movdi_64bit): Likewise. (*movsi_internal): Likewise. (*movhi_internal): Likewise. * config/loongarch/predicates.md: Return true as long as it is CONST_INT, ensure that the immediate number is not optimized by decomposition during expand optimization loop. gcc/testsuite/ChangeLog: * gcc.target/loongarch/imm-load.c: New test. * gcc.target/loongarch/imm-load1.c: New test.
2022-11-28Fix incorrect _mm_cvtsbh_ss.liuhongt7-6/+61
After supporting real __bf16, the implementation of _mm_cvtsbh_ss went wrong. The patch add a builtin to generate pslld for the intrinsic, also extendbfsf2 is supported with pslld when !HONOR_NANS (BFmode). truncsfbf2 is supported with vcvtneps2bf16 when !HONOR_NANS (BFmode) && flag_unsafe_math_optimizations. gcc/ChangeLog: PR target/107748 * config/i386/avx512bf16intrin.h (_mm_cvtsbh_ss): Refined. * config/i386/i386-builtin-types.def (FLOAT_FTYPE_BFLOAT16): New function type. * config/i386/i386-builtin.def (BDESC): New builtin. * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle the builtin. * config/i386/i386.md (extendbfsf2): New expander. (extendbfsf2_1): New define_insn. (truncsfbf2): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512bf16-cvtsbh2ss-1.c: Scan pslld. * gcc.target/i386/extendbfsf.c: New test.
2022-11-28Daily bump.GCC Administrator1-1/+1
2022-11-27Daily bump.GCC Administrator3-1/+11
2022-11-26tree-optimization/103356 Add missing (~a) == b folding for _BoolAndrew Pinski2-0/+16
The following makes sure to fold (~a) == b to a ^ b for truth values. OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions. Thanks, Andrew Pinski PR tree-optimization/103356 gcc/ChangeLog: * match.pd: ((~a) == b -> a ^ b): New pattern. gcc/testsuite/ChangeLog: * gcc.dg/pr103356-1.c: New test.
2022-11-26Daily bump.GCC Administrator7-1/+133
2022-11-25OpenMP: Generate SIMD clones for functions with "declare target"Sandra Loosemore25-52/+887
This patch causes the IPA simdclone pass to generate clones for functions with the "omp declare target" attribute as if they had "omp declare simd", provided the function appears to be suitable for SIMD execution. The filter is conservative, rejecting functions that write memory or that call other functions not known to be safe. A new option -fopenmp-target-simd-clone is added to control this transformation; it's enabled for offload processing at -O2 and higher. gcc/ChangeLog: * common.opt (fopenmp-target-simd-clone): New option. (target_simd_clone_device): New enum to go with it. * doc/invoke.texi (-fopenmp-target-simd-clone): Document. * flag-types.h (enum omp_target_simd_clone_device_kind): New. * omp-simd-clone.cc (auto_simd_fail): New function. (auto_simd_check_stmt): New function. (plausible_type_for_simd_clone): New function. (ok_for_auto_simd_clone): New function. (simd_clone_create): Add force_local argument, make the symbol have internal linkage if it is true. (expand_simd_clones): Also check for cloneable functions with "omp declare target". Pass explicit_p argument to simd_clone.compute_vecsize_and_simdlen target hook. * opts.cc (default_options_table): Add -fopenmp-target-simd-clone. * target.def (TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN): Add bool explicit_p argument. * doc/tm.texi: Regenerated. * config/aarch64/aarch64.cc (aarch64_simd_clone_compute_vecsize_and_simdlen): Update. * config/gcn/gcn.cc (gcn_simd_clone_compute_vecsize_and_simdlen): Update. * config/i386/i386.cc (ix86_simd_clone_compute_vecsize_and_simdlen): Update. gcc/testsuite/ChangeLog: * g++.dg/gomp/target-simd-clone-1.C: New. * g++.dg/gomp/target-simd-clone-2.C: New. * gcc.dg/gomp/target-simd-clone-1.c: New. * gcc.dg/gomp/target-simd-clone-2.c: New. * gcc.dg/gomp/target-simd-clone-3.c: New. * gcc.dg/gomp/target-simd-clone-4.c: New. * gcc.dg/gomp/target-simd-clone-5.c: New. * gcc.dg/gomp/target-simd-clone-6.c: New. * gcc.dg/gomp/target-simd-clone-7.c: New. * gcc.dg/gomp/target-simd-clone-8.c: New. * lib/scanoffloadipa.exp: New. libgomp/ChangeLog: * testsuite/lib/libgomp.exp: Load scanoffloadipa.exp library. * testsuite/libgomp.c/target-simd-clone-1.c: New. * testsuite/libgomp.c/target-simd-clone-2.c: New. * testsuite/libgomp.c/target-simd-clone-3.c: New.
2022-11-25sync libsframe toplevel from binutils-gdbWeimin Pan4-7/+1287
This pulls in the toplevel portion of this binutils-gdb commit: 19e559f1c91bfaedbd2f91d85ee161f3f03fda3c libsframe: add the SFrame library ChangeLog: * Makefile.def: Add libsframe as new module with its dependencies. * Makefile.in: Regenerated. * configure.ac: Add libsframe to host_libs. * configure: Regenerated.
2022-11-25Bugfix detect assigning constant constructors within a code block.Gaius Mulley4-37/+149
gcc/m2/ChangeLog: * gm2-compiler/M2Quads.def (BuildAssignConstant): Exported. * gm2-compiler/M2Quads.mod (BuildAssignConstant): New procedure. (BuildAssignment) check whether designator is a constant and generate an error. * gm2-compiler/P3Build.bnf: Call BuildAssignConstant during ConstStatement. Pass tokenno down to constant constructor parameters. * gm2-compiler/PHBuild.bnf: Call BuildAssignConstant during ConstStatement. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2022-11-25libstdc++: Fix orphaned/nested output of configure checksJonathan Wakely2-9/+9
This moves two AC_MSG_RESULT lines for <uchar.h> features so that they are only printed when the corresponding AC_MSG_CHECKING actually happened. This fixes configure output like: checking for uchar.h... no no checking for int64_t... yes Also move the AC_MSG_CHECKING for libbacktrace support so it doesn't come after AC_CHECK_HEADERS output. This fixes: checking whether to build libbacktrace support... checking for sys/mman.h... (cached) yes yes libstdc++-v3/ChangeLog: * acinclude.m4 (GLIBCXX_CHECK_UCHAR_H): Don't use AC_MSG_RESULT unless the AC_MSG_CHECKING happened. * configure: Regenerate.
2022-11-25libstdc++: Call predicate with non-const values in std::erase_if [PR107850]Jonathan Wakely17-21/+121
As specified in the standard, the predicate for std::erase_if has to be invocable as non-const with a non-const lvalues argument. Restore support for predicates that only accept non-const arguments. It's not strictly nevessary to change it for the set and unordered_set overloads, because they only give const access to the elements anyway. I've done it for them too just to keep them all consistent. libstdc++-v3/ChangeLog: PR libstdc++/107850 * include/bits/erase_if.h (__erase_nodes_if): Use non-const reference to the container. * include/experimental/map (erase_if): Likewise. * include/experimental/set (erase_if): Likewise. * include/experimental/unordered_map (erase_if): Likewise. * include/experimental/unordered_set (erase_if): Likewise. * include/std/map (erase_if): Likewise. * include/std/set (erase_if): Likewise. * include/std/unordered_map (erase_if): Likewise. * include/std/unordered_set (erase_if): Likewise. * testsuite/23_containers/map/erasure.cc: Check with const-incorrect predicate. * testsuite/23_containers/set/erasure.cc: Likewise. * testsuite/23_containers/unordered_map/erasure.cc: Likewise. * testsuite/23_containers/unordered_set/erasure.cc: Likewise. * testsuite/experimental/map/erasure.cc: Likewise. * testsuite/experimental/set/erasure.cc: Likewise. * testsuite/experimental/unordered_map/erasure.cc: Likewise. * testsuite/experimental/unordered_set/erasure.cc: Likewise.
2022-11-25libstdc++: Do not define operator!= in <random> for C++20Jonathan Wakely2-30/+148
These overloads are not needed in C++20 as they can be synthesized by the compiler. Removing them means less code to compile when including these headers. libstdc++-v3/ChangeLog: * include/bits/random.h [three_way_comparison] (operator!=): Do not define inequality operators when C++20 three way comparisons are supported. * include/ext/random [three_way_comparison] (operator!=): Likewise.
2022-11-25libstdc++: Add always_inline to trivial iterator operationsJonathan Wakely1-3/+5
libstdc++-v3/ChangeLog: * include/bits/stl_iterator_base_funcs.h (__distance): Add always_inline attribute to overload for random access iterators. (advance, distance, next, prev): Add always_inline attribute to inline functions that just forward to another function.
2022-11-25sve2: Fix expansion of division [PR107830]Tamar Christina3-5/+35
SVE has an actual division optab, and when using -Os we don't optimize the division away. This means that we need to distinguish between a div which we can optimize and one we cannot even during expansion. gcc/ChangeLog: PR target/107830 * config/aarch64/aarch64.cc (aarch64_vectorize_can_special_div_by_constant): Check validity during codegen phase as well. gcc/testsuite/ChangeLog: PR target/107830 * gcc.target/aarch64/sve2/pr107830-1.c: New test. * gcc.target/aarch64/sve2/pr107830-2.c: New test.
2022-11-25libgomp: Add no-target-region rev offload test + fix plugin-nvptxTobias Burnus2-12/+73
OpenMP permits that a 'target device(ancestor:1)' is called without being enclosed in a target region - using the current device (i.e. the host) in that case. This commit adds a testcase for this. In case of nvptx, the missing on-device 'GOMP_target_ext' call causes that it and also the associated on-device GOMP_REV_OFFLOAD_VAR variable are not linked in from nvptx's libgomp.a. Thus, handle the failing cuModuleGetGlobal gracefully by disabling reverse offload and assuming that the failure is fine. libgomp/ChangeLog: * plugin/plugin-nvptx.c (GOMP_OFFLOAD_load_image): Use unsigned int for 'i' to match 'fn_entries'; regard absent GOMP_REV_OFFLOAD_VAR as valid and the code having no reverse-offload code. * testsuite/libgomp.c-c++-common/reverse-offload-2.c: New test.
2022-11-25libgomp.texi: OpenMP Impl Status 5.1 additions + TR11Tobias Burnus1-0/+68
libgomp/ChangeLog: * libgomp.texi (OpenMP Implementation Status): Add three 5.1 items and status for Technical Report (TR) 11.
2022-11-25Revert "gcc-changelog: temporarily disable check_line_start"Martin Liska1-2/+0
This reverts commit a5878983d53db7513edb0e6bd99250dbb0c7d147.
2022-11-25Daily bump.GCC Administrator10-1/+453
2022-11-25gcc-changelog: temporarily disable check_line_startMartin Liska1-0/+2
contrib/ChangeLog: * gcc-changelog/git_commit.py: Temporarily disable check_line.start.
2022-11-25Fix thinko in operator_bitwise_xor::op1_rangeEric Botcazou4-0/+56
There is a thinko in the op1_range method of ranger's operator_bitwise_xor class in a boolean context: if the result is known to be true, it may infer that a specific operand is false without any basis. gcc/ * range-op.cc (operator_bitwise_xor::op1_range): Fix thinko. gcc/testsuite/ * gnat.dg/opt100.adb: New test. * gnat.dg/opt100_pkg.adb, gnat.dg/opt100_pkg.ads: New helper.
2022-11-25lto: fix usage of timer in materialize_cgraphMartin Liska1-8/+6
PR lto/107829 gcc/lto/ChangeLog: * lto.cc (materialize_cgraph): Call timevar_push before materialization starts.
2022-11-25tree-optimization/107865 - ICE with outlining of loopsRichard Biener2-0/+20
The following makes sure to clear loops number of iterations when outlining them as part of a SESE region as can happen with auto-parallelization. The referenced SSA names become stale otherwise. PR tree-optimization/107865 * tree-cfg.cc (move_sese_region_to_fn): Free the number of iterations of moved loops. * gfortran.dg/graphite/pr107865.f90: New testcase.
2022-11-24Adjust the symbol for SECTION_LINK_ORDER linked_to section [PR99889]Kewen.Lin11-60/+39
As discussed in PR98125, -fpatchable-function-entry with SECTION_LINK_ORDER support doesn't work well on powerpc64 ELFv1 because the filled "Symbol" in .section name,"flags"o,@type,Symbol sits in .opd section instead of in the function_section like .text or named .text*. Since we already generates one label LPFE* which sits in function_section of current_function_decl, this patch is to reuse it as the symbol for the linked_to section. It avoids the above ABI specific issue when using the symbol concluded from current_function_decl. Besides, with this support some previous workarounds can be reverted. PR target/99889 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_print_patchable_function_entry): Adjust to call function default_print_patchable_function_entry. * targhooks.cc (default_print_patchable_function_entry_1): Remove and move the flags preparation ... (default_print_patchable_function_entry): ... here, adjust to use current_function_funcdef_no for label no. * targhooks.h (default_print_patchable_function_entry_1): Remove. * varasm.cc (default_elf_asm_named_section): Adjust code for __patchable_function_entries section support with LPFE label. gcc/testsuite/ChangeLog: * g++.dg/pr93195a.C: Remove the skip on powerpc*-*-* 64-bit. * gcc.target/aarch64/pr92424-2.c: Adjust LPFE1 with LPFE0. * gcc.target/aarch64/pr92424-3.c: Likewise. * gcc.target/i386/pr93492-2.c: Likewise. * gcc.target/i386/pr93492-3.c: Likewise. * gcc.target/i386/pr93492-4.c: Likewise. * gcc.target/i386/pr93492-5.c: Likewise.
2022-11-25libstdc++: Change return type of std::bit_width to int (LWG 3656)Jonathan Wakely4-2/+30
libstdc++-v3/ChangeLog: * doc/html/manual/bugs.html: Regenerate. * doc/xml/manual/intro.xml: Document LWG 3656 change. * include/std/bit (__bit_width, bit_width): Return int. * testsuite/26_numerics/bit/bit.pow.two/lwg3656.cc: New test.
2022-11-24libstdc++: Update tests on trunk [PR106201]Jonathan Wakely2-3/+19
This copies the better tests from gcc-12 to trunk. libstdc++-v3/ChangeLog: PR libstdc++/106201 * testsuite/27_io/filesystem/iterators/106201.cc: Improve test. * testsuite/experimental/filesystem/iterators/106201.cc: New test.
2022-11-24PR-107611 Use correct parameter type in termios (doUnset).Gaius Mulley4-6/+6
2022-11-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> gcc/m2/ChangeLog: * gm2-libs-ch/termios.c (doUnset): Use correct parameter tcflag_t *. * mc-boot-ch/Gtermios.cc (doUnset): Use correct parameter tcflag_t *. * pge-boot/Gtermios.cc (doUnset): Use correct parameter tcflag_t *. libgm2/ChangeLog: * libm2pim/termios.cc (doUnset): Use correct parameter tcflag_t *. Signed-off-by: Gaius Mulley <gaius.mulley@southwales.ac.uk>
2022-11-24AArch64: Add fma_reassoc_width [PR107413]Wilco Dijkstra2-3/+34
Add a reassocation width for FMA in per-CPU tuning structures. Keep the existing setting of 1 for cores with 2 FMA pipes (this disables reassociation), and use 4 for cores with 4 FMA pipes. This improves SPECFP2017 on Neoverse V1 by ~1.5%. gcc/ PR tree-optimization/107413 * config/aarch64/aarch64.cc (struct tune_params): Add fma_reassoc_width to all CPU tuning structures. (aarch64_reassociation_width): Use fma_reassoc_width. * config/aarch64/aarch64-protos.h (struct tune_params): Add fma_reassoc_width.
2022-11-24c++: Further -fcontract* option description fixesJakub Jelinek1-2/+2
During testing I've missed my previous patch just changed: -FAIL: compiler driver --help=c++ option(s): "^ +-.*[^:.]\$" absent from output: " -fcontract-build-level=[off|default|audit] Specify max contract level to generate runtime checks for" +FAIL: compiler driver --help=c++ option(s): "^ +-.*[^:.]\$" absent from output: " -fcontract-role=<name>:<semantics> Specify the semantics for all levels in a role (default, review), or a custom contract role with given semantics (ex: opt:assume,assume,assume)" rather than actually fixed it, the test only reports the first such problem. This patch fixes the remaining ones. 2022-11-24 Jakub Jelinek <jakub@redhat.com> * c.opt (fcontract-role=, fcontract-semantic=): Terminate descriptions with a dot.
2022-11-24asan: Fix up error recovery for too large frames [PR107317]Jakub Jelinek2-0/+19
asan_emit_stack_protection and functions it calls have various asserts that verify sanity of the stack protection instrumentation. But, that verification can easily fail if we've diagnosed a frame offset overflow. asan_emit_stack_protection just emits some extra code in the prologue, if we've reported errors, we aren't producing assembly, so it doesn't really matter if we don't include the protection code, compilation is going to fail anyway. 2022-11-24 Jakub Jelinek <jakub@redhat.com> PR middle-end/107317 * asan.cc: Include diagnostic-core.h. (asan_emit_stack_protection): Return NULL early if seen_error (). * gcc.dg/asan/pr107317.c: New test.
2022-11-24ada: Add assertion for the implementation of storage modelsEric Botcazou1-0/+3
We cannot generate a call to memset for an aggregate with an Others choice when the target of the assignment has a storage model with Copy_To routine. gcc/ada/ * gcc-interface/trans.cc (gnat_to_gnu) <N_Assignment_Statement>: Add assertion that memset is not supposed to be used when the target has a storage model with Copy_To routine.
2022-11-24ada: Spurious error on Lock_Free protected type with discriminantsJustin Squirek1-17/+12
This patch corrects an issue in the compiler whereby unprefixed discriminants appearing in protected subprograms were unable to be properly resolved - leading to spurious resolution errors. gcc/ada/ * sem_ch8.adb (Find_Direct_Name): Remove bypass to reanalyze incorrectly analyzed discriminals. (Set_Entity_Or_Discriminal): Avoid resetting the entity field of a discriminant reference to be the internally generated renaming when we are in strict preanalysis mode.
2022-11-24c: Propagate erroneous types to declaration specifiers [PR107805]Florian Weimer3-4/+11
Without this change, finish_declspecs cannot tell that whether there was an erroneous type specified, or no type at all. This may result in additional diagnostics for implicit ints, or missing diagnostics for multiple types. PR c/107805 gcc/c/ * c-decl.cc (declspecs_add_type): Propagate error_mark_bode from type to specs. gcc/testsuite/ * gcc.dg/pr107805-1.c: New test. * gcc.dg/pr107805-2.c: Likewise.
2022-11-24libstdc++: Another merge from fast_float upstream [PR107468]Jakub Jelinek2-21/+111
Upstream fast_float came up with a cheaper test for fegetround () == FE_TONEAREST using one float addition, one subtraction and one comparison. If we know we are rounding to nearest, we can use fast path in more cases as before. The following patch merges those changes into libstdc++. 2022-11-24 Jakub Jelinek <jakub@redhat.com> PR libstdc++/107468 * src/c++17/fast_float/MERGE: Adjust for merge from upstream. * src/c++17/fast_float/fast_float.h: Merge from fast_float 2ef9abbcf6a11958b6fa685a89d0150022e82e78 commit.
2022-11-24libstdc++: Workaround buggy printf on Solaris in to_chars/float128_c++23.cc ↵Jakub Jelinek1-2/+5
test [PR107815] As mentioned in the PR, Solaris apparently can handle right printf ("%.0Lf\n", 1e+202L * __DBL_MAX__); which prints 511 chars long number, but can't handle printf ("%.0Lf\n", 1e+203L * __DBL_MAX__); nor printf ("%.0Lf\n", __LDBL_MAX__); properly, instead of printing 512 chars long number for the former and 4933 chars long number for the second, it handles them as if user asked for "%.0Le\n" in those cases. The following patch disables the single problematic value that fails in the test, and also fixes commented out debugging printouts. 2022-11-24 Jakub Jelinek <jakub@redhat.com> PR libstdc++/107815 * testsuite/20_util/to_chars/float128_c++23.cc (test): Disable __FLT128_MAX__ test on Solaris. Fix up commented out debugging printouts.
2022-11-24testsuite: Fix up broken testcase [PR107127]Jakub Jelinek1-0/+1
I've added { dg-options "" } line manually in the patch but forgot to adjust the number of added lines. 2022-11-24 Jakub Jelinek <jakub@redhat.com> PR c/107127 * gcc.dg/pr107127.c (foo): Add missing closing }.
2022-11-24analyzer: fix Clang warningsMartin Liska1-2/+2
Fixes the following warnings: gcc/analyzer/varargs.cc:655:8: warning: 'matches_call_types_p' overrides a member function but is not marked 'override' [-Winconsistent-missing-override] gcc/analyzer/varargs.cc:707:50: warning: unused parameter 'cd' [-Wunused-parameter] gcc/analyzer/varargs.cc:707:8: warning: 'matches_call_types_p' overrides a member function but is not marked 'override' [-Winconsistent-missing-override] gcc/analyzer/ChangeLog: * varargs.cc: Fix Clang warnings.
2022-11-24Remove use_equiv_p in vr-values.ccAldy Hernandez2-128/+3
With no equivalences, the use_equiv_p argument in various methods in simplify_using_ranges is always false. This means we can remove all calls to compare_names, along with the function. gcc/ChangeLog: * vr-values.cc (simplify_using_ranges::compare_names): Remove. (vrp_evaluate_conditional_warnv_with_ops): Remove call to compare_names. (simplify_using_ranges::vrp_visit_cond_stmt): Remove use_equiv_p argument to vrp_evaluate_conditional_warnv_with_ops. * vr-values.h (class simplify_using_ranges): Remove compare_names. Remove use_equiv_p to vrp_evaluate_conditional_warnv_with_ops.