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A previous change accidently removed a-cohama and a-cohase from
`Makefile.rtl`. This patch adds these units back
gcc/ada/
* Makefile.rtl: Add missing units.
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For the GNATcheck rule "Improper_Returns", either use pragma Annotate
to exempt the violation with the rationale "early returns for performance",
or refactor the code by replacing multiple returns by a single return
statement with a conditional expression; this is more readable and
maintainable, and also conformant with a Highly Recommended design principle
of ISO 26262-6. For the GNATcheck rule "Discriminated_Records", use pragma
Annotate to exempt the violation with the rationale "only variant records
are disallowed".
gcc/ada/
* libgnarl/a-reatim.adb (Time_Of): Add pragma to exempt
Discriminated_Records.
* libgnat/s-imguti.adb (Round, Set_Decimal_Digits): Likewise.
* libgnat/s-multip.adb (Number_Of_CPUs): Likewise.
* libgnarl/s-tpopsp__posix-foreign.adb (Self): Refactor multiple
returns.
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gcc/ada/
* sem_ch3.adb (Add_Internal_Interface_Entities): Add missing
subtype-conformance check on primitives implementing interface
primitives.
(Error_Posted_In_Formals): New subprogram.
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This patch adjusts a comment that could have misleadingly suggested
that a corner case related to tasks could not exist in Ada 2012 or
Ada 2022.
gcc/ada/
* libgnarl/s-tassta.adb: Tweak comment.
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This reverts commit d8dc61bb5ab99c3239ea93a37097f9419bee0211.
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Notice those functions need to be use by COST model for dynamic LMUL use.
Extract as a single patch and committed.
gcc/ChangeLog:
* config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
(get_all_predecessors): New function.
(get_all_successors): Ditto.
* config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
(get_all_successors): Ditto.
* config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
* config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
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Recently, these xtheadcondmov tests regressed with -Oz:
* FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c
* FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c
* FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c
* FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c
As -Oz stands for "Optimize aggressively for size rather than speed.",
we need to inspect the generated code, which looks like this:
-Oz
0000000000000000 <not_int_int>:
0: e199 bnez a1,6 <.L2>
2: 40100513 li a0,1025
0000000000000006 <.L2>:
6: 8082 ret
-O2:
0000000000000000 <not_int_int>:
0: 40100793 li a5,1025
4: 40b7950b th.mveqz a0,a5,a1
8: 8082 ret
As the generated code with -Oz consumes less size, there is nothing
wrong in the code generation. Instead, let's not run the xtheadcondmov
tests with -Oz.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c: Disable for -Oz.
* gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c: Likewise.
* gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c: Likewise.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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This patch repurposes the code letter 's' to 'x', and 'S' to 'J'.
Also it introduces new CODE letters 'x', 's', 'S', and 'N'.
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
(split_addsi): Likewise.
* config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
'N', 'x', and 'J' code letters.
(arc_output_addsi): Make it static.
(split_addsi): Remove it.
* config/arc/arc.h (UNSIGNED_INT*): New defines.
(SINNED_INT*): Likewise.
* config/arc/arc.md (type): Add add, sub, bxor types.
(tst_movb): Change code letter from 's' to 'x'.
(andsi3_i): Likewise.
(addsi3_mixed): Refurbish the pattern.
(call_i): Change code letter from 'S' to 'J'.
* config/arc/arc700.md: Add newly introduced types.
* config/arc/arcHS.md: Likewsie.
* config/arc/arcHS4x.md: Likewise.
* config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
(CM4): Update description.
(CP4, C6u, C6n, CIs, C4p): New constraint.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
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gcc/
* common/config/arc/arc-common.cc (arc_option_optimization_table):
Remove mbbit_peephole.
* config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
(store_direct): Likewise.
(BBIT peephole2): Likewise.
* config/arc/arc.opt (mbbit-peephole): Ignore option.
* doc/invoke.texi (mbbit-peephole): Update document.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
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I've noticed a typo in a comment, fixed thusly.
2023-09-05 Jakub Jelinek <jakub@redhat.com>
* tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
avreage -> average.
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gcc/ada/ChangeLog:
* Makefile.rtl: Add LoongArch support.
* libgnarl/s-linux__loongarch.ads: New file.
* libgnat/system-linux-loongarch.ads: New file.
gcc/ChangeLog:
* config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
options passed from driver to gnat1 as explicit for multilib.
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gcc/ChangeLog:
* config.gcc: add loongarch*-elf target.
* config/loongarch/elf.h: New file.
Link against newlib by default.
libgcc/ChangeLog:
* config.host: add loongarch*-elf target.
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LoongArch processors may not support memory accesses without natural
alignments. Building libraries with -mstrict-align may help with
toolchain binary compatiblity and performance on these implementations
(e.g. Loongson 2K1000LA).
No significant performance degredation is observed on current mainstream
LoongArch processors when the option is enabled.
gcc/ChangeLog:
* config.gcc: use -mstrict-align for building libraries
if --with-strict-align-lib is given.
* doc/install.texi: likewise.
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These are exported according to the LoongArch Toolchain Conventions[1]
as a replacement of the obsolete "_LOONGARCH_{ARCH,TUNE}" macros,
which are expanded to strings representing the actual architecture
and microarchitecture of the target.
[1] currently relased at https://github.com/loongson/LoongArch-Documentation
/blob/main/docs/LoongArch-toolchain-conventions-EN.adoc
gcc/ChangeLog:
* config/loongarch/loongarch-c.cc: Export macros
"__loongarch_{arch,tune}" in the preprocessor.
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The configure script and the GCC driver are updated so that
it is easier to customize and control GCC builds for targeting
different LoongArch implementations.
* Make --with-abi obsolete, since it might cause different default ABI
under the same target triplet, which is undesirable. The default ABI
is now purely decided by the target triplet.
* Support options for LoongArch SIMD extensions:
new configure options --with-simd={none,lsx,lasx};
new compiler option -msimd={none,lsx,lasx};
new driver options -m[no]-l[a]sx.
* Enforce the priority of configuration paths (for <parm>={fpu,tune,simd}):
-m<parm> > -march-implied > --with-<parm> > --with-arch-implied.
* Allow the user to control the compiler options used when building
GCC libraries for each multilib variant via --with-multilib-list
and --with-multilib-default. This could become more useful when
we have 32-bit support later.
Example 1: the following configure option
--with-multilib-list=lp64d/la464/mno-strict-align/msimd=lsx,lp64s/mfpu=32
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-mabi=ABI -march=ARCH a list of other options
(mandatory) (optional) (optional)
builds two sets of libraries:
1. lp64d/base ABI (built with "-march=la464 -mno-strict-align -msimd=lsx")
2. lp64s/base ABI (built with "-march=abi-default -mfpu=32")
Example 2: the following 3 configure options
--with-arch=loongarch64
--with-multilib-list=lp64d,lp64f,lp64s/la464
--with-multilib-default=fixed/mno-strict-align/mfpu=64
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-march=ARCH a list of other options
(optional) (optional)
is equivalent to (in terms of building libraries):
--with-multilib-list=\
lp64d/loongarch64/mno-strict-align/mfpu=64,\
lp64f/loongarch64/mno-strict-align/mfpu=64,\
lp64s/la464
Note:
1. the GCC driver and compiler proper does not support
"-march=fixed". "fixed" that appear here acts as a placeholder for
"use whatever ARCH in --with-arch=ARCH" (or the default value
of --with-arch=ARCH if --with-arch is not explicitly configured).
2. if the ARCH part is omitted, "-march=abi-default"
is used for building all library variants, which
practically means enabling the minimal ISA features
that can support the given ABI.
ChangeLog:
* config-ml.in: Do not build the multilib library variant
that is duplicate with the toplevel one.
gcc/ChangeLog:
* config.gcc: Make --with-abi= obsolete, decide the default ABI
with target triplet. Allow specifying multilib library build
options with --with-multilib-list and --with-multilib-default.
* config/loongarch/t-linux: Likewise.
* config/loongarch/genopts/loongarch-strings: Likewise.
* config/loongarch/loongarch-str.h: Likewise.
* doc/install.texi: Likewise.
* config/loongarch/genopts/loongarch.opt.in: Introduce
-m[no-]l[a]sx options. Only process -m*-float and
-m[no-]l[a]sx in the GCC driver.
* config/loongarch/loongarch.opt: Likewise.
* config/loongarch/la464.md: Likewise.
* config/loongarch/loongarch-c.cc: Likewise.
* config/loongarch/loongarch-cpu.cc: Likewise.
* config/loongarch/loongarch-cpu.h: Likewise.
* config/loongarch/loongarch-def.c: Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc: Likewise.
* config/loongarch/loongarch-driver.h: Likewise.
* config/loongarch/loongarch-opts.cc: Likewise.
* config/loongarch/loongarch-opts.h: Likewise.
* config/loongarch/loongarch.cc: Likewise.
* doc/invoke.texi: Likewise.
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On SPR, vmovsh can be execute on 3 ports, vpblendw can only be
executed on 2 ports.
On znver4, vpblendw can be executed on 4 ports, if vmovsh is similar
as vmovss, then it can also be executed on 4 ports.
So there's no difference for znver? but vmovsh is more optimized on
SPR.
gcc/ChangeLog:
* config/i386/sse.md: (V8BFH_128): Renamed to ..
(VHFBF_128): .. this.
(V16BFH_256): Renamed to ..
(VHFBF_256): .. this.
(avx512f_mov<mode>): Extend to V_128.
(vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
(vcvtneo<bf16_ph>2ps_<mode>): Ditto.
(vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
(vcvtneo<bf16_ph>2ps_<mode>): Ditto.
* config/i386/i386-expand.cc (expand_vec_perm_blend):
Canonicalize vec_merge.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-vmovsh-1a.c: Remove xfail.
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gcc/ChangeLog:
* config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
* config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
(autovectorize_vector_modes): Ditto.
(vectorize_related_mode): Ditto.
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Tests under gcc.dg/vect use check_vect_support_and_set_flags to set
compilation flags as appropriate for the target, but they also set
dg-do-what-default to 'run' or 'compile', depending on the actual
target hardware (or simulator) capabilities.
For instance on arm, we use options to enable Neon, but set
dg-do-what-default to 'run' only if we cam actually execute Neon
instructions.
Therefore, we would always try to link and execute tests containing
'dg-do run', although dg-do-what-default says otherwise, leading to
uninteresting failures.
Therefore, this patch removes all such unconditionnal 'dg-do run',
thus avoid link errors for instance if GCC has been configured with
multilibs disabled and some --with-{float|cpu|hard} option
incompatible with what check_vect_support_and_set_flags selects.
For exmaple, GCC configured with:
--disable-multilib --with-mode=thumb --with-cpu=cortex-m7 --with-float=hard
and check_vect_support_and_set_flags uses
-mfpu=neon -mfloat-abi=softfp -march=armv7-a
(thus incompatible float-abi options)
Tested on native aarch64-linux-gnu (no change) and several arm-eabi
cases where the FAIL/UNRESOLVED disappear (and we keep only the
'compilation' tests).
2023-09-04 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* gcc.dg/vect/bb-slp-44.c: Remove 'dg-do run'.
* gcc.dg/vect/bb-slp-71.c: Likewise.
* gcc.dg/vect/bb-slp-72.c: Likewise.
* gcc.dg/vect/bb-slp-73.c: Likewise.
* gcc.dg/vect/bb-slp-74.c: Likewise.
* gcc.dg/vect/bb-slp-pr101207.c: Likewise.
* gcc.dg/vect/bb-slp-pr101615-1.c: Likewise.
* gcc.dg/vect/bb-slp-pr101615-2.c: Likewise.
* gcc.dg/vect/bb-slp-pr101668.c: Likewise.
* gcc.dg/vect/bb-slp-pr54400.c: Likewise.
* gcc.dg/vect/bb-slp-pr98516-1.c: Likewise.
* gcc.dg/vect/bb-slp-pr98516-2.c: Likewise.
* gcc.dg/vect/bb-slp-pr98544.c: Likewise.
* gcc.dg/vect/pr101445.c: Likewise.
* gcc.dg/vect/pr105219.c: Likewise.
* gcc.dg/vect/pr107160.c: Likewise.
* gcc.dg/vect/pr107212-1.c: Likewise.
* gcc.dg/vect/pr107212-2.c: Likewise.
* gcc.dg/vect/pr109502.c: Likewise.
* gcc.dg/vect/pr110381.c: Likewise.
* gcc.dg/vect/pr110838.c: Likewise.
* gcc.dg/vect/pr88497-1.c: Likewise.
* gcc.dg/vect/pr88497-7.c: Likewise.
* gcc.dg/vect/pr96783-1.c: Likewise.
* gcc.dg/vect/pr96783-2.c: Likewise.
* gcc.dg/vect/pr97558-2.c: Likewise.
* gcc.dg/vect/pr99253.c: Likewise.
* gcc.dg/vect/slp-mask-store-1.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-10.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-11.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-2.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-3.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-4.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-5.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-6.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-8.c: Likewise.
* gcc.dg/vect/vect-bic-bitmask-9.c: Likewise.
* gcc.dg/vect/vect-cond-13.c: Likewise.
* gcc.dg/vect/vect-recurr-1.c: Likewise.
* gcc.dg/vect/vect-recurr-2.c: Likewise.
* gcc.dg/vect/vect-recurr-3.c: Likewise.
* gcc.dg/vect/vect-recurr-4.c: Likewise.
* gcc.dg/vect/vect-recurr-5.c: Likewise.
* gcc.dg/vect/vect-recurr-6.c: Likewise.
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(PR111238)"
This reverts commit 46c2e94ca66ed9991c45a6ba6204ed02869efc39.
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As discussed in PR104167 (comments #8 and below), and PR111238, using
-Wl,-gc-sections in the libstdc++ testsuite for arm-eabi
(cross-toolchain) avoids link failures for a few tests:
27_io/filesystem/path/108636.cc
std/time/clock/gps/1.cc
std/time/clock/gps/io.cc
std/time/clock/tai/1.cc
std/time/clock/tai/io.cc
std/time/clock/utc/1.cc
std/time/clock/utc/io.cc
std/time/clock/utc/leap_second_info.cc
std/time/exceptions.cc
std/time/format.cc
std/time/time_zone/get_info_local.cc
std/time/time_zone/get_info_sys.cc
std/time/tzdb/1.cc
std/time/tzdb/leap_seconds.cc
std/time/tzdb_list/1.cc
std/time/zoned_time/1.cc
std/time/zoned_time/custom.cc
std/time/zoned_time/io.cc
std/time/zoned_traits.cc
This patch achieves this by calling GLIBCXX_CHECK_LINKER_FEATURES in
cross-build cases, like we already do for native builds. We keep not
doing so in Canadian-cross builds.
However, this would hide the fact that libstdc++ somehow forces the
user to use -Wl,-gc-sections to avoid undefined references to chdir,
mkdir, chmod, pathconf, ... so maybe it's better to keep the status
quo and not apply this patch?
2023-08-31 Christophe Lyon <christophe.lyon@linaro.org>
libstdc++-v3/ChangeLog:
PR libstdc++/111238
* configure: Regenerate.
* configure.ac: Call GLIBCXX_CHECK_LINKER_FEATURES in cross,
non-Canadian builds.
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Consider Signed-off-by lines as part of the ending of the initial
commit to avoid having these in the middle of the log when the
changelog part is injected after.
This is particularly usefull with:
$ git gcc-commit-mklog --amend -s
that can be used to create the changelog and add the Signed-off-by line.
Also applies most of the shellcheck suggestions on the
prepare-commit-msg hook.
contrib/ChangeLog:
* mklog.py: Leave SOB lines after changelog.
* prepare-commit-msg: Apply most shellcheck suggestions.
Signed-off-by: Marc Poulhiès <dkm@kataplop.net>
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Since commit e7a36e4715c7 "[PATCH] RISC-V: Support simplify (-1-x) for
vector." these tests fail on aarch64-linux:
=== g++ tests ===
Running g++:g++.target/aarch64/sve/acle/aarch64-sve-acle-asm.exp ...
FAIL: gcc.target/aarch64/sve/acle/asm/subr_s8.c -std=gnu++98 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_FULL check-function-bodies subr_m1_s8_m
FAIL: gcc.target/aarch64/sve/acle/asm/subr_s8.c -std=gnu++98 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_OVERLOADS check-function-bodies subr_m1_s8_m
FAIL: gcc.target/aarch64/sve/acle/asm/subr_u8.c -std=gnu++98 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_FULL check-function-bodies subr_m1_u8_m
FAIL: gcc.target/aarch64/sve/acle/asm/subr_u8.c -std=gnu++98 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_OVERLOADS check-function-bodies subr_m1_u8_m
=== gcc tests ===
Running gcc:gcc.target/aarch64/sve/acle/aarch64-sve-acle-asm.exp ...
FAIL: gcc.target/aarch64/sve/acle/asm/subr_s8.c -std=gnu90 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_FULL check-function-bodies subr_m1_s8_m
FAIL: gcc.target/aarch64/sve/acle/asm/subr_s8.c -std=gnu90 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_OVERLOADS check-function-bodies subr_m1_s8_m
FAIL: gcc.target/aarch64/sve/acle/asm/subr_u8.c -std=gnu90 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_FULL check-function-bodies subr_m1_u8_m
FAIL: gcc.target/aarch64/sve/acle/asm/subr_u8.c -std=gnu90 -O2 -fno-schedule-insns -DCHECK_ASM --save-temps -DTEST_OVERLOADS check-function-bodies subr_m1_u8_m
Andrew Pinski's analysis in PR testsuite/111071 is that the new code is
better and the testcase should be updated. I also asked Prathamesh Kulkarni
in private and he agreed.
Here is the update. With this change, all tests in
gcc.target/aarch64/sve/acle/aarch64-sve-acle-asm.exp pass on aarch64-linux.
Suggested-by: Andrew Pinski <apinski@marvell.com>
gcc/testsuite/
PR testsuite/111071
* gcc.target/aarch64/sve/acle/asm/subr_s8.c: Adjust to new code.
* gcc.target/aarch64/sve/acle/asm/subr_u8.c: Likewise.
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It's no longer true that 1.0if has type float _Complex when GNU
extensions are enabled, so remove the hardcoded -std option.
libstdc++-v3/ChangeLog:
* testsuite/26_numerics/complex/literals/types.cc: Remove
dg-options and add target selector instead.
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These tests need slight adjustments to be valid in C++11 and later, but
there's no reason that can't be done, so that we test them in more
modes.
libstdc++-v3/ChangeLog:
* testsuite/tr1/6_containers/utility/pair.cc: Remove dg-options
and qualify ambiguous calls to get.
* testsuite/tr1/8_c_compatibility/cmath/pow_cmath.cc: Adjust
expected result for std::pow(float, int) as per DR 550.
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There is no reason to only test std::auto_ptr with -std=c++03, we just
need to handle the deprecated warnings for C++11 and later.
libstdc++-v3/ChangeLog:
* testsuite/20_util/auto_ptr/1.cc: Remove dg-options -std=c++03
and add dg-warning for deprecation warnings.
* testsuite/20_util/auto_ptr/2.cc: Likewise.
* testsuite/20_util/auto_ptr/3.cc: Likewise.
* testsuite/20_util/auto_ptr/3946.cc: Likewise.
* testsuite/20_util/auto_ptr/4.cc: Likewise.
* testsuite/20_util/auto_ptr/5.cc: Likewise.
* testsuite/20_util/auto_ptr/6.cc: Likewise.
* testsuite/20_util/auto_ptr/7.cc: Likewise.
* testsuite/20_util/auto_ptr/assign_neg.cc: Likewise.
* testsuite/20_util/auto_ptr/requirements/explicit_instantiation/1.cc:
Likewise.
* testsuite/tr1/2_general_utilities/shared_ptr/assign/auto_ptr.cc:
Likewise.
* testsuite/tr1/2_general_utilities/shared_ptr/assign/auto_ptr_neg.cc:
Likewise.
* testsuite/tr1/2_general_utilities/shared_ptr/assign/auto_ptr_rvalue_neg.cc:
Likewise.
* testsuite/tr1/2_general_utilities/shared_ptr/cons/43820_neg.cc:
Likewise.
* testsuite/tr1/2_general_utilities/shared_ptr/cons/auto_ptr.cc:
Likewise.
* testsuite/tr1/2_general_utilities/shared_ptr/cons/auto_ptr_neg.cc:
Likewise.
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These tests have transposed digits in the filenames and comments.
libstdc++-v3/ChangeLog:
PR libstdc++/26142
* testsuite/23_containers/vector/26412-1.cc: Moved to...
* testsuite/23_containers/vector/26142-1.cc: ...here.
* testsuite/23_containers/vector/26412-2.cc: Moved to...
* testsuite/23_containers/vector/26142-2.cc: ...here.
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These test behaviour only seen with -std=c++03 so the target selector
should match.
libstdc++-v3/ChangeLog:
* testsuite/20_util/bitset/107037.cc: Add c++98_only selector.
* testsuite/26_numerics/complex/56111.cc: Likewise.
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libstdc++-v3/ChangeLog:
* testsuite/23_containers/deque/requirements/explicit_instantiation/2.cc:
Add dg-options to restrict the test to C++98 mode.
* testsuite/23_containers/list/requirements/explicit_instantiation/2.cc:
Likewise.
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This test should use a target selector of c++23 so that the explicit
-std=gnu++23 option can be removed, to allow testing with later
standards too.
libstdc++-v3/ChangeLog:
* testsuite/20_util/expected/bad.cc: Add missing target
selector.
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For nvptx offloading, it'll FAIL its execution test until nvptx-tools updated
to include commit 1b5946d78ef5dcfb640e9f545a7c791b7f623911
"Merge commit '26095fd01232061de9f79decb3e8222ef7b46191' into HEAD [#29]",
<https://github.com/MentorEmbedded/nvptx-tools/commit/1b5946d78ef5dcfb640e9f545a7c791b7f623911>.
libgomp/
* testsuite/libgomp.c-c++-common/pr100059-1.c: New.
Co-authored-by: Thomas Schwinge <thomas@codesourcery.com>
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This is a minor adjustment to make the GCC behaviour better match the
old system tools.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
gcc/ChangeLog:
* config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
all 32b Darwin PowerPC cases.
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This handles placement of global initializers into __TEXT,__StaticInit as used
by other platform toolchains.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
gcc/ChangeLog:
* config/darwin-sections.def (static_init_section): Add the
__TEXT,__StaticInit section.
* config/darwin.cc (darwin_function_section): Use the static init
section for global initializers, to match other platform toolchains.
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System tools from Darwin10 onwards have moved the exceptions tables from
the __DATA segment to the __TEXT one. They also revised the relocations
used for typeinfo. While Darwin9 was not changed at the time, in fact the
tools there are equally happy with the revised scheme - and therefore at
present there seems no reason to special-case it.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
gcc/ChangeLog:
* config/darwin-sections.def (darwin_exception_section): Move to
the __TEXT segment.
* config/darwin.cc (darwin_emit_except_table_label): Align before
the exception table label.
* config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
relative 4byte relocs.
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There are now quite a few symbol flags, so it is sometimes useful to get
them in a text form, rather than decoding the hex number printed by
debug_rtx().
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
gcc/ChangeLog:
* config/darwin.cc (dump_machopic_symref_flags): New.
(debug_machopic_symref_flags): New.
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This patch would like to add FP16 support for the VRGATHEREI16
intrinsic. Aka:
* __riscv_vrgatherei16_vv_f16mf4
* __riscv_vrgatherei16_vv_f16mf4_m
As well as f16mf2 to f16m8 types.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-types.def
(vfloat16mf4_t): Add FP16 intrinsic def.
(vfloat16mf2_t): Ditto.
(vfloat16m1_t): Ditto.
(vfloat16m2_t): Ditto.
(vfloat16m4_t): Ditto.
(vfloat16m8_t): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/intrisinc-vrgatherei16.c: New test.
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Integer expression "(X - N * M) / N" can be optimized to "X / N - M" with
the below conditions:
1. There is no wrap/overflow/underflow.
wrap/overflow/underflow breaks the arithmetic operation.
2. "X - N * M" and "X" are not of opposite sign.
Here, the operation "/" would be "trunc_div", the fractional part is
discarded. If "X - N * M" and "X" are in different signs, then trunc_div
discards the fractional parts (of /N) in different directions.
PR tree-optimization/108757
gcc/ChangeLog:
* match.pd ((X - N * M) / N): New pattern.
((X + N * M) / N): New pattern.
((X + C) div_rshift N): New pattern.
gcc/testsuite/ChangeLog:
* gcc.dg/pr108757-1.c: New test.
* gcc.dg/pr108757-2.c: New test.
* gcc.dg/pr108757.h: New test.
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v2: Modify commit message.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Support 'G' -> 'k' in
movsf_hardfloat and movdf_hardfloat.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/const-double-zero-stx.c: New test.
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The patch refers to the submission of RISCV
7bbce9b50302959286381d9177818642bceaf301.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_extend_comparands):
In unsigned QImode test, check for sign extended subreg and/or
constant operands, and do a sign extension in that case.
* config/loongarch/loongarch.md (TARGET_64BIT): Define
template cbranchqi4.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/switch-qi.c: New test.
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Before optimization, the operation of taking fixed-point numbers from memory
and then forcing type conversion needs to be loaded into fixed-point registers
before conversion. After the optimization is completed, the fixed-point value
is directly transferred to the floating-point register for type conversion.
eg:
extern int a;
float
test(void)
{
return (float)a;
}
Assembly code before optimization:
pcalau12i $r12,%got_pc_hi20(a)
ld.d $r12,$r12,%got_pc_lo12(a)
ldptr.w $r12,$r12,0
movgr2fr.w $f0,$r12
ffint.s.w $f0,$f0
Optimized assembly code:
pcalau12i $r12,%got_pc_hi20(a)
ld.d $r12,$r12,%got_pc_lo12(a)
fld.s $f0,$r12,0
ffint.s.w $f0,$f0
gcc/ChangeLog:
* config/loongarch/loongarch.md: Allows fixed-point values to be loaded
from memory into floating-point registers.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/float-load.c: New test.
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Fix the expected warning wording for targets without constructor
priority, like Darwin, making the test pass.
gcc/testsuite/ChangeLog:
PR testsuite/111066
* g++.dg/special/initpri3.C: Fix wording.
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This patch would like to allow the VLS mode autovec for the
floating-point binary operation MAX/MIN.
Given below code example:
test (float *out, float *in1, float *in2)
{
for (int i = 0; i < 128; i++)
out[i] = in1[i] > in2[i] ? in1[i] : in2[i];
// Or out[i] = fmax (in1[i], in2[i]);
}
Before this patch:
test:
csrr a4,vlenb
slli a4,a4,1
li a5,128
bleu a5,a4,.L2
mv a5,a4
.L2:
vsetvli zero,a5,e32,m8,ta,ma
vle32.v v16,0(a1)
vle32.v v8,0(a2)
vsetvli a3,zero,e32,m8,ta,ma
vmfgt.vv v0,v16,v8
vmerge.vvm v8,v8,v16,v0
vsetvli zero,a5,e32,m8,ta,ma
vse32.v v8,0(a0)
ret
After this patch:
test:
li a5,128
vsetvli zero,a5,e32,m1,ta,ma
vle32.v v1,0(a1)
vle32.v v2,0(a2)
vfmax.vv v1,v1,v2
vse32.v v1,0(a0)
ret
This MAX/MIN autovec acts on function call like fmaxf/fmax in math.h
too. And it depends on the option -ffast-math.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
fmax/fmin
* config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls/def.h: New macros.
* gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c: New test.
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Delete m_client_data_hooks before it is reassigned in
tree_diagnostics_defaults. This fixes a small memory leak in the fortran
frontend, which restores the diagnostics configurations to their default
values with a call to tree_diagnostics_defaults at the end of the main parse
hook.
gcc/ChangeLog:
* tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
pointer before overwriting it.
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During implementation, float128_type_node is bound with the type "__float128"
so that the compiler can correctly identify the type of the function. The
"q" suffix is associated with the "f128" function, which makes GCC more
flexible to support different user input cases, implementing functions such
as __builtin_{huge_valq, infq, fabsq, copysignq, nanq, nansq}.
gcc/ChangeLog:
* config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
Associate the __float128 type to float128_type_node so that it can
be recognized by the compiler.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Add the flag "FLOAT128_TYPE" to gcc and associate a function
with the suffix "q" to "f128".
* doc/extend.texi:Added support for 128-bit floating-point functions on
the LoongArch architecture.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/math-float-128.c: New test.
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gcc/fortran/ChangeLog:
PR fortran/31059
* trans-array.cc (gfc_conv_ss_startstride): For array bounds checking,
consider also array constructors in expressions, and use their shape.
gcc/testsuite/ChangeLog:
PR fortran/31059
* gfortran.dg/bounds_check_fail_5.f90: New test.
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[PR105948,PR94355]
Fixed spurious possibly-NULL warning always tagging along throwing
operator new despite it never returning NULL.
Now operator new is correctly recognized as possibly returning NULL
if and only if it is non-throwing or exceptions have been disabled.
Different standard signatures of operator new are now properly
recognized.
Added support of placement new, so that it is now properly recognized,
and a 'heap_allocated' region is no longer created for it.
Placement new size is also checked and a 'Wanalyzer-allocation-size'
is emitted when relevant, as well as always a 'Wanalyzer-out-of-bounds'.
'operator new' non-throwing variants are detected y checking the types
of the parameters.
Indeed, in a call to new (std::nothrow) () the chosen overload
has signature 'operator new (void*, std::nothrow_t&)', where the second
parameter is a reference. In a placement new, the second parameter will
always be a void pointer.
Prior to this patch, some buffers first allocated with 'new', then deleted
an thereafter used would result in a 'Wanalyzer-user-after-free'
warning. However the wording was "use after 'free'" instead of the
expected "use after 'delete'".
This patch fixes this by introducing a new kind of poisoned value,
namely POISON_KIND_DELETED.
Due to how the analyzer sees calls to non-throwing variants of
operator new, dereferencing a pointer freshly allocated in this fashion
caused both a 'Wanalyzer-use-of-uninitialized-value' and a
'Wanalyzer-null-dereference' to be emitted, while only the latter was
relevant. As a result, 'null-dereference' now supersedes
'use-of-uninitialized'.
Signed-off-by: benjamin priour <vultkayn@gcc.gnu.org>
gcc/analyzer/ChangeLog:
PR analyzer/105948
PR analyzer/94355
* analyzer.h (is_placement_new_p): New declaration.
* call-details.cc
(call_details::deref_ptr_arg): New function.
Dereference the argument at given index if possible.
* call-details.h: Declaration of the above function.
* kf-lang-cp.cc (is_placement_new_p): Returns true if the gcall
is recognized as a placement new.
(kf_operator_delete::impl_call_post): Unbinding a region and its
descendents now poisons with POISON_KIND_DELETED.
(register_known_functions_lang_cp): Known function "operator
delete" is now registered only once independently of its number of
arguments.
* region-model.cc (region_model::eval_condition): Now
recursively calls itself if any of the operand is wrapped in a
cast.
* sm-malloc.cc (malloc_state_machine::on_stmt):
Add placement new recognition.
* svalue.cc (poison_kind_to_str): Wording for the new PK.
* svalue.h (enum poison_kind): Add value POISON_KIND_DELETED.
gcc/testsuite/ChangeLog:
PR analyzer/105948
PR analyzer/94355
* g++.dg/analyzer/out-of-bounds-placement-new.C: Added a directive.
* g++.dg/analyzer/placement-new.C: Added tests.
* g++.dg/analyzer/new-2.C: New test.
* g++.dg/analyzer/noexcept-new.C: New test.
* g++.dg/analyzer/placement-new-size.C: New test.
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Also, add missing newline at end of file.
PR testsuite/111264
* gcc.dg/plugin/analyzer_cpython_plugin.c: Make declarations
C++11-compatible.
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These tests started failing at some point:
FAIL: 25_algorithms/copy/debug/constexpr_neg.cc (test for errors, line 49)
FAIL: 25_algorithms/copy/debug/constexpr_neg.cc (test for excess errors)
FAIL: 25_algorithms/equal/debug/constexpr_neg.cc (test for errors, line 47)
FAIL: 25_algorithms/equal/debug/constexpr_neg.cc (test for excess errors)
They only run with -D_GLIBCXX_DEBUG or make check-debug so seem to have
gone unnoticed until now.
libstdc++-v3/ChangeLog:
* testsuite/25_algorithms/copy/debug/constexpr_neg.cc: Adjust
expected errors.
* testsuite/25_algorithms/equal/debug/constexpr_neg.cc:
Likewise.
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