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2023-09-19ada: Crash processing type invariants on child subprogramJavier Miranda1-1/+24
gcc/ada/ * contracts.adb (Has_Public_Visibility_Of_Subprogram): Add missing support for child subprograms.
2023-09-19tree-optimization/111465 - bougs jump threading with no-copy src blockRichard Biener2-0/+68
The following avoids to forward thread a path with a EDGE_NO_COPY_SRC_BLOCK block that became non-empty due to folding. PR tree-optimization/111465 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1): Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty. * g++.dg/torture/pr111465.C: New testcase.
2023-09-19c/111468 - add unordered compare and pointer diff to GIMPLE FE parsingRichard Biener3-20/+91
The following adds __UN{LT,LE,GT,GE,EQ}, __UNORDERED and __ORDERED operator parsing support and support for parsing - as POINTER_DIFF_EXPR. PR c/111468 gcc/c/ * gimple-parser.cc (c_parser_gimple_binary_expression): Add return type argument. (c_parser_gimple_statement): Adjust. (c_parser_gimple_paren_condition): Likewise. (c_parser_gimple_binary_expression): Use passed in return type, add support for - as POINTER_DIFF_EXPR, __UN{LT,LE,GT,GE,EQ}, __UNORDERED and __ORDERED. gcc/testsuite/ * gcc.dg/gimplefe-50.c: New testcase. * gcc.dg/gimplefe-51.c: Likewise.
2023-09-19RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vectorizationJuzhe-Zhong12-136/+415
Support VLS floating-point FMA/FNMA/FMS patterns. Regression no difference after this patch, Committed. gcc/ChangeLog: * config/riscv/autovec.md: Extend VLS floating-point modes. * config/riscv/vector.md: Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: Add FMS tests. * gcc.target/riscv/rvv/autovec/vls/fma-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/fma-6.c: New test. * gcc.target/riscv/rvv/autovec/vls/fma-7.c: New test. * gcc.target/riscv/rvv/autovec/vls/fms-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/fms-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/fms-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/fnma-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/fnma-6.c: New test. * gcc.target/riscv/rvv/autovec/vls/fnma-7.c: New test.
2023-09-19match.pd: Some build_nonstandard_integer_type tweaksJakub Jelinek1-42/+21
As discussed earlier, using build_nonstandard_integer_type blindly for all INTEGRAL_TYPE_Ps is problematic now that we have BITINT_TYPE, because it always creates an INTEGRAL_TYPE with some possibly very large precision. The following patch attempts to deal with 3 such spots in match.pd, others still need looking at. In the first case, I think it is quite expensive/undesirable to create a non-standard INTEGER_TYPE with possibly huge precision and then immediately just see type_has_mode_precision_p being false for it, or even worse introducing a cast to TImode or OImode or XImode INTEGER_TYPE which nothing will be able to actually handle. 128-bit or 64-bit (on 32-bit targets) types are the largest supported by the backend, so the following patch avoids creating and matching conversions to larger types, it is an optimization anyway and so should be used when it is cheap that way. In the second hunk, I believe the uses of build_nonstandard_integer_type aren't useful at all. It is when matching a ? -1 : 0 and trying to express it as say -(type) (bool) a etc., but this is all GIMPLE only, where most of integral types with same precision/signedness are compatible and we know -1 is representable in that type, so I really don't see any reason not to perform the negation of a [0, 1] valued expression in type, rather than doing it in build_nonstandard_integer_type (TYPE_PRECISION (type), TYPE_UNSIGNED (type)) (except that it breaks the BITINT_TYPEs). I don't think we need to do something like range_check_type. While in there, I've also noticed it was using a (with { tree booltrue = constant_boolean_node (true, boolean_type_node); } and removed that + replaced uses of booltrue with boolean_true_node which the above function always returns. 2023-09-19 Jakub Jelinek <jakub@redhat.com> * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type nor check type_has_mode_precision_p for width larger than [TD]Imode precision. (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert to type. Use boolean_true_node instead of constant_boolean_node (true, boolean_type_node). Formatting fixes.
2023-09-19RISC-V: Support integer FMA/FNMA VLS modes autovectorizationJuzhe-Zhong11-160/+514
Simpily extend the current VLA iterator and patterns. Regression passed with no difference. gcc/ChangeLog: * config/riscv/autovec.md: Add VLS modes. * config/riscv/vector.md: Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS FMA/FNMA test. * gcc.target/riscv/rvv/autovec/vls/fma-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/fma-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/fma-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/fma-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/fnma-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/fnma-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/fnma-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/fnma-4.c: New test.
2023-09-19small _BitInt tweaksJakub Jelinek2-2/+6
I think it is undesirable when being asked for signed_type_for of unsigned _BitInt(1) (which is valid) to get signed _BitInt(1) (which is invalid, the standard only allows signed _BitInt(2) and larger), so the patch returns 1-bit signed INTEGER_TYPE for those cases. Furthermore it asserts in build_bitint_type that nothing attempts to create signed _BitInt(0), unsigned _BitInt(0) or signed _BitInt(1) types. 2023-09-18 Jakub Jelinek <jakub@redhat.com> gcc/ * tree.cc (build_bitint_type): Assert precision is not 0, or for signed types 1. (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant of unsigned _BitInt(1). gcc/c-family/ * c-common.cc (c_common_signed_or_unsigned_type): Return INTEGER_TYPE for signed variant of unsigned _BitInt(1).
2023-09-19libgomp: Handle NULL environ like pointer to NULL pointer [PR111413]Jakub Jelinek1-125/+126
clearenv function just sets environ to NULL (after sometimes freeing it), rather than setting it to a pointer to NULL, and our code was assuming it is always non-NULL. Fixed thusly, the change seems to be large but actually is just + if (environ) for (env = environ; *env != 0; env++) plus reindentation. I've also noticed the block after this for loop was badly indented (too much) and fixed that too. No testcase added, as it needs clearenv + dlopen. 2023-09-19 Jakub Jelinek <jakub@redhat.com> PR libgomp/111413 * env.c (initialize_env): Don't dereference environ if it is NULL. Reindent.
2023-09-19[testsuite][aarch64] Adjust vect_copy_lane_1.c for new code-gen.Prathamesh Kulkarni1-1/+1
gcc/testsuite/ChangeLog: * gcc.target/aarch64/vect_copy_lane_1.c: Scan for zip1 instead of ins for float32x2_t, int32x2_t and uint32x2_t tests.
2023-09-19RISC-V: Refactor and cleanup fma patternsLehua Ding5-964/+528
At present, FMA autovec's patterns do not fully use the corresponding pattern in vector.md. The previous reason is that the merge operand of pattern in vector.md cannot be VUNDEF. Now allowing it to be VUNDEF, reunify insn used for reload pass into vector.md, and the corresponding vlmax pattern in autovec.md is used for combine. This patch also refactors the corresponding combine pattern inside autovec-opt.md and removes the unused ones. gcc/ChangeLog: * config/riscv/autovec-opt.md (*<optab>_fma<mode>): Removed old combine patterns. (*single_<optab>mult_plus<mode>): Ditto. (*double_<optab>mult_plus<mode>): Ditto. (*sign_zero_extend_fma): Ditto. (*zero_sign_extend_fma): Ditto. (*double_widen_fma<mode>): Ditto. (*single_widen_fma<mode>): Ditto. (*double_widen_fnma<mode>): Ditto. (*single_widen_fnma<mode>): Ditto. (*double_widen_fms<mode>): Ditto. (*single_widen_fms<mode>): Ditto. (*double_widen_fnms<mode>): Ditto. (*single_widen_fnms<mode>): Ditto. (*reduc_plus_scal_<mode>): Adjust name. (*widen_reduc_plus_scal_<mode>): Adjust name. (*dual_widen_fma<mode>): New combine pattern. (*dual_widen_fmasu<mode>): Ditto. (*dual_widen_fmaus<mode>): Ditto. (*dual_fma<mode>): Ditto. (*single_fma<mode>): Ditto. (*dual_fnma<mode>): Ditto. (*single_fnma<mode>): Ditto. (*dual_fms<mode>): Ditto. (*single_fms<mode>): Ditto. (*dual_fnms<mode>): Ditto. (*single_fnms<mode>): Ditto. * config/riscv/autovec.md (fma<mode>4): Reafctor fma pattern. (*fma<VI:mode><P:mode>): Removed. (fnma<mode>4): Reafctor. (*fnma<VI:mode><P:mode>): Removed. (*fma<VF:mode><P:mode>): Removed. (*fnma<VF:mode><P:mode>): Removed. (fms<mode>4): Reafctor. (*fms<VF:mode><P:mode>): Removed. (fnms<mode>4): Reafctor. (*fnms<VF:mode><P:mode>): Removed. * config/riscv/riscv-protos.h (prepare_ternary_operands): Adjust prototype. * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor. * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern. (*pred_mul_plus<mode>): Removed. (*pred_mul_plus<mode>_scalar): Removed. (*pred_mul_plus<mode>_extended_scalar): Removed. (*pred_minus_mul<mode>_undef): New pattern. (*pred_minus_mul<mode>): Removed. (*pred_minus_mul<mode>_scalar): Removed. (*pred_minus_mul<mode>_extended_scalar): Removed. (*pred_mul_<optab><mode>_undef): New pattern. (*pred_mul_<optab><mode>): Removed. (*pred_mul_<optab><mode>_scalar): Removed. (*pred_mul_neg_<optab><mode>_undef): New pattern. (*pred_mul_neg_<optab><mode>): Removed. (*pred_mul_neg_<optab><mode>_scalar): Removed.
2023-09-19RISC-V: Fix typos on comments (SVE -> RVV)Tsukasa OI1-2/+2
We have the 'V' extension (RVV), not SVE from AArch64. gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (builtin_decl, expand_builtin): Replace SVE with RVV.
2023-09-19RISC-V: Add builtin .def file dependenciesTsukasa OI1-1/+3
riscv-builtins.cc includes riscv-cmo.def and riscv-scalar-crypto.def (making dependencies) but their dependencies must be explicitly defined at the configuration file, t-riscv. They were the last two .def files without correct dependency information. gcc/ChangeLog: * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc, riscv-cmo.def and riscv-scalar-crypto.def.
2023-09-19Daily bump.GCC Administrator7-1/+418
2023-09-19RISC-V: Support VLS mode for vec_setPan Li24-2/+582
This patch would like to add the VLS support vec_set, both INT and FP are included. Give sample code as below: typedef long long vl_t \ __attribute__((vector_size(2 * sizeof (long long)))); vl_t init_vl (vl_t v, unsigned index, unsigned value) { v[index] = value; return v; } Before this patch: init_vl: addi sp,sp,-16 vsetivli zero,2,e64,m1,ta,ma vle64.v v1,0(a1) vse64.v v1,0(sp) slli a4,a2,32 srli a2,a4,29 add a2,sp,a2 slli a3,a3,32 srli a3,a3,32 sd a3,0(a2) vle64.v v1,0(sp) vse64.v v1,0(a0) addi sp,sp,16 jr ra After this patch: init_vl: vsetivli zero,2,e64,m1,ta,ma vle64.v v1,0(a1) slli a3,a3,32 srli a3,a3,32 addi a5,a2,1 vsetvli zero,a5,e64,m1,tu,ma vmv.v.x v2,a3 vslideup.vx v1,v2,a2 vsetivli zero,2,e64,m1,ta,ma vse64.v v1,0(a0) ret Please note this patch depends the RVV SCALAR_MOVE_MERGED_OP bugfix. gcc/ChangeLog: * config/riscv/autovec.md: Extend to vls mode. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: New macros. * gcc.target/riscv/rvv/autovec/vls/vec-set-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-10.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-11.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-12.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-13.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-14.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-15.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-16.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-17.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-18.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-19.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-20.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-21.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-22.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-6.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-7.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-8.c: New test. * gcc.target/riscv/rvv/autovec/vls/vec-set-9.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2023-09-19RISC-V: Bugfix for scalar move with merged operandPan Li3-2/+35
Given below example for VLS mode void test (vl_t *u) { vl_t t; long long *p = (long long *)&t; p[0] = p[1] = 2; *u = t; } The vec_set will simplify the insn to vmv.s.x when index is 0, without merged operand. That will result in some problems in DCE, aka: 1: 137[DI] = a0 2: 138[V2DI] = 134[V2DI] // deleted by DCE 3: 139[DI] = #2 // deleted by DCE 4: 140[DI] = #2 // deleted by DCE 5: 141[V2DI] = vec_dup:V2DI (139[DI]) // deleted by DCE 6: 138[V2DI] = vslideup_imm (138[V2DI], 141[V2DI], 1) // deleted by DCE 7: 135[V2DI] = 138[V2DI] // deleted by DCE 8: 142[V2DI] = 135[V2DI] // deleted by DCE 9: 143[DI] = #2 10: 142[V2DI] = vec_dup:V2DI (143[DI]) 11: (137[DI]) = 142[V2DI] The higher 64 bits of 142[V2DI] is unknown here and it generated incorrect code when store back to memory. This patch would like to fix this issue by adding a new SCALAR_MOVE_MERGED_OP for vec_set. Please note this patch doesn't enable VLS for vec_set, the underlying patches will support this soon. gcc/ChangeLog: * config/riscv/autovec.md: Bugfix. * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/scalar-move-merged-run-1.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2023-09-18MATCH: Make zero_one_valued_p non-recursive fullyAndrew Pinski2-1/+17
So it turns out VN can't handle any kind of recursion for match. In this case we have `b = a & -1` and we try to match a as being zero_one_valued_p and VN returns b as being the value and we just go into an infinite loop at this point. OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions. Note genmatch should warn (or error out) if this gets detected so I filed PR 111446 which I will be looking into next week or the week after so we don't run into this issue again. PR tree-optimization/111442 gcc/ChangeLog: * match.pd (zero_one_valued_p): Have the bit_and match not be recursive. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr111442-1.c: New test.
2023-09-18MATCH: Avoid recursive zero_one_valued_p for conversionsAndrew Pinski2-1/+25
So when VN finds a name which has a nop conversion, it says both names are equivalent to each other and the valuaization function for one will return the other. This normally does not cause any issues as there is no recursive matches. But after r14-4038-gb975c0dc3be285, there was one added. So we would do an infinite recursion on the match and never finish. This fixes the issue (and adds a comment in match.pd) by for converts just handle one level instead of being recursive always. OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions. Note the testcase was reduced from tree-ssa-loop-niter.cc and then changed slightly into C rather than C++ but it still needs exceptions turned on get the IR that VN would produce this equivalence relationship going on. Also had to turn off early inline to force put to be inlined later. PR tree-optimization/111435 gcc/ChangeLog: * match.pd (zero_one_valued_p): Don't do recursion on converts. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr111435-1.c: New test.
2023-09-18c++: optimize unifying nested templated classes [PR89231]Patrick Palka2-6/+31
Since the LHS of a qualified-id is a non-deduced context, it effectively means we can't deduce from outer template arguments of a class template specialization. And checking for equality between the TI_TEMPLATE of a class specialization parm/arg already implies that the outer template arguments are the same. Hence recursing into outer template arguments during unification of class specializations is redundant, so this patch makes unify recurse only into innermost arguments. This incidentally fixes the testcase from PR89231 because there more_specialized_partial_inst wrongly considers the two partial specializations to be unordered ultimately because unify for identical parm=arg=A<Ps...>::Collect<N...> gets confused when it recurses into parm=arg={Ps...} since Ps is outside the (innermost) level of tparms that we're actually deducing. PR c++/89231 gcc/cp/ChangeLog: * pt.cc (try_class_unification): Strengthen TI_TEMPLATE equality test by not calling most_general_template. Only unify the innermost levels of template arguments. (unify) <case CLASS_TYPE>: Only unify the innermost levels of template arguments, and only if the template is primary. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/variadic-partial3.C: New test.
2023-09-18c++: non-dependent assignment checking [PR63198, PR18474]Patrick Palka15-47/+100
This patch makes us recognize and check non-dependent simple assigments ahead of time, like we already do for compound assignments. This means the templated representation of such assignments will now usually have an implicit INDIRECT_REF (due to the reference return type), which the -Wparentheses code needs to handle. As a drive-by improvement, this patch also makes maybe_convert_cond issue -Wparentheses warnings ahead of time, and removes a seemingly unnecessary suppress_warning call in build_x_modify_expr. On the libstdc++ side, some tests were attempting to modify a data member from a uninstantiated const member function, which this patch minimally fixes by making the data member mutable. PR c++/63198 PR c++/18474 gcc/cp/ChangeLog: * semantics.cc (maybe_convert_cond): Look through implicit INDIRECT_REF when deciding whether to issue a -Wparentheses warning, and consider templated assignment expressions as well. (finish_parenthesized_expr): Look through implicit INDIRECT_REF when suppressing -Wparentheses warning. * typeck.cc (build_x_modify_expr): Check simple assignments ahead time too, not just compound assignments. Give the second operand of MODOP_EXPR a non-null type so that it's not considered always instantiation-dependent. Don't call suppress_warning. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/static_assert15.C: Expect diagnostic for non-constant static_assert condition. * g++.dg/expr/unary2.C: Remove xfails. * g++.dg/template/init7.C: Make initializer type-dependent to preserve intent of test. * g++.dg/template/recurse3.C: Likewise for the erroneous statement. * g++.dg/template/non-dependent26.C: New test. * g++.dg/warn/Wparentheses-32.C: New test. libstdc++-v3/ChangeLog: * testsuite/26_numerics/random/discard_block_engine/cons/seed_seq2.cc: Make data member seed_seq::called mutable. * testsuite/26_numerics/random/independent_bits_engine/cons/seed_seq2.cc: Likewise. * testsuite/26_numerics/random/linear_congruential_engine/cons/seed_seq2.cc: Likewise. * testsuite/26_numerics/random/mersenne_twister_engine/cons/seed_seq2.cc: Likewise. * testsuite/26_numerics/random/shuffle_order_engine/cons/seed_seq2.cc: Likewise. * testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed_seq2.cc: Likewise. * testsuite/ext/random/simd_fast_mersenne_twister_engine/cons/seed_seq2.cc: Likewise.
2023-09-18c++: unifying identical tmpls from current inst [PR108347]Patrick Palka2-6/+21
Here more_specialized_partial_spec wrongly considers the two partial specializations to be unordered ultimately because unify for identical parm=arg=A<T>::C returns failure due to C being dependent. This patch fixes this by relaxing unify's early-exit identity test to also accept dependent decls; we can't deduce anything further from them anyway. In passing this patch removes the CONST_DECL case of unify: we should never see the CONST_DECL version of a template parameter here, and for other CONST_DECLs (such as enumerators) it seems we can rely on them to already have been folded to their DECL_INITIAL. PR c++/108347 gcc/cp/ChangeLog: * pt.cc (unify): Return unify_success for identical dependent DECL_P 'arg' and 'parm'. <case CONST_DECL>: Remove handling. gcc/testsuite/ChangeLog: * g++.dg/template/ttp41.C: New test.
2023-09-18c++: always check arity before deductionPatrick Palka7-18/+58
This simple patch extends the r12-3271-gf1e73199569287 optimization to happen for deduction without explicit template arguments as well. The motivation for this is to accept testcases such as conv20.C and ttp40.C below, which don't use explicit template arguments but for which unnecessary template instantiation during deduction could be avoided if we uniformly pruned overloads according to arity early. This incidentally causes us to accept one reduced testcase from PR c++/84075, but the underlying issue there remains at large. As a nice side effect, this change causes the "candidate expects N argument(s)" note during overload resolution failure to point to the template candidate instead of the call site, which seems like an improvement along the lines of r14-309-g14e881eb030509. gcc/cp/ChangeLog: * call.cc (add_template_candidate_real): Check arity even when there are no explicit template arguments. Combine the two adjacent '!obj' tests into one. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/vt-57397-1.C: Expect "candidate expects ... N argument(s)" at the declaration site instead of the call site. * g++.dg/cpp0x/vt-57397-2.C: Likewise. * g++.dg/overload/template5.C: Likewise. * g++.dg/template/local6.C: Likewise. * g++.dg/template/conv20.C: New test. * g++.dg/template/ttp40.C: New test.
2023-09-18Darwin,debug : Switch to DWARF 3 or 4 when dsymutil supports it.Iain Sandoe2-4/+40
The main reason that Darwin has been using DWARF2 only as debug is that earlier debug linkers (dsymutil) did not support any extensions to this so that the default "non-strict" mode used in GCC would cause tool errors. There are two sources for dsymutil, those based off a closed source base "dwarfutils" and those based off LLVM. For dsymutil versions based off LLVM-7+ we can use up to DWARF-4, and for versions based on dwarfutils 121+ we can use DWARF-3. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ChangeLog: * config/darwin-protos.h (enum darwin_external_toolchain): New. * config/darwin.cc (DSYMUTIL_VERSION): New. (darwin_override_options): Choose the default debug DWARF version depending on the configured dsymutil version.
2023-09-18configure, Darwin: Adjust handing of stdlib option.Iain Sandoe2-19/+64
The intent of the configuration choices for -stdlib is that default setting should choose reasonable options for the target. This should enable -stdlib= for Darwin targets where libc++ is the default on the system (so that it is only necessary to provide the headers). However, it seems that there are some cases where (external) config scripts are using -stdlib (incorrectly) to determine if the compiler in use is GCC or clang. In order to allow for these cases, this patch refines the setting like so: --with-gxx-libcxx-include-dir= is used to configure the path containing libc++ headers; it also controls the enabling of the -stdlib option. We are adding a special value for path: if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option. Otherwise if the --with-gxx-libcxx-include-dir is set we use the path provided, and enable the stdlib option. if --with-gxx-libcxx-include-dir is unset We decide on the stdlib option based on the OS type and revision being targeted. The path is set to a fixed position relative to the compiler install (similar logic to that used for libstdc++ headers). Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ChangeLog: * configure: Regenerate. * configure.ac: Handle explict disable of stdlib option, set defaults for Darwin.
2023-09-18c++: optimize tsubst_template_decl for function templatesPatrick Palka2-21/+11
r14-2655-g92d1425ca78040 made instantiate_template avoid redundantly performing a specialization lookup when calling tsubst_decl. This patch applies the same optimization to the analagous tsubst_template_decl when (partially) instantiating a function template. This allows us to remove an early exit test from register_specialization since we no longer try to register the FUNCTION_DECL corresponding to a function template partial instantiation. gcc/cp/ChangeLog: * pt.cc (register_specialization): Remove now-unnecessary early exit for FUNCTION_DECL partial instantiation. (tsubst_template_decl): Pass use_spec_table=false to tsubst_function_decl. Set DECL_TI_ARGS of a non-lambda FUNCTION_DECL specialization to the full set of arguments. Simplify register_specialization call accordingly. gcc/testsuite/ChangeLog: * g++.dg/template/nontype12.C: Expect two instead of three duplicate diagnostics for A<double>::bar() specialization.
2023-09-18MATCH: Add simplifications of `(a == CST) & a`Andrew Pinski8-6/+99
`(a == CST) & a` can be either simplified to simplying `a == CST` or 0 depending on the first bit of the CST. This is an extension of the already pattern of `X & !X` and allows us to remove the 2 xfails on gcc.dg/binop-notand1a.c and gcc.dg/binop-notand4a.c. OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions. PR tree-optimization/111431 gcc/ChangeLog: * match.pd (`(a == CST) & a`): New pattern. gcc/testsuite/ChangeLog: * gcc.dg/binop-notand1a.c: Remove xfail. * gcc.dg/binop-notand4a.c: Likewise. * gcc.c-torture/execute/pr111431-1.c: New test. * gcc.dg/binop-andeq1.c: New test. * gcc.dg/binop-andeq2.c: New test. * gcc.dg/binop-notand7.c: New test. * gcc.dg/binop-notand7a.c: New test.
2023-09-18Move 'g++.dg/abi/nvptx-[...].C' -> 'g++.target/nvptx/abi-[...].C'Thomas Schwinge2-2/+2
... instead of burying these nvptx-specific test cases within the generic ones. gcc/testsuite/ * g++.dg/abi/nvptx-nrv1.C: Move... * g++.target/nvptx/abi-nrv1.C: ... here. * g++.dg/abi/nvptx-ptrmem1.C: Move... * g++.target/nvptx/abi-ptrmem1.C: ... here.
2023-09-18Add 'g++.target/nvptx/nvptx.exp' for nvptx-specific C++ test casesThomas Schwinge1-0/+56
Like 'gcc.target/nvptx/nvptx.exp' is modeled after 'gcc.dg/dg.exp', this new 'g++.target/nvptx/nvptx.exp' is modeled after 'g++.dg/dg.exp'. gcc/testsuite/ * g++.target/nvptx/nvptx.exp: New.
2023-09-18Fix up 'g++.dg/abi/nvptx-ptrmem1.C'Thomas Schwinge1-2/+2
..., which shortly after its inception in commit 44eba92d0a0594bda5b53fcb3c8f84f164c653b6 (Subversion r231628) "[PTX] parameters and return values" was forgotten to be updated in next day's commit 1f0659546bcf5b95c3263cdc73149f6c2a05ebe1 (Subversion r231663) "[PTX] more register cleanups". Fix it up now, as obvious, for the current state of things. gcc/testsuite/ * g++.dg/abi/nvptx-ptrmem1.C: Fix up.
2023-09-18libstdc++: Minor tweak to C++20 status docsJonathan Wakely2-2/+2
The row for P1466R3 was missing the info on when it was implemented. libstdc++-v3/ChangeLog: * doc/xml/manual/status_cxx2020.xml: Tweak P1466R3 status. * doc/html/manual/status.html: Regenerate.
2023-09-18libstdc++: Update C++20 and C++23 status docsJonathan Wakely5-64/+717
libstdc++-v3/ChangeLog: * doc/xml/manual/configure.xml: Use conventional option name. * doc/xml/manual/status_cxx2020.xml: Update. * doc/xml/manual/status_cxx2023.xml: Update. * doc/html/*: Regenerate.
2023-09-18RISC-V: Remove redundant vec_duplicate patternJuzhe-Zhong3-19/+7
Currently, VLS and VLA patterns are different. VLA is define_expand VLS is define_insn_and_split It makes no sense that they are different pattern format. Merge them into same pattern (define_insn_and_split). It can also be helpful for the future vv -> vx fwprop optimization. gcc/ChangeLog: * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests. * config/riscv/vector.md (@vec_duplicate<mode>): Remove. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr111313.c: Adapt test.
2023-09-18RISC-V: Fix bogus FAILs of vsetvl testcasesJuzhe-Zhong7-10/+10
Due the the global codes change which change the CFG cause bogus vsetvl checking FAILs. Adapt testcases for the global codes change. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/avl_single-21.c: Adapt test. * gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Ditto. * gcc.target/riscv/rvv/vsetvl/avl_single-39.c: Ditto. * gcc.target/riscv/rvv/vsetvl/avl_single-41.c: Ditto. * gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Ditto.
2023-09-18RISC-V: Removed misleading comments in testcasesLehua Ding2-2/+0
This patch removed the misleading comments in testcases since we support fold min(int, poly) to constant by this patch (https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629651.html). Thereby the csrr will not appear inside the assembly code, even if there is no support for some VLS vector patterns. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/div-1.c: Removed comments. * gcc.target/riscv/rvv/autovec/vls/shift-3.c: Ditto.
2023-09-18AArch64: Improve immediate expansion [PR105928]Wilco Dijkstra4-14/+77
Support immediate expansion of immediates which can be created from 2 MOVKs and a shifted ORR or BIC instruction. Change aarch64_split_dimode_const_store to apply if we save one instruction. This reduces the number of 4-instruction immediates in SPECINT/FP by 5%. gcc/ChangeLog: PR target/105928 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate) Add support for immediates using shifted ORR/BIC. (aarch64_split_dimode_const_store): Apply if we save one instruction. * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3): Make pattern global. gcc/testsuite: PR target/105928 * gcc.target/aarch64/pr105928.c: Add new test. * gcc.target/aarch64/vect-cse-codegen.c: Fix test.
2023-09-18AArch64: List official cores before codenamesWilco Dijkstra2-4/+4
List official cores first so that -mcpu=native does not show a codename with -v or in errors/warnings. gcc/ChangeLog: * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares. (neoverse-v1): Place before zeus. (neoverse-v2): Place before demeter. * config/aarch64/aarch64-tune.md: Regenerate.
2023-09-18RISC-V: Add fixed PR111255 testcase by other patchLehua Ding1-0/+24
This patch add the missed PR111255 testcase which is fixed by this committed patch (https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628922.html). PR target/111255 gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/pr111255.c: New test.
2023-09-18RISC-V: Support VLS reductionJuzhe-Zhong3-14/+94
Notice previous VLS reduction patch is missing some codes which cause multiple ICE: FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-runu.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-1.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredsum\\.vs 22 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-10.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmax\\.vs 9 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-10.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmaxu\\.vs 9 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-10.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmin\\.vs 9 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-10.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredminu\\.vs 9 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-11.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmax\\.vs 8 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-11.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmaxu\\.vs 8 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-11.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmin\\.vs 8 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-11.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredminu\\.vs 8 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-12.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredmax\\.vs 10 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-12.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredmin\\.vs 10 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-13.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredmax\\.vs 9 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-13.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredmin\\.vs 9 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-14.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredmax\\.vs 8 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-14.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredmin\\.vs 8 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-15.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredand\\.vs 22 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-15.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredor\\.vs 22 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-15.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredxor\\.vs 22 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-16.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredand\\.vs 20 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-16.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredor\\.vs 20 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-16.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredxor\\.vs 20 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-17.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredand\\.vs 18 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-17.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredor\\.vs 18 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-17.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredxor\\.vs 18 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-18.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredand\\.vs 16 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-18.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredor\\.vs 16 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-18.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredxor\\.vs 16 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-19.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-19.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-2.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredsum\\.vs 20 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-20.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-20.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-21.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable (internal compiler error: in code_for_pred, at ./insn-opinit.h:1560) FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-21.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-3.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredsum\\.vs 18 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-4.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredsum\\.vs 16 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-5.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredusum\\.vs 10 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-6.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredusum\\.vs 9 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-7.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vfredusum\\.vs 8 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-8.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmax\\.vs 11 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-8.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmaxu\\.vs 11 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-8.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmin\\.vs 11 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-8.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredminu\\.vs 11 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-9.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmax\\.vs 10 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-9.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmaxu\\.vs 10 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-9.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredmin\\.vs 10 FAIL: gcc.target/riscv/rvv/autovec/vls/reduc-9.c -O3 -ftree-vectorize --param riscv-autovec-preference=scalable scan-assembler-times vredminu\\.vs 10 Committed. gcc/ChangeLog: * config/riscv/autovec.md: Add VLS modes. * config/riscv/vector-iterators.md: Ditto. * config/riscv/vector.md: Ditto.
2023-09-18libstdc++: Minor update to installation docsJonathan Wakely3-15/+42
libstdc++-v3/ChangeLog: * doc/xml/manual/intro.xml: Clarify that building libstdc++ separately from GCC is not supported. * doc/xml/manual/prerequisites.xml: Note msgfmt prerequisite for testing. * doc/html/manual/setup.html: Regenerate.
2023-09-18RISC-V: Fix VSETVL PASS fusion bugJuzhe-Zhong2-2/+10
There is an obvious fusion bug that is exposed by more VLS patterns support. After more VLS modes support, it cause following FAILs: FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c execution test FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c execution test FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c execution test FAIL: gcc.target/riscv/rvv/autovec/reduc/reduc_run-2.c execution test Demand 1: SEW = 64, LMUL = 1, RATIO = 64, demand SEW, demand GE_SEW. Demand 2: SEW = 64, LMUL = 2, RATIO = 32, demand SEW, demand GE_SEW, demand RATIO. Before this patch: merge demand: SEW = 64, LMUL = 1, RATIO = 32, demand SEW, demand LMUL, demand GE_SEW. It's obvious incorrect of merge LMUL which should be new LMUL = (demand 2 RATIO * greatest SEW) = M2 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function. * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
2023-09-18MAINTAINERS: Add myself to write after approvalFei Gao1-0/+1
Signed-off-by: Fei Gao <gaofei@eswincomputing.com> ChangeLog: * MAINTAINERS: Add myself.
2023-09-18tree-optimization/111294 - backwards threader PHI costingRichard Biener10-68/+56
This revives an earlier patch since the problematic code applying extra costs to PHIs in copied blocks we couldn't make any sense of prevents a required threading in this case. Instead of coming up with an artificial other costing the following simply removes the bits. As with all threading changes this requires a plethora of testsuite adjustments, but only the last three are unfortunate as is the libgomp team.c adjustment which is required to avoid a bogus -Werror diagnostic during bootstrap. PR tree-optimization/111294 gcc/ * tree-ssa-threadbackward.cc (back_threader_profitability::m_name): Remove (back_threader::find_paths_to_names): Adjust. (back_threader::maybe_thread_block): Likewise. (back_threader_profitability::possibly_profitable_path_p): Remove code applying extra costs to copies PHIs. libgomp/ * team.c (gomp_team_start): Assert alloca size to avoid false positive alloc-size diagnostic. gcc/testsuite/ * gcc.dg/tree-ssa/pr111294.c: New test. * gcc.dg/tree-ssa/phi_on_compare-4.c: Adjust. * gcc.dg/tree-ssa/pr59597.c: Likewise. * gcc.dg/tree-ssa/pr61839_2.c: Likewise. * gcc.dg/tree-ssa/ssa-sink-18.c: Likewise. * g++.dg/warn/Wstringop-overflow-4.C: XFAIL subtest on ilp32. * gcc.dg/uninit-pred-9_b.c: XFAIL subtest everywhere. * gcc.dg/vect/vect-117.c: Make scan for not Invalid sum conditional on lp64.
2023-09-18RISC-V: Support VLS modes vec_init auto-vectorizationJuzhe-Zhong19-35/+3353
There are multiple SLP dump FAILs in vect testsuite. After analysis, confirm we are missing vec_init for VLS modes. This patch is not sufficient to fix those FAILs (We need more VLS patterns will send them soon). This patch is the prerequsite patch for fixing those SLP FAILs. Finish the whole regression. Ok for trunk ? gcc/ChangeLog: * config/riscv/autovec.md: Extend VLS modes. * config/riscv/vector.md: Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS vec_init tests. * gcc.target/riscv/rvv/autovec/vls/init-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/init-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/init-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/init-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/init-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/init-6.c: New test. * gcc.target/riscv/rvv/autovec/vls/init-7.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-6.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-7.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-8.c: New test. * gcc.target/riscv/rvv/autovec/vls/repeat-9.c: New test.
2023-09-18RISC-V: Remove autovec-vls.md file and clean up VLS move modes[NFC]Juzhe-Zhong2-198/+170
We have largely supportted VLS modes. Only move patterns of VLS modes are different from VLS patterns. The rest of them are the same. We always extend the current VLA patterns with VLSmodes: VI --> V_VLSI VF --> V_VLSF It makes no sense to have a separate file holding a very few VLS patterns that can not be extended from the current VLA patterns. So remove autovec-vls.md gcc/ChangeLog: * config/riscv/vector.md (mov<mode>): New pattern. (*mov<mode>_mem_to_mem): Ditto. (*mov<mode>): Ditto. (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto. (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto. (*mov<mode>_vls): Ditto. (movmisalign<mode>): Ditto. (@vec_duplicate<mode>): Ditto. * config/riscv/autovec-vls.md: Removed.
2023-09-18RISC-V: Support VLS modes reduction[PR111153]Juzhe-Zhong23-1/+825
This patch supports VLS reduction vectorization. It can optimize the current reduction vectorization codegen with current COST model. TYPE __attribute__ ((noinline, noclone)) \ reduc_plus_##TYPE (TYPE * __restrict a, int n) \ { \ TYPE r = 0; \ for (int i = 0; i < n; ++i) \ r += a[i]; \ return r; \ } T (int32_t) \ TEST_PLUS (DEF_REDUC_PLUS) Before this patch: vle32.v v2,0(a5) addi a5,a5,16 vadd.vv v1,v1,v2 bne a5,a4,.L4 lui a4,%hi(.LC0) lui a5,%hi(.LC1) addi a4,a4,%lo(.LC0) vlm.v v0,0(a4) addi a5,a5,%lo(.LC1) andi a1,a1,-4 vmv1r.v v2,v3 vlm.v v4,0(a5) vcompress.vm v2,v1,v0 vmv1r.v v0,v4 vadd.vv v1,v2,v1 vcompress.vm v3,v1,v0 vadd.vv v3,v3,v1 vmv.x.s a0,v3 sext.w a0,a0 beq a3,a1,.L12 After this patch: vle32.v v2,0(a5) addi a5,a5,16 vadd.vv v1,v1,v2 bne a5,a4,.L4 li a5,0 andi a1,a1,-4 vmv.s.x v2,a5 vredsum.vs v1,v1,v2 vmv.x.s a0,v1 beq a3,a1,.L12 PR target/111153 gcc/ChangeLog: * config/riscv/autovec.md: Add VLS modes. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS mode reduction case. * gcc.target/riscv/rvv/autovec/vls/reduc-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-10.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-11.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-12.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-13.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-14.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-15.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-16.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-17.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-18.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-19.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-20.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-21.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-6.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-7.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-8.c: New test. * gcc.target/riscv/rvv/autovec/vls/reduc-9.c: New test.
2023-09-17doc: GTY((cache)) documentation tweakJason Merrill1-0/+7
gcc/ChangeLog: * doc/gty.texi: Add discussion of cache vs. deletable.
2023-09-17c++: overlapping subobjects tweakJason Merrill1-1/+1
The ABI is settling on "similar" for this rule. gcc/cp/ChangeLog: * class.cc (check_subobject_offset): Use similar_type_p.
2023-09-18RISC-V: Remove redundant codes of VLS patterns[NFC]Juzhe-Zhong2-160/+22
Consider those VLS patterns are the same VLA patterns. Now extend VI -> V_VLSI and VF -> V_VLSF. Then remove the redundant codes of VLS patterns. gcc/ChangeLog: * config/riscv/autovec-vls.md (<optab><mode>3): Deleted. (copysign<mode>3): Ditto. (xorsign<mode>3): Ditto. (<optab><mode>2): Ditto. * config/riscv/autovec.md: Extend VLS modes.
2023-09-18use local range for one more pattern in match.pdJiufu Guo2-2/+17
For "get_global_range_query" SSA_NAME_RANGE_INFO can be queried. For "get_range_query", it could get more context-aware range info. And look at the implementation of "get_range_query", it returns global range if no local fun info. ATTRIBUTE_RETURNS_NONNULL inline range_query * get_range_query (const struct function *fun) { return (fun && fun->x_range_query) ? fun->x_range_query : &global_ranges; } So, using "get_range_query" would cover more case. For example, the test case of "pr111303.c". PR middle-end/111303 gcc/ChangeLog: * match.pd ((t * 2) / 2): Update pattern. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/pr111303.c: New test.
2023-09-18Daily bump.GCC Administrator3-1/+13
2023-09-17Remove xfail from gcc.dg/tree-ssa/20040204-1.cAndrew Pinski1-5/+1
So the xfail was there because at one point the difference from having logical-op-non-short-circuit set to 1 or 0 made a difference in being able to optimizing a conditional way. This has not been true for over 10 years in this case so instead of keeping on adding to the xfail list, removing it is the right thing to do. Committed as obvious after a test on x86_64-linux-gnu. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/20040204-1.c: Remove xfail.
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