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2018-08-03Add fix-it hint for missing return statement in assignment operators (PR ↵David Malcolm4-2/+134
c++/85523) gcc/cp/ChangeLog: PR c++/85523 * decl.c: Include "gcc-rich-location.h". (add_return_star_this_fixit): New function. (finish_function): When warning about missing return statements in functions returning non-void, add a "return *this;" fix-it hint for assignment operators. gcc/testsuite/ChangeLog: PR c++/85523 * g++.dg/pr85523.C: New test. Co-Authored-By: Jonathan Wakely <jwakely@redhat.com> From-SVN: r263298
2018-08-03re PR target/86795 (mn10300 port needs updating for CVE-2017-5753)Jeff Law2-0/+9
PR target/86795 * config/mn10300/mn10300.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263296
2018-08-03docs: fix stray duplicated wordsDavid Malcolm3-8/+21
gcc/ChangeLog: * doc/gcov.texi (-x): Remove duplicate "to". * doc/invoke.texi (-Wnoexcept-type): Remove duplicate "calls". (-Wif-not-aligned): Remove duplicate "is". (-flto): Remove duplicate "the". (MicroBlaze Options): In examples of "-mcpu=cpu-type", remove duplicate "v5.00.b". (MSP430 Options): Remove duplicate "and" from the description of "-mgprel-sec=regexp". (x86 Options): Remove duplicate copies of "vmldLog102" and vmlsLog104 from description of "-mveclibabi=type". From-SVN: r263295
2018-08-03Avoid infinite loop with duplicate anonymous union fields (PR c/86690).Bogdan Harjoc4-2/+39
If a struct contains an anonymous union and both have a field with the same name, detect_field_duplicates_hash() will replace one of them with NULL. If compilation doesn't stop immediately, it may later call lookup_field() on the union, which falsely assumes the union's LANG_SPECIFIC array is sorted, and may loop indefinitely because of this. 2018-08-03 Bogdan Harjoc <harjoc@gmail.com> PR c/86690 gcc/c: * c-typeck.c (lookup_field): Do not use TYPE_LANG_SPECIFIC after errors. gcc/testsuite: * gcc.dg/union-duplicate-field.c: New test. From-SVN: r263294
2018-08-03re PR c++/86706 (ICE in build_base_path, at cp/class.c:294)Jason Merrill4-8/+37
PR c++/86706 * class.c (build_base_path): Use currently_open_class. * g++.dg/template/pr86706.C: New test. From-SVN: r263293
2018-08-03ChangeLog: Move entry ...Uros Bizjak2-6/+6
* ChangeLog: Move entry ... * cp/ChangeLog: ... here. From-SVN: r263292
2018-08-03[Ada] Partially revert "Makefile patches from initial RISC-V cross/native ↵Pierre-Marie de Rodat3-6/+15
build." This partially reverts r262482, at it broke canadian builds. 2018-08-03 Pierre-Marie de Rodat <derodat@adacore.com> gcc/ada/ Reverts 2018-07-06 Jim Wilson <jimw@sifive.com> * Make-generated.in (treeprs.ads): Use $(GNATMAKE) instead of gnatmake. (einfo.h, sinfo.h, stamp-snames, stamp-nmake): Likewise. * gcc-interface/Makefile.in (xoscons): Likewise. From-SVN: r263291
2018-08-03Handle SLP of call pattern statementsRichard Sandiford9-65/+152
We couldn't vectorise: for (int j = 0; j < n; ++j) { for (int i = 0; i < 16; ++i) a[i] = (b[i] + c[i]) >> 1; a += step; b += step; c += step; } at -O3 because cunrolli unrolled the inner loop and SLP couldn't handle AVG_FLOOR patterns (see also PR86504). The problem was some overly strict checking of pattern statements compared to normal statements in vect_get_and_check_slp_defs: switch (gimple_code (def_stmt)) { case GIMPLE_PHI: case GIMPLE_ASSIGN: break; default: if (dump_enabled_p ()) dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, "unsupported defining stmt:\n"); return -1; } The easy fix would have been to add GIMPLE_CALL to the switch, but I don't think the switch is doing anything useful. We only create pattern statements that the rest of the vectoriser can handle, and the other checks in this function and elsewhere check whether SLP is possible. I'm also not sure why: if (!first && !oprnd_info->first_pattern /* Allow different pattern state for the defs of the first stmt in reduction chains. */ && (oprnd_info->first_dt != vect_reduction_def is necessary. All that should matter is that the statements in the node are "similar enough". It turned out to be quite hard to find a convincing example that used a mixture of pattern and non-pattern statements, so bb-slp-pow-1.c is the best I could come up with. But it does show that the combination of "xi * xi" statements and "pow (xj, 2) -> xj * xj" patterns are handled correctly. The patch therefore just removes the whole if block. The loop also needed commutative swapping to be extended to at least AVG_FLOOR. This gives +3.9% on 525.x264_r at -O3. 2018-08-03 Richard Sandiford <richard.sandiford@arm.com> gcc/ * internal-fn.h (first_commutative_argument): Declare. * internal-fn.c (first_commutative_argument): New function. * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove extra restrictions for pattern statements. Use first_commutative_argument to look for commutative operands in calls to internal functions. gcc/testsuite/ * gcc.dg/vect/bb-slp-over-widen-1.c: Expect AVG_FLOOR to be used on vect_avg_qi targets. * gcc.dg/vect/bb-slp-over-widen-2.c: Likewise. * gcc.dg/vect/bb-slp-pow-1.c: New test. * gcc.dg/vect/vect-avg-15.c: Likewise. From-SVN: r263290
2018-08-03Add workaround for non-unique errno values on AIXJonathan Wakely3-1/+47
* src/c++11/system_error.cc (system_error_category::default_error_condition): Add workaround for ENOTEMPTY and EEXIST having the same value on AIX. * testsuite/19_diagnostics/error_category/system_category.cc: Add extra testcases for EDOM, EILSEQ, ERANGE, EEXIST and ENOTEMPTY. From-SVN: r263289
2018-08-03Makefile.in (wide-int-range.o): New.Aldy Hernandez6-682/+737
* Makefile.in (wide-int-range.o): New. * tree-vrp.c: Move all the wide_int_* functions to... * wide-int-range.cc: ...here. * tree-vrp.h: Move all the wide_int_* prototypes to... * wide-int-range.h: ...here. From-SVN: r263288
2018-08-03[c++] Don't emit exception tables for UI_NONETom de Vries4-5/+11
If a target does not support exceptions, it can indicate this by returning UI_NONE in TARGET_EXCEPT_UNWIND_INFO. Currently the compiler still emits exception tables for such a target. This patch makes sure that no exception tables are emitted if the target does not support exceptions. This allows us to remove a workaround in TARGET_ASM_BYTE_OP in the nvptx port. Build on x86_64 with nvptx accelerator, and tested libgomp. Build and reg-tested on x86_64. 2018-08-03 Tom de Vries <tdevries@suse.de> * common/config/nvptx/nvptx-common.c (nvptx_except_unwind_info): Return UI_NONE. * config/nvptx/nvptx.c (TARGET_ASM_BYTE_OP): Remove define. * except.c (output_function_exception_table): Do early exit if targetm_common.except_unwind_info (&global_options) == UI_NONE. From-SVN: r263287
2018-08-03Print heuristics probability fraction part with 2 digits.Martin Liska11-18/+34
2018-08-03 Martin Liska <mliska@suse.cz> * predict.c (dump_prediction): Change to 2 digits in fraction part. 2018-08-03 Martin Liska <mliska@suse.cz> * gcc.dg/predict-1.c: Adjust scanned pattern to cover 2 digits. * gcc.dg/predict-13.c:Likewise. * gcc.dg/predict-3.c:Likewise. * gcc.dg/predict-4.c:Likewise. * gcc.dg/predict-5.c:Likewise. * gcc.dg/predict-6.c:Likewise. * gcc.dg/predict-9.c:Likewise. * gfortran.dg/predict-1.f90:Likewise. From-SVN: r263286
2018-08-03[aarch64] Fix falkor pipeline description for dup<q>Siddhesh Poyarekar2-1/+13
There was a typo in the pipeline description where DUP was assigned to the vector pipes for quad mode ops when it really only uses the VTOG pipes. Fixing this does not show any noticeable difference in performance (there's a very small bump of 1.7% in x264 but that's about it) in my tests but is the more precise description of operations for falkor. * config/aarch64/falkor.md (falkor_am_1_vxvy_vxvy): Move neon_dup_q to... (falkor_am_1_gtov_gtov): ... a new insn reservation. From-SVN: r263285
2018-08-03Daily bump.GCC Administrator1-1/+1
From-SVN: r263284
2018-08-02nds32.c (nds32_hard_regno_mode_ok): Replace > with >=.Ilya Leoshkevich6-5/+13
* config/nds32/nds32.c (nds32_hard_regno_mode_ok): Replace > with >=. * df-problems.c (df_remove_dead_eq_notes): Replace > with >=. * dwarf2out.c (mem_loc_descriptor): Replace > with >=. * lra-constraints.c (spill_hard_reg_in_range): Replace <= with <. * lra-remat.c (call_used_input_regno_present_p): Replace <= with <. From-SVN: r263280
2018-08-02Fix memory leak of pretty_printer prefixesDavid Malcolm8-20/+67
We were rather sloppy about handling the ownership of prefixes for pretty_printer, and this lead to a memory leak for any time a diagnostic_show_locus call emits multiple line spans. This showed up in "make selftest-valgrind" as: 3,976 bytes in 28 blocks are definitely lost in loss record 632 of 669 at 0x4A0645D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so) by 0x1F08227: xmalloc (xmalloc.c:147) by 0x1F083E6: xvasprintf (xvasprintf.c:58) by 0x1E7EC7D: build_message_string(char const*, ...) (diagnostic.c:78) by 0x1E7F438: diagnostic_get_location_text(diagnostic_context*, expanded_location) (diagnostic.c:328) by 0x1E7FD54: default_diagnostic_start_span_fn(diagnostic_context*, expanded_location) (diagnostic.c:626) by 0x1EB3508: selftest::test_diagnostic_context::start_span_cb(diagnostic_context*, expanded_location) (selftest-diagnostic.c:57) by 0x1E89215: diagnostic_show_locus(diagnostic_context*, rich_location*, diagnostic_t) (diagnostic-show-locus.c:1992) by 0x1E8ECAD: selftest::test_fixit_insert_containing_newline_2(selftest::line_table_case const&) (diagnostic-show-locus.c:3044) by 0x1EB0606: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3525) by 0x1E8F3F5: selftest::diagnostic_show_locus_c_tests() (diagnostic-show-locus.c:3164) by 0x1E010BF: selftest::run_tests() (selftest-run-tests.c:88) 4,004 bytes in 28 blocks are definitely lost in loss record 633 of 669 at 0x4A0645D: malloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so) by 0x1F08227: xmalloc (xmalloc.c:147) by 0x1F083E6: xvasprintf (xvasprintf.c:58) by 0x1E7EC7D: build_message_string(char const*, ...) (diagnostic.c:78) by 0x1E7F438: diagnostic_get_location_text(diagnostic_context*, expanded_location) (diagnostic.c:328) by 0x1E7FD54: default_diagnostic_start_span_fn(diagnostic_context*, expanded_location) (diagnostic.c:626) by 0x1EB3508: selftest::test_diagnostic_context::start_span_cb(diagnostic_context*, expanded_location) (selftest-diagnostic.c:57) by 0x1E89215: diagnostic_show_locus(diagnostic_context*, rich_location*, diagnostic_t) (diagnostic-show-locus.c:1992) by 0x1E8B373: selftest::test_diagnostic_show_locus_fixit_lines(selftest::line_table_case const&) (diagnostic-show-locus.c:2500) by 0x1EB0606: selftest::for_each_line_table_case(void (*)(selftest::line_table_case const&)) (input.c:3525) by 0x1E8F3B9: selftest::diagnostic_show_locus_c_tests() (diagnostic-show-locus.c:3159) by 0x1E010BF: selftest::run_tests() (selftest-run-tests.c:88) This patch fixes the leaks by ensuring that the pretty_printer "owns" the prefix if it's non-NULL, freeing it in the dtor and in pp_set_prefix. gcc/cp/ChangeLog: * error.c (cxx_print_error_function): Duplicate "file" before passing it to pp_set_prefix. (cp_print_error_function): Use pp_take_prefix when saving the existing prefix. gcc/ChangeLog: * diagnostic-show-locus.c (diagnostic_show_locus): Use pp_take_prefix when saving the existing prefix. * diagnostic.c (diagnostic_append_note): Likewise. * langhooks.c (lhd_print_error_function): Likewise. * pretty-print.c (pp_set_prefix): Drop the "const" from "prefix" param's type. Free the existing prefix. (pp_take_prefix): New function. (pretty_printer::pretty_printer): Drop the prefix parameter. Rename the length parameter to match the comment. (pretty_printer::~pretty_printer): Free the prefix. * pretty-print.h (pretty_printer::pretty_printer): Drop the prefix parameter. (struct pretty_printer): Drop the "const" from "prefix" field's type and clarify memory management. (pp_set_prefix): Drop the "const" from the 2nd param. (pp_take_prefix): New decl. From-SVN: r263275
2018-08-02rs6000-string.c (select_block_compare_mode): Move test for word_mode_ok here ↵Aaron Sawdey2-172/+213
instead of passing as argument. 2018-07-31 Aaron Sawdey <acsawdey@linux.ibm.com> * config/rs6000/rs6000-string.c (select_block_compare_mode): Move test for word_mode_ok here instead of passing as argument. (expand_block_compare): Change select_block_compare_mode() call. (expand_strncmp_gpr_sequence): New function. (expand_strn_compare): Make use of expand_strncmp_gpr_sequence. From-SVN: r263273
2018-08-02re PR target/86790 (m68k port needs updating for CVE-2017-5753)Jeff Law2-0/+7
PR target/86790 * config/m68k/m68k.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263272
2018-08-02[OBVIOUS] Correct name of file in ChangeLogSudakshina Das1-7/+7
Committed on behalf of Matthew Malcomson. From-SVN: r263271
2018-08-02re PR target/86784 (H8 port needs updating for CVE-2017-5753)Jeff Law2-0/+9
PR target/86784 * config/h8300/h8300.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263270
2018-08-02arm - correctly handle denormal results during softfp subtractionNicolas Pitre3-9/+18
2018-08-02 Nicolas Pitre <nico@fluxnic.net> PR libgcc/86512 * config/arm/ieee754-df.S (adddf3): Don't shortcut denormal handling when exponent goes negative. Update my email address. * config/arm/ieee754-sf.S (addsf3): Likewise. From-SVN: r263267
2018-08-02re PR target/86813 (xstormy16 port needs updating for CVE-2017-5753)Nick Clifton2-0/+11
PR target/86813 * config/stormy16/stormy16.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263266
2018-08-02[nvptx] Ignore c++ exceptionsTom de Vries10-12/+31
The nvptx port can't support exceptions using sjlj, because ptx does not support sjlj. However, default_except_unwind_info still returns UI_SJLJ, even even if we configure with --disable-sjlj-exceptions, because UI_SJLJ is the fallback option. The reason default_except_unwind_info doesn't return UI_DWARF2 is because DWARF2_UNWIND_INFO is not defined in defaults.h, because INCOMING_RETURN_ADDR_RTX is not defined, because there's no ptx equivalent. Testcase libgomp.c++/for-15.C currently doesn't compile unless fno-exceptions is added because: - it tries to generate sjlj exception handling code, and - it tries to generate exception tables using label-addressed .byte sequence. Ptx doesn't support generating random data at a label, nor being able to load/write data relative to a label. This patch fixes the first problem by using UI_TARGET for nvptx. The second problem is worked around by generating all .byte sequences commented out. It would be better to have a narrower workaround, and define TARGET_ASM_BYTE_OP to "error: .byte unsupported " or some such. This patch does not enable exceptions for nvptx, it merely allows c++ programs to run correctly if they do no use exception handling. Build and reg-tested on x86_64 with nvptx accelerator. 2018-08-02 Tom de Vries <tdevries@suse.de> PR target/86660 * common/config/nvptx/nvptx-common.c (nvptx_except_unwind_info): New function. Return UI_TARGET unconditionally. (TARGET_EXCEPT_UNWIND_INFO): Redefine to nvptx_except_unwind_info. * config/nvptx/nvptx.c (TARGET_ASM_BYTE_OP): Emit commented out '.byte'. * testsuite/libgomp.oacc-c++/routine-1-auto.C: Remove -fno-exceptions. * testsuite/libgomp.oacc-c++/routine-1-template-auto.C: Same. * testsuite/libgomp.oacc-c++/routine-1-template-trailing-return-type.C: Same. * testsuite/libgomp.oacc-c++/routine-1-template.C: Same. * testsuite/libgomp.oacc-c++/routine-1-trailing-return-type.C: Same. * testsuite/libgomp.oacc-c-c++-common/routine-1.c: Same. From-SVN: r263265
2018-08-02re PR target/86810 (v850 port needs updating for CVE-2017-5753)Nick Clifton2-0/+7
PR target/86810 * config/v850/v850.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263264
2018-08-02re PR target/86803 (rx port needs updating for CVE-2017-5753)Nick Clifton2-0/+7
PR target/86803 * config/rx/rx.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263263
2018-08-02Typo fixRichard Sandiford2-1/+5
Noticed by Tamar (thanks). 2018-08-02 Richard Sandiford <richard.sandiford@arm.com> gcc/ * genemit.c (print_overload_test): Fix typo. From-SVN: r263262
2018-08-02re PR c++/86763 (Wrong code comparing member of copy of a 237 byte object ↵Richard Biener4-0/+48
with nontrivial default constructor on x86-64 arch) 2018-08-02 Richard Biener <rguenther@suse.de> PR c++/86763 * class.c (layout_class_type): Copy TYPE_TYPELESS_STORAGE to the CLASSTYPE_AS_BASE. * g++.dg/torture/pr86763.C: New testcase. From-SVN: r263261
2018-08-02re PR target/86797 (msp430 port needs updating for CVE-2017-5753)Nick Clifton2-0/+7
PR target/86797 * config/msp430/msp430.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263259
2018-08-02re PR target/86791 (mcore port needs updating for CVE-2017-5753)Nick Clifton2-0/+7
PR target/86791 * config/mcore/mcore.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263258
2018-08-02re PR tree-optimization/86816 (ICE: SIGSEGV in tree-ssa-pre / ↵Richard Biener4-3/+74
tail_merge_optimize) 2018-08-02 Richard Biener <rguenther@suse.de> PR tree-optimization/86816 * tree-ssa-tail-merge.c (tail_merge_valueize): New function which checks for value availability before querying it. (gvn_uses_equal): Use it. (same_succ_hash): Likewise. (gimple_equal_p): Likewise. * g++.dg/torture/pr86816.C: New testcase. From-SVN: r263257
2018-08-02re PR target/86789 (m32r port needs updating for CVE-2017-5753)Nick Clifton2-0/+7
PR target/86789 * config/m32r/m32r.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263256
2018-08-02re PR target/86787 (iq2000 port needs updating for CVE-2017-5753)Nick Clifton2-2/+9
PR target/86787 * config/iq2000/iq2000.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263255
2018-08-02re PR target/86782 (frv port needs updating for CVE-2017-5753)Nick Clifton2-0/+7
PR target/86782 * config/frv/frv.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263254
2018-08-02re PR target/86781 (fr30 port needs updating for CVE-2017-5753)Nick Clifton2-0/+9
PR target/86781 * config/fr30/fr30.c (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define to speculation_safe_value_not_needed. From-SVN: r263253
2018-08-02Revert "[ARM] Fix PR85434: spilling of stack protector guard's address on ARM"Thomas Preud'homme11-463/+37
This reverts commit r263245. From-SVN: r263252
2018-08-02[gen/AArch64] Generate helpers for substituting iterator values into pattern ↵Richard Sandiford11-405/+691
names Given a pattern like: (define_insn "aarch64_frecpe<mode>" ...) the SVE ACLE implementation wants to generate the pattern for a particular (non-constant) mode. This patch automatically generates helpers to do that, specifically: // Return CODE_FOR_nothing on failure. insn_code maybe_code_for_aarch64_frecpe (machine_mode); // Assert that the code exists. insn_code code_for_aarch64_frecpe (machine_mode); // Return NULL_RTX on failure. rtx maybe_gen_aarch64_frecpe (machine_mode, rtx, rtx); // Assert that generation succeeds. rtx gen_aarch64_frecpe (machine_mode, rtx, rtx); Many patterns don't have sensible names when all <...>s are removed. E.g. "<optab><mode>2" would give a base name "2". The new functions therefore require explicit opt-in, which should also help to reduce code bloat. The (arbitrary) opt-in syntax I went for was to prefix the pattern name with '@', similarly to the existing '*' marker. The patch also makes config/aarch64 use the new routines in cases where they obviously apply. This was mostly straight-forward, but it seemed odd that we defined: aarch64_reload_movcp<...><P:mode> but then only used it with DImode, never SImode. If we should be using Pmode instead of DImode, then that's a simple change, but should probably be a separate patch. 2018-08-02 Richard Sandiford <richard.sandiford@arm.com> gcc/ * doc/md.texi: Expand the documentation of instruction names to mention port-local uses. Document '@' in pattern names. * read-md.h (overloaded_instance, overloaded_name): New structs. (mapping): Declare. (md_reader::handle_overloaded_name): New member function. (md_reader::get_overloads): Likewise. (md_reader::m_first_overload): New member variable. (md_reader::m_next_overload_ptr): Likewise. (md_reader::m_overloads_htab): Likewise. * read-md.c (md_reader::md_reader): Initialize m_first_overload, m_next_overload_ptr and m_overloads_htab. * read-rtl.c (iterator_group): Add "type" and "get_c_token" fields. (get_mode_token, get_code_token, get_int_token): New functions. (map_attr_string): Add an optional argument that passes back the associated iterator. (overloaded_name_hash, overloaded_name_eq_p, named_rtx_p): (md_reader::handle_overloaded_name, add_overload_instance): New functions. (apply_iterators): Handle '@' names. Report an error if '@' is used without iterators. (initialize_iterators): Initialize the new iterator_group fields. * genopinit.c (handle_overloaded_code_for) (handle_overloaded_gen): New functions. (main): Use them to print declarations of maybe_code_for_* and maybe_gen_* functions, and inline definitions of code_for_* and gen_*. * genemit.c (print_overload_arguments, print_overload_test) (handle_overloaded_code_for, handle_overloaded_gen): New functions. (main): Use it to print definitions of maybe_code_for_* and maybe_gen_* functions. * config/aarch64/aarch64.c (aarch64_split_128bit_move): Use gen_aarch64_mov{low,high}_di and gen_aarch64_movdi_{low,high} instead of explicit mode checks. (aarch64_split_simd_combine): Likewise gen_aarch64_simd_combine. (aarch64_split_simd_move): Likewise gen_aarch64_split_simd_mov. (aarch64_emit_load_exclusive): Likewise gen_aarch64_load_exclusive. (aarch64_emit_store_exclusive): Likewise gen_aarch64_store_exclusive. (aarch64_expand_compare_and_swap): Likewise gen_aarch64_compare_and_swap and gen_aarch64_compare_and_swap_lse (aarch64_gen_atomic_cas): Likewise gen_aarch64_atomic_cas. (aarch64_emit_atomic_swap): Likewise gen_aarch64_atomic_swp. (aarch64_constant_pool_reload_icode): Delete. (aarch64_secondary_reload): Use code_for_aarch64_reload_movcp instead of aarch64_constant_pool_reload_icode. Use code_for_aarch64_reload_mov instead of explicit mode checks. (rsqrte_type, get_rsqrte_type, rsqrts_type, get_rsqrts_type): Delete. (aarch64_emit_approx_sqrt): Use gen_aarch64_rsqrte instead of get_rsqrte_type and gen_aarch64_rsqrts instead of gen_rqrts_type. (recpe_type, get_recpe_type, recps_type, get_recps_type): Delete. (aarch64_emit_approx_div): Use gen_aarch64_frecpe instead of get_recpe_type and gen_aarch64_frecps instead of get_recps_type. (aarch64_atomic_load_op_code): Delete. (aarch64_emit_atomic_load_op): Likewise. (aarch64_gen_atomic_ldop): Use UNSPECV_ATOMIC_* instead of aarch64_atomic_load_op_code. Use gen_aarch64_atomic_load instead of aarch64_emit_atomic_load_op. * config/aarch64/aarch64.md (aarch64_reload_movcp<GPF_TF:mode><P:mode>) (aarch64_reload_movcp<VALL:mode><P:mode>, aarch64_reload_mov<mode>) (aarch64_movdi_<mode>low, aarch64_movdi_<mode>high) (aarch64_mov<mode>high_di, aarch64_mov<mode>low_di): Add a '@' character before the pattern name. * config/aarch64/aarch64-simd.md (aarch64_split_simd_mov<mode>) (aarch64_rsqrte<mode>, aarch64_rsqrts<mode>) (aarch64_simd_combine<mode>, aarch64_frecpe<mode>) (aarch64_frecps<mode>): Likewise. * config/aarch64/atomics.md (atomic_compare_and_swap<mode>) (aarch64_compare_and_swap<mode>, aarch64_compare_and_swap<mode>_lse) (aarch64_load_exclusive<mode>, aarch64_store_exclusive<mode>) (aarch64_atomic_swp<mode>, aarch64_atomic_cas<mode>) (aarch64_atomic_load<atomic_ldop><mode>): Likewise. From-SVN: r263251
2018-08-02[AArch64] Add support for 16-bit FMOV immediatesRichard Sandiford10-12/+29
aarch64_float_const_representable_p was still returning false for HFmode, so we wouldn't use 16-bit FMOV immediate. E.g. before the patch: __fp16 foo (void) { return 0x1.1p-3; } gave: mov w0, 12352 fmov h0, w0 with -march=armv8.2-a+fp16, whereas now it gives: fmov h0, 1.328125e-1 2018-08-02 Richard Sandiford <richard.sandiford@arm.com> gcc/ * config/aarch64/aarch64.c (aarch64_float_const_representable_p): Allow HFmode constants if TARGET_FP_F16INST. gcc/testsuite/ * gcc.target/aarch64/f16_mov_immediate_1.c: Expect fmov immediate to be used. * gcc.target/aarch64/f16_mov_immediate_2.c: Likewise. * gcc.target/aarch64/f16_mov_immediate_3.c: Force +nofp16. * gcc.target/aarch64/sve/single_1.c: Except fmov immediate to be used for .h. * gcc.target/aarch64/sve/single_2.c: Likewise. * gcc.target/aarch64/sve/single_3.c: Likewise. * gcc.target/aarch64/sve/single_4.c: Likewise. From-SVN: r263250
2018-08-02re PR target/86014 ([AArch64] missed LDP optimization)Jackson Woodruff4-19/+49
gcc/ 2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com> PR target/86014 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp): No longer check last store for clobber of address register. gcc/testsuite 2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com> PR target/86014 * gcc.target/aarch64/ldp_stp_13.c: New test. From-SVN: r263249
2018-08-02Fix gcov misleading error (PR gcov-profile/86817).Martin Liska2-4/+16
2018-08-02 Martin Liska <mliska@suse.cz> PR gcov-profile/86817 * gcov.c (process_all_functions): New function. (main): Call it. (process_file): Move functions processing to process_all_functions. From-SVN: r263248
2018-08-02Cherry-pick compiler-rt revision 338606 (PR sanitizer/86022).Martin Liska2-1/+7
Fix sizeof(struct pthread) in glibc 2.14. 2018-08-02 Martin Liska <mliska@suse.cz> PR sanitizer/86022 * sanitizer_common/sanitizer_linux_libcdep.cc (ThreadDescriptorSize): Cherry-pick compiler-rt revision 338606. From-SVN: r263246
2018-08-02[ARM] Fix PR85434: spilling of stack protector guard's address on ARMThomas Preud'homme11-37/+463
In case of high register pressure in PIC mode, address of the stack protector's guard can be spilled on ARM targets as shown in PR85434, thus allowing an attacker to control what the canary would be compared against. This is also known as CVE-2018-12886. ARM does lack stack_protect_set and stack_protect_test insn patterns, defining them does not help as the address is expanded regularly and the patterns only deal with the copy and test of the guard with the canary. This problem does not occur for x86 targets because the PIC access and the test can be done in the same instruction. Aarch64 is exempt too because PIC access insn pattern are mov of UNSPEC which prevents it from the second access in the epilogue being CSEd in cse_local pass with the first access in the prologue. The approach followed here is to create new "combined" set and test standard pattern names that take the unexpanded guard and do the set or test. This allows the target to use an opaque pattern (eg. using UNSPEC) to hide the individual instructions being generated to the compiler and split the pattern into generic load, compare and branch instruction after register allocator, therefore avoiding any spilling. This is here implemented for the ARM targets. For targets not implementing these new standard pattern names, the existing stack_protect_set and stack_protect_test pattern names are used. To be able to split PIC access after register allocation, the functions had to be augmented to force a new PIC register load and to control which register it loads into. This is because sharing the PIC register between prologue and epilogue could lead to spilling due to CSE again which an attacker could use to control what the canary gets compared against. 2018-08-02 Thomas Preud'homme <thomas.preudhomme@linaro.org> gcc/ PR target/85434 * target-insns.def (stack_protect_combined_set): Define new standard pattern name. (stack_protect_combined_test): Likewise. * cfgexpand.c (stack_protect_prologue): Try new stack_protect_combined_set pattern first. * function.c (stack_protect_epilogue): Try new stack_protect_combined_test pattern first. * config/arm/arm.c (require_pic_register): Add pic_reg and compute_now parameters to control which register to use as PIC register and force reloading PIC register respectively. Insert in the stream of insns if possible. (legitimize_pic_address): Expose above new parameters in prototype and adapt recursive calls accordingly. (arm_legitimize_address): Adapt to new legitimize_pic_address prototype. (thumb_legitimize_address): Likewise. (arm_emit_call_insn): Adapt to new require_pic_register prototype. * config/arm/arm-protos.h (legitimize_pic_address): Adapt to prototype change. * config/arm/arm.md (movsi expander): Adapt to legitimize_pic_address prototype change. (stack_protect_combined_set): New insn_and_split pattern. (stack_protect_set): New insn pattern. (stack_protect_combined_test): New insn_and_split pattern. (stack_protect_test): New insn pattern. * config/arm/unspecs.md (UNSPEC_SP_SET): New unspec. (UNSPEC_SP_TEST): Likewise. * doc/md.texi (stack_protect_combined_set): Document new standard pattern name. (stack_protect_set): Clarify that the operand for guard's address is legal. (stack_protect_combined_test): Document new standard pattern name. (stack_protect_test): Clarify that the operand for guard's address is legal. gcc/testsuite/ PR target/85434 * gcc.target/arm/pr85434.c: New test. From-SVN: r263245
2018-08-02dumpfile.c/h: add "const" to dump location ctorsDavid Malcolm3-6/+14
gcc/ChangeLog: * dumpfile.c (dump_user_location_t::dump_user_location_t): Add "const" to the "gimple *" and "rtx_insn *" parameters. * dumpfile.h (dump_user_location_t::dump_user_location_t): Likewise. (dump_location_t::dump_location_t): Likewise. From-SVN: r263244
2018-08-02Daily bump.GCC Administrator1-1/+1
From-SVN: r263243
2018-08-01PR tree-optimization/86650 - -Warray-bounds missing inlining contextMartin Sebor19-80/+119
gcc/c/ChangeLog: PR tree-optimization/86650 * c-objc-common.c (c_tree_printer): Move usage of EXPR_LOCATION (t) and TREE_BLOCK (t) from within percent_K_format to this callsite. gcc/c-family/ChangeLog: PR tree-optimization/86650 * c-family/c-format.c (gcc_tdiag_char_table): Update comment for "%G". (gcc_cdiag_char_table, gcc_cxxdiag_char_table): Same. (init_dynamic_diag_info): Update from "gcall *" to "gimple *". * c-format.h (T89_G): Update to be "gimple *" rather than "gcall *". (local_gcall_ptr_node): Rename... (local_gimple_ptr_node): ...to this. gcc/cp/ChangeLog: PR tree-optimization/86650 * error.c (cp_printer): Move usage of EXPR_LOCATION (t) and TREE_BLOCK (t) from within percent_K_format to this callsite. gcc/ChangeLog: PR tree-optimization/86650 * gimple-pretty-print.c (percent_G_format): Accept a "gimple *" rather than a "gcall *". Directly pass the data of interest to percent_K_format, rather than building a temporary CALL_EXPR to hold it. * gimple-fold.c (gimple_fold_builtin_strncpy): Adjust. (gimple_fold_builtin_strncat): Adjust. * gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Replace gcall* argument with gimple*. * gimple-ssa-warn-restrict.c (check_call): Same. (wrestrict_dom_walker::before_dom_children): Same. (builtin_access::builtin_access): Same. (check_bounds_or_overlap): Same (maybe_diag_overlap): Same. (maybe_diag_offset_bounds): Same. * tree-diagnostic.c (default_tree_printer): Move usage of EXPR_LOCATION (t) and TREE_BLOCK (t) from within percent_K_format to this callsite. * tree-pretty-print.c (percent_K_format): Add argument. * tree-pretty-print.h: Add argument. * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust. * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Adjust. (maybe_diag_stxncpy_trunc): Same. (handle_builtin_stxncpy): Same. (handle_builtin_strcat): Same. gcc/testsuite/ChangeLog: PR tree-optimization/86650 * gcc.dg/format/gcc_diag-10.c: Adjust. From-SVN: r263239
2018-08-01xcoff.c (struct xcoff_line, [...]): Remove.Tony Reix2-232/+212
* xcoff.c (struct xcoff_line, struct xcoff_line_vector): Remove. (struct xcoff_func, struct xcoff_func_vector): New structs. (xcoff_syminfo): Drop leading dot from symbol name. (xcoff_line_compare, xcoff_line_search): Remove. (xcoff_func_compare, xcoff_func_search): New static functions. (xcoff_lookup_pc): Search function table. (xcoff_add_line, xcoff_process_linenos): Remove. (xcoff_initialize_fileline): Build function table. From-SVN: r263238
2018-08-01[libgomp] Truncate config/nvptx/oacc-parallel.cCesar Philippidis2-360/+7
libgomp/ * config/nvptx/oacc-parallel.c: Truncate. Co-Authored-By: James Norris <jnorris@codesourcery.com> Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com> From-SVN: r263236
2018-08-01Add -D_GLIBCXX_ASSERTIONS to DEBUG_FLAGSJonathan Wakely4-6/+13
Enable assertions in the extra debug library built when --enable-libstdcxx-debug is used. Replace some Debug Mode assertions in src/c++11/futex.cc with __glibcxx_assert, because the library will never be built with Debug Mode. * configure: Regenerate. * configure.ac: Add -D_GLIBCXX_ASSERTIONS to default DEBUG_FLAGS. * src/c++11/futex.cc: Use __glibcxx_assert instead of _GLIBCXX_DEBUG_ASSERT. From-SVN: r263235
2018-08-01Cherry-pick compiler-rt revision 318044 and 319180.Marek Polacek3-38/+95
[PowerPC][tsan] Update tsan to handle changed memory layouts in newer kernels In more recent Linux kernels with 47 bit VMAs the layout of virtual memory for powerpc64 changed causing the thread sanitizer to not work properly. This patch adds support for 47 bit VMA kernels for powerpc64. Tested on several 4.x and 3.x kernel releases. Regtested/bootstrapped on ppc64le-linux with kernel 4.14; applying to trunk/8.3. 2018-08-01 Marek Polacek <polacek@redhat.com> PR sanitizer/86759 * tsan/tsan_platform.h: Cherry-pick compiler-rt revision 318044. * tsan/tsan_platform_linux.cc: Cherry-pick compiler-rt revision 319180. From-SVN: r263229
2018-08-01[AArch64] Update expected output for sve/var_stride_[24].cRichard Sandiford3-2/+10
After Segher's recent combine change, these tests now use a single instruction to do the "and" and "lsl 10". This is a good thing, so the patch updates the expected output accordingly. 2018-08-01 Richard Sandiford <richard.sandiford@arm.com> gcc/testsuite/ * gcc.target/aarch64/sve/var_stride_2.c: Update expected form of range check. * gcc.target/aarch64/sve/var_stride_4.c: Likewise. From-SVN: r263228
2018-08-01[AArch64] XFAIL sve/vcond_[45].c testsRichard Sandiford3-52/+62
See PR 86753 for details. 2018-08-01 Richard Sandiford <richard.sandiford@arm.com> gcc/testsuite/ PR target/86753 * gcc.target/aarch64/sve/vcond_4.c: XFAIL positive tests. * gcc.target/aarch64/sve/vcond_5.c: Likewise. From-SVN: r263227
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