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2023-06-21[i386] Reject too large vectors for partial vector vectorizationRichard Biener3-0/+51
The following works around the lack of the x86 backend making the vectorizer compare the costs of the different possible vector sizes the backed advertises through the vector_modes hook. When enabling masked epilogues or main loops then this means we will select the prefered vector mode which is usually the largest even for loops that do not iterate close to the times the vector has lanes. When not using masking the vectorizer would reject any mode resulting in a VF bigger than the number of iterations but with masking they are simply masked out. So this overloads the finish_cost function and matches for the problematic case, forcing a high cost to make us try a smaller vector size. * config/i386/i386.cc (ix86_vector_costs::finish_cost): Overload. For masked main loops make sure the vectorization factor isn't more than double the number of iterations. * gcc.target/i386/vect-partial-vectors-1.c: New testcase. * gcc.target/i386/vect-partial-vectors-2.c: Likewise.
2023-06-21x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512FJan Beulich3-11/+59
There's no reason to constrain this to AVX512VL, unless instructed so by -mprefer-vector-width=, as the wider operation is unusable for more narrow operands only when the possible memory source is a non-broadcast one. This way even the scalar copysign<mode>3 can benefit from the operation being a single-insn one (leaving aside moves which the compiler decides to insert for unclear reasons, and leaving aside the fact that bcst_mem_operand() is too restrictive for broadcast to be embedded right into VPTERNLOG*). While there also bring *<avx512>_vternlog<mode>_all's in sync with that of the three splitters. Along with this also request value duplication in ix86_expand_copysign()'s call to ix86_build_signbit_mask(), eliminating excess space allocation in .rodata.*, filled with zeros which are never read. gcc/ * config/i386/i386-expand.cc (ix86_expand_copysign): Request value duplication by ix86_build_signbit_mask() when AVX512F and not HFmode. * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to 2-alternative form. Adjust "mode" attribute. Add "enabled" attribute. (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F && !TARGET_PREFER_AVX256. (*<avx512>_vpternlog<mode>_2): Likewise. (*<avx512>_vpternlog<mode>_3): Likewise. gcc/testsuite/ * gcc.target/i386/avx512f-copysign.c: New test.
2023-06-21x86: add -mprefer-vector-width=512 to new avx512f-dupv2di.c testcaseJan Beulich1-1/+1
This is to cover testing also being done with -march=cascadelake. gcc/testsuite/ * gcc.target/i386/avx512f-dupv2di.c: Add -mprefer-vector-width=512.
2023-06-21Use intermiediate integer type for float_expr/fix_trunc_expr when direct ↵liuhongt2-2/+158
optab is not existed. We have already use intermidate type in case WIDEN, but not for NONE, this patch extended that. gcc/ChangeLog: PR target/110018 * tree-vect-stmts.cc (vectorizable_conversion): Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed. gcc/testsuite/ChangeLog: * gcc.target/i386/pr110018-1.c: New test.
2023-06-21Daily bump.GCC Administrator7-1/+642
2023-06-20gensupport: drop suppport for define_cond_exec from compact syntacTamar Christina1-2/+2
define_cond_exec does not support the special @@ syntax and so can't support {@. As such just remove support for it. gcc/ChangeLog: PR bootstrap/110324 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
2023-06-20libcpp: Improve location for macro names [PR66290]Lewis Hyatt29-342/+405
When libcpp reports diagnostics whose locus is a macro name (such as for -Wunused-macros), it uses the location in the cpp_macro object that was stored by _cpp_new_macro. This is currently set to pfile->directive_line, which contains the line number only and no column information. This patch changes the stored location to the src_loc for the token defining the macro name, which includes the location and range information. libcpp/ChangeLog: PR c++/66290 * macro.cc (_cpp_create_definition): Add location argument. * internal.h (_cpp_create_definition): Adjust prototype. * directives.cc (do_define): Pass new location argument to _cpp_create_definition. (do_undef): Stop passing inferior location to cpp_warning_with_line; the default from cpp_warning is better. (cpp_pop_definition): Pass new location argument to _cpp_create_definition. * pch.cc (cpp_read_state): Likewise. gcc/testsuite/ChangeLog: PR c++/66290 * c-c++-common/cpp/macro-ranges.c: New test. * c-c++-common/cpp/line-2.c: Adapt to check for column information on macro-related libcpp warnings. * c-c++-common/cpp/line-3.c: Likewise. * c-c++-common/cpp/macro-arg-count-1.c: Likewise. * c-c++-common/cpp/pr58844-1.c: Likewise. * c-c++-common/cpp/pr58844-2.c: Likewise. * c-c++-common/cpp/warning-zero-location.c: Likewise. * c-c++-common/pragma-diag-14.c: Likewise. * c-c++-common/pragma-diag-15.c: Likewise. * g++.dg/modules/macro-2_d.C: Likewise. * g++.dg/modules/macro-4_d.C: Likewise. * g++.dg/modules/macro-4_e.C: Likewise. * g++.dg/spellcheck-macro-ordering.C: Likewise. * gcc.dg/builtin-redefine.c: Likewise. * gcc.dg/cpp/Wunused.c: Likewise. * gcc.dg/cpp/redef2.c: Likewise. * gcc.dg/cpp/redef3.c: Likewise. * gcc.dg/cpp/redef4.c: Likewise. * gcc.dg/cpp/ucnid-11-utf8.c: Likewise. * gcc.dg/cpp/ucnid-11.c: Likewise. * gcc.dg/cpp/undef2.c: Likewise. * gcc.dg/cpp/warn-redefined-2.c: Likewise. * gcc.dg/cpp/warn-redefined.c: Likewise. * gcc.dg/cpp/warn-unused-macros-2.c: Likewise. * gcc.dg/cpp/warn-unused-macros.c: Likewise.
2023-06-20aarch64: Fix gcc.target/aarch64/sve/pcs failuresRichard Sandiford67-92/+95
Several gcc.target/aarch64/sve/pcs tests started failing after 6a2e8dcbbd4, because the tests weren't robust against whether an indirect argument register or the stack pointer was used as the base for stores. The patch allows either base register when there is only one indirect argument. It disables -fcprop-registers in cases where there are sometimes multiple indirect arguments, since the name of the argument register is then an important part of the test. Disabling -fcprop-registers gives poor final register allocation, since: * combine's make_more_copies hack adds extra redundant moves * code with those moves is not allocated as well as moves without them * we often rely on -fcprop-registers to clean up the allocation later The patch therefore disables combine in the same tests as cprop-registers. gcc/testsuite/ * gcc.target/aarch64/sve/pcs/args_1.c: Match moves from the stack pointer to indirect argument registers and allow either to be used as the base register in subsequent stores. * gcc.target/aarch64/sve/pcs/args_8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_2.c: Allow the store of the indirect argument to happen via the argument register or the stack pointer. * gcc.target/aarch64/sve/pcs/args_3.c: Likewise. * gcc.target/aarch64/sve/pcs/args_4.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_bf16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_f16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_f32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_f64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_s16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_s32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_s64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_s8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_u16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_u32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_u64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_be_u8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_bf16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_f16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_f32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_f64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_s16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_s32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_s64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_s8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_u16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_u32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_u64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_5_le_u8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_bf16.c: Disable -fcprop-registers and combine. * gcc.target/aarch64/sve/pcs/args_6_be_f16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_f32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_f64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_s16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_s32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_s64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_s8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_u16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_u32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_u64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_be_u8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_bf16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_f16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_f32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_f64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_s16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_s32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_s64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_s8.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_u16.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_u32.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_u64.c: Likewise. * gcc.target/aarch64/sve/pcs/args_6_le_u8.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_1.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_f16.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_f32.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_f64.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_s16.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_s32.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_s64.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_s8.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_u16.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_u32.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_u64.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_2_u8.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_3_nosc.c: Likewise. * gcc.target/aarch64/sve/pcs/varargs_3_sc.c: Likewise.
2023-06-20aarch64: Robustify stack tie handlingRichard Sandiford2-7/+18
The SVE handling of stack clash protection copied the stack pointer to X11 before the probe and set up X11 as the CFA for unwind purposes: /* This is done to provide unwinding information for the stack adjustments we're about to do, however to prevent the optimizers from removing the R11 move and leaving the CFA note (which would be very wrong) we tie the old and new stack pointer together. The tie will expand to nothing but the optimizers will not touch the instruction. */ rtx stack_ptr_copy = gen_rtx_REG (Pmode, STACK_CLASH_SVE_CFA_REGNUM); emit_move_insn (stack_ptr_copy, stack_pointer_rtx); emit_insn (gen_stack_tie (stack_ptr_copy, stack_pointer_rtx)); /* We want the CFA independent of the stack pointer for the duration of the loop. */ add_reg_note (insn, REG_CFA_DEF_CFA, stack_ptr_copy); RTX_FRAME_RELATED_P (insn) = 1; -fcprop-registers is now smart enough to realise that X11 = SP, replace X11 with SP in the stack tie, and delete the instruction created above. This patch tries to prevent that by making stack_tie fussy about the register numbers. It fixes failures in gcc.target/aarch64/sve/pcs/stack_clash*.c. gcc/ * config/aarch64/aarch64.md (stack_tie): Hard-code the first register operand to the stack pointer. Require the second register operand to have the number specified in a separate const_int operand. * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function. (aarch64_allocate_and_probe_stack_space): Use it. (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. (aarch64_expand_epilogue): Likewise.
2023-06-20tree-ssa-math-opts: Small uaddc/usubc pattern matching improvement [PR79173]Jakub Jelinek2-0/+38
In the following testcase we fail to pattern recognize the least significant .UADDC call. The reason is that arg3 in that case is _3 = .ADD_OVERFLOW (...); _2 = __imag__ _3; _1 = _2 != 0; arg3 = (unsigned long) _1; and while before the changes arg3 has a single use in some .ADD_OVERFLOW later on, we add a .UADDC call next to it (and gsi_remove/gsi_replace only what is strictly necessary and leave quite a few dead stmts around which next DCE cleans up) and so it all of sudden isn't used just once, but twice (.ADD_OVERFLOW and .UADDC) and so uaddc_cast fails. While we could tweak uaddc_cast and not require has_single_use in these uses, there is also no vrp that would figure out that because __imag__ _3 is in [0, 1] range, it can just use arg3 = __imag__ _3; and drop the comparison and cast. We already search if either arg2 or arg3 is ultimately set from __imag__ of .{{ADD,SUB}_OVERFLOW,U{ADD,SUB}C} call, so the following patch just remembers the lhs of __imag__ from that case and uses it later. 2023-06-20 Jakub Jelinek <jakub@redhat.com> PR middle-end/79173 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right type. * g++.target/i386/pr79173-1.C: New test.
2023-06-20calls: Change return type of predicate function from int to boolUros Bizjak2-82/+86
Also change some internal variables and some function arguments to bool. gcc/ChangeLog: * calls.h (setjmp_call_p): Change return type from int to bool. * calls.cc (struct arg_data): Change "pass_on_stack" to bool. (store_one_arg): Change return type from int to bool and adjust function body accordingly. Change "sibcall_failure" variable to bool. (finalize_must_preallocate): Ditto. Change *must_preallocate pointer argument to bool. Change "partial_seen" variable to bool. (load_register_parameters): Change *sibcall_failure pointer argument to bool. (check_sibcall_argument_overlap_1): Change return type from int to bool and adjust function body accordingly. (check_sibcall_argument_overlap): Ditto. Change "mark_stored_args_map" argument to bool. (emit_call_1): Change "already_popped" variable to bool. (setjmp_call_p): Change return type from int to bool and adjust function body accordingly. (initialize_argument_information): Change *must_preallocate pointer argument to bool. (expand_call): Change "pcc_struct_value", "must_preallocate" and "sibcall_failure" variables to bool. (emit_library_call_value_1): Change "pcc_struct_value" variable to bool.
2023-06-20runtime: use a C function to call mmapIan Lance Taylor6-16/+39
The final argument to mmap, of type off_t, varies. In CL 445375 we changed it to always use the C off_t type, but that broke 32-bit big-endian Linux systems. On those systems, using the C off_t type requires calling the mmap64 function. In C this is automatically handled by the <sys/mman.h> file. In Go, we would have to change the magic //extern comment to call mmap64 when appropriate. Rather than try to get that right, we instead go through a C function that uses C implicit type conversions to pick the right type. Fixes PR go/110297 Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/504415
2023-06-20ipa-sra: Disable candidates with no known callers (PR 110276)Martin Jambor2-0/+26
In IPA-SRA we use can_be_local_p () predicate rather than just plain local call graph flag in order to figure out whether the node is a part of an external API that we cannot change. Although there are cases where this can allow more transformations, it also means we can analyze functions which have no callers at all, which is pointless. Moreover, it makes an assert of hint propagation trigger, which checks that we have looked at callers before processing hints that come from them. This has been reported as PR 110276. This patch simply adds a check that a node has at least one caller into the early checks and makes the node a non-candidate for any transformation if it does not. gcc/ChangeLog: 2023-06-16 Martin Jambor <mjambor@suse.cz> PR ipa/110276 * ipa-sra.cc (struct caller_issues): New field there_is_one. (check_for_caller_issues): Set it. (check_all_callers_for_issues): Check it. gcc/testsuite/ChangeLog: 2023-06-16 Martin Jambor <mjambor@suse.cz> PR ipa/110276 * gcc.dg/ipa/pr110276.c: New test.
2023-06-20ipa-cp: Avoid long linear searches through DECL_ARGUMENTSMartin Jambor3-33/+131
There have been concerns that linear searches through DECL_ARGUMENTS that are often necessary to compute the index of a particular PARM_DECL which is the key to results of IPA-CP can happen often enough to be a compile time issue, especially if we plug the results into value numbering, as I intend to do with a follow-up patch. This patch creates a vector sorted according to PARM_DECLs to do the look-up for all functions which have some information discovered by IPA-CP and which have 32 parameters or more. 32 is a hard-wired magical constant here to capture the trade-off between the memory allocation overhead and length of the linear search. I do not think it is worth making it a --param but if people think it appropriate, I can turn it into one. gcc/ChangeLog: 2023-05-31 Martin Jambor <mjambor@suse.cz> * ipa-prop.h (ipa_uid_to_idx_map_elt): New type. (struct ipcp_transformation): Rearrange members according to C++ class coding convention, add m_uid_to_idx, get_param_index and maybe_create_parm_idx_map. * ipa-cp.cc (ipcp_transformation::get_param_index): New function. (compare_uids): Likewise. (ipcp_transformation::maype_create_parm_idx_map): Likewise. * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index. (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL. (ipcp_update_vr): Likewise. (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
2023-06-20rs6000: Add builtins for IEEE 128-bit floating point valuesCarl Love9-26/+307
Add support for the following builtins: __vector unsigned long long int scalar_extract_exp_to_vec (__ieee128); __vector unsigned __int128 scalar_extract_sig_to_vec (__ieee128); __ieee128 scalar_insert_exp (__vector unsigned __int128, __vector unsigned long long); The instructions used in the builtins operate on vector registers. Thus the result must be moved to a scalar type. There is no clean, performant way to do this. The user code typically needs the result as a vector anyway. gcc/ * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti. Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti. Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di. Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di. (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti, CODE_FOR_xsiexpqp_kf_v2di): Add case statements. * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_extract_exp_to_vec, __builtin_vsx_scalar_extract_sig_to_vec, __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions. Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di, xsxsigqp_kf_ti, xsiexpqp_kf_di respectively. * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new overloaded instance. Update comments. * config/rs6000/rs6000-overload.def (__builtin_vec_scalar_insert_exp): Add new overload definition with vector arguments. (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New overloaded definitions. * config/rs6000/vsx.md (V2DI_DI): New mode iterator. (DI_to_TI): New mode attribute. Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>. Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>. Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>. * doc/extend.texi (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): Add documentation for new builtins. (scalar_insert_exp): Add new overloaded builtin definition. gcc/testsuite/ * gcc.target/powerpc/bfp/scalar-extract-exp-8.c: New test case. * gcc.target/powerpc/bfp/scalar-extract-sig-8.c: New test case. * gcc.target/powerpc/bfp/scalar-insert-exp-16.c: New test case.
2023-06-20libstdc++: Remove redundant code in std::to_arrayJonathan Wakely1-2/+2
libstdc++-v3/ChangeLog: * include/std/array (to_array(T(&)[N])): Remove redundant condition. (to_array(T(&&)[N])): Remove redundant std::move.
2023-06-20RISC-V: testsuite: Add missing -mabi=lp64d.Robin Dapp9-9/+9
This fixes more cases of missing -mabi=lp64d. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c: Add -mabi=lp64d. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-1.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-2.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-3.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-4.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c: Dito.
2023-06-20RISC-V: Set the natural size of constant vector mask modes to one RVV data ↵Li Xu2-0/+16
vector. If reinterpret vnx2bi as vnx16qi, vnx16qi must occupy no more of the underlying registers than vnx2bi. Consider this following case: void test_vreinterpret_v_b64_i8m1 (uint8_t *in, int8_t *out) { vbool64_t vmask = __riscv_vlm_v_b64 (in, 2); vint8m1_t vout = __riscv_vreinterpret_v_b64_i8m1 (vmask); __riscv_vse8_v_i8m1(out, vout, 16); } compiler parameters: -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -O3 Compilation fails with: test_vreinterpret_v_b64_i8m1during RTL pass: expand test.c: In function 'test_vreinterpret_v_b64_i8m1': test.c:11:22: internal compiler error: in gen_lowpart_general, at rtlhooks.cc:57 11 | vint8m1_t vout = __riscv_vreinterpret_v_b64_i8m1(src); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 0xf11876 gen_lowpart_general(machine_mode, rtx_def*) ../.././riscv-gcc/gcc/rtlhooks.cc:57 0x191435e gen_vreinterpretvnx16qi(rtx_def*, rtx_def*) ../.././riscv-gcc/gcc/config/riscv/vector.md:486 0xe08858 maybe_expand_insn(insn_code, unsigned int, expand_operand*) ../.././riscv-gcc/gcc/optabs.cc:8213 0x1471209 riscv_vector::function_expander::generate_insn(insn_code) ../.././riscv-gcc/gcc/config/riscv/riscv-vector-builtins.cc:3813 0x147629c riscv_vector::function_expander::expand() ../.././riscv-gcc/gcc/config/riscv/riscv-vector-builtins.h:520 0x147629c riscv_vector::expand_builtin(unsigned int, tree_node*, rtx_def*) ../.././riscv-gcc/gcc/config/riscv/riscv-vector-builtins.cc:4103 0x9868f9 expand_builtin(tree_node*, rtx_def*, rtx_def*, machine_mode, int) ../.././riscv-gcc/gcc/builtins.cc:7342 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural size of vector mask mode to one rvv register. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vreinterpet-fixed.c: New test.
2023-06-20RISC-V: Optimize codegen of VLA SLPJuzhe-Zhong4-45/+128
Add comments for Robin: We want to create a pattern where value[ix] = floor (ix / NPATTERNS). As NPATTERNS is always a power of two we can rewrite this as = ix & -NPATTERNS. ` Recently, I figure out a better approach in case of codegen for VLA stepped vector. Here is the detail descriptions: Case 1: void f (uint8_t *restrict a, uint8_t *restrict b) { for (int i = 0; i < 100; ++i) { a[i * 8] = b[i * 8 + 37] + 1; a[i * 8 + 1] = b[i * 8 + 37] + 2; a[i * 8 + 2] = b[i * 8 + 37] + 3; a[i * 8 + 3] = b[i * 8 + 37] + 4; a[i * 8 + 4] = b[i * 8 + 37] + 5; a[i * 8 + 5] = b[i * 8 + 37] + 6; a[i * 8 + 6] = b[i * 8 + 37] + 7; a[i * 8 + 7] = b[i * 8 + 37] + 8; } } We need to generate the stepped vector: NPATTERNS = 8. { 0, 0, 0, 0, 0, 0, 0, 0, 8, 8, 8, 8, 8, 8, 8, 8 } Before this patch: vid.v v4 ;; {0,1,2,3,4,5,6,7,...} vsrl.vi v4,v4,3 ;; {0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,...} li a3,8 ;; {8} vmul.vx v4,v4,a3 ;; {0,0,0,0,0,0,0,8,8,8,8,8,8,8,8,...} After this patch: vid.v v4 ;; {0,1,2,3,4,5,6,7,...} vand.vi v4,v4,-8(-NPATTERNS) ;; {0,0,0,0,0,0,0,8,8,8,8,8,8,8,8,...} Case 2: void f (uint8_t *restrict a, uint8_t *restrict b) { for (int i = 0; i < 100; ++i) { a[i * 8] = b[i * 8 + 3] + 1; a[i * 8 + 1] = b[i * 8 + 2] + 2; a[i * 8 + 2] = b[i * 8 + 1] + 3; a[i * 8 + 3] = b[i * 8 + 0] + 4; a[i * 8 + 4] = b[i * 8 + 7] + 5; a[i * 8 + 5] = b[i * 8 + 6] + 6; a[i * 8 + 6] = b[i * 8 + 5] + 7; a[i * 8 + 7] = b[i * 8 + 4] + 8; } } We need to generate the stepped vector: NPATTERNS = 4. { 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12, ... } Before this patch: li a6,134221824 slli a6,a6,5 addi a6,a6,3 ;; 64-bit: 0x0003000200010000 vmv.v.x v6,a6 ;; {3, 2, 1, 0, ... } vid.v v4 ;; {0, 1, 2, 3, 4, 5, 6, 7, ... } vsrl.vi v4,v4,2 ;; {0, 0, 0, 0, 1, 1, 1, 1, ... } li a3,4 ;; {4} vmul.vx v4,v4,a3 ;; {0, 0, 0, 0, 4, 4, 4, 4, ... } vadd.vv v4,v4,v6 ;; {3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12, ... } After this patch: li a3,-536875008 slli a3,a3,4 addi a3,a3,1 slli a3,a3,16 vmv.v.x v2,a3 ;; {3, 1, -1, -3, ... } vid.v v4 ;; {0, 1, 2, 3, 4, 5, 6, 7, ... } vadd.vv v4,v4,v2 ;; {3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12, ... } gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/partial/slp-1.c: Adapt testcase. * gcc.target/riscv/rvv/autovec/partial/slp-16.c: New test. * gcc.target/riscv/rvv/autovec/partial/slp_run-16.c: New test.
2023-06-20RISC-V: testsuite: Add -Wno-psabi to vec_set/vec_extract testcases.Robin Dapp10-10/+10
This fixes some fallout from the recent psabi changes. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-1.c: Add -Wno-psabi. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-2.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-3.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-4.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c: Dito. * gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c: Dito.
2023-06-20RISC-V: Fix compiler warning of riscv_arg_has_vectorLehua Ding1-2/+4
Hi, This little patch fixes a compile warning issue that my previous patch introduced, sorry for introducing this issue. Best, Lehua gcc/ChangeLog: * config/riscv/riscv.cc (riscv_arg_has_vector): Add default switch handler.
2023-06-20RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math.Robin Dapp5-3/+5
I forgot to check for vfmul in the multiplication tests as well as some -ffast-math arguments. Fix this. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vadd-run.c: Add -ffast-math. * gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c: Dito. * gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Remove -ffast-math * gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c: Check for vfmul. * gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c: Dito.
2023-06-20Fortran: Fix parse-dump-tree for OpenMP ALLOCATE clauseTobias Burnus1-3/+6
Commit r14-1301-gd64e8e1224708e added u2.allocator to gfc_omp_namelist for better readability and to permit to use namelist->expr for code like the following: !$omp allocators allocate(align(32) : dt%alloc_comp) allocate (dt%alloc_comp(5)) !$omp allocate(dt%alloc_comp2) align(64) allocate (dt%alloc_comp2(10)) However, for the parse-tree dump the change was incomplete. gcc/fortran/ChangeLog: * dump-parse-tree.cc (show_omp_namelist): Fix dump of the allocator modifier of OMP_LIST_ALLOCATE.
2023-06-20ada: Minor tweaksEric Botcazou1-8/+6
gcc/ada/ * gcc-interface/decl.cc (gnat_to_gnu_entity) <E_Variable>: Pass the NULL_TREE explicitly and test imported_p in lieu of Is_Imported. <E_Function>: Remove public_flag local variable and make extern_flag local variable a constant.
2023-06-20ada: Fix crash on inlining in GNATproveYannick Moy1-0/+9
After the recent change on detection of non-inlining, calls inside the iterator part of a quantified expression were not considered as preventing inlining anymore, leading to a crash later on inside GNATprove. Now fixed. gcc/ada/ * sem_res.adb (Resolve_Call): Fix change that replaced test for quantified expressions by the test for potentially unevaluated contexts. Both should be performed.
2023-06-20ada: Further fixes to handling of private views in instancesEric Botcazou9-237/+219
This removes more bypasses for private views in instances that are present in type predicates (Conforming_Types, Covers, Specific_Type and Wrong_Type), which in exchange requires additional work in Sem_Ch12 to restore the proper view of types during the instantiation of generic bodies. The main mechanism for this is the Has_Private_View flag, but it comes with the limitations that 1) there must be a direct reference to the global type in the generic construct (either a reference to a global object of this type or the explicit declaration of a local object of this type), which is not always the case e.g. for loop parameters and 2) it can deal with a single type at a time, e.g. it cannot deal with an array type and its component type if their respective views are not the same in the instance. To overcome the second limitation, a new Has_Secondary_Private_View flag is introduced to deal with a secondary type, which as of this writing is either the component type of an array type or the designated type of an access type (together they make up the vast majority of the problematic cases for the Has_Private_View flag alone). This new mechanism subsumes a specific treatment for them that was added in Copy_Generic_Node a few years ago, although a specific treatment still needs to be preserved for comparison and equality operators in a narrower case. Additional handling is also introduced to overcome the first limitation for loop parameters in Copy_Generic_Node, and a relaxed condition is used in Exp_Ch7.Convert_View to generate an unchecked conversion between views. gcc/ada/ * exp_ch7.adb (Convert_View): Detect more cases of mismatches for private types and use Implementation_Base_Type as main criterion. * gen_il-fields.ads (Opt_Field_Enum): Add Has_Secondary_Private_View * gen_il-gen-gen_nodes.adb (N_Expanded_Name): Likewise. (N_Direct_Name): Likewise. (N_Op): Likewise. * sem_ch12.ads (Check_Private_View): Document the usage of second flag Has_Secondary_Private_View. * sem_ch12.adb (Get_Associated_Entity): New function to retrieve the ultimate associated entity, if any. (Check_Private_View): Implement Has_Secondary_Private_View support. (Copy_Generic_Node): Remove specific treatment for Component_Type of an array type and Designated_Type of an access type. Add specific treatment for comparison and equality operators, as well as iterator and loop parameter specifications. (Instantiate_Type): Implement Has_Secondary_Private_View support. (Requires_Delayed_Save): Call Get_Associated_Entity. (Set_Global_Type): Implement Has_Secondary_Private_View support. * sem_ch6.adb (Conforming_Types): Remove bypass for private views in instances. * sem_type.adb (Covers): Return true if Is_Subtype_Of does so. Remove bypass for private views in instances. (Specific_Type): Likewise. * sem_util.adb (Wrong_Type): Likewise. * sinfo.ads (Has_Secondary_Private_View): Document new flag.
2023-06-20ada: Remove outdated commentRonan Desplanques1-4/+0
The Preelaborate pragma the removed comment was referring to was indeed present in AI 167, as well as in clause 5.3 of the rationale for Ada 2012, but it never made it into the 2012 version of the reference manual. gcc/ada/ * libgnarl/s-mudido.ads: Remove outdated comment.
2023-06-20Fortran's gfc_match_char: %S to match symbol with host_assocTobias Burnus1-2/+4
gfc_match ("... %s ...", ...) matches a gfc_symbol but with host_assoc = 0. This commit adds '%S' as variant which matches with host_assoc = 1 gcc/fortran/ChangeLog: * match.cc (gfc_match_char): Match with '%S' a symbol with host_assoc = 1.
2023-06-20Improve DSE to handle stores before __builtin_unreachable ()Richard Biener3-2/+38
DSE isn't good at identifying program points that end lifetime of variables that are not associated with virtual operands. But at least for those that end basic-blocks we can handle the simple case where this ending is in the same basic-block as the definition we want to elide. That should catch quite some common cases already. * tree-ssa-dse.cc (dse_classify_store): When we found no defs and the basic-block with the original definition ends in __builtin_unreachable[_trap] the store is dead. * gcc.dg/tree-ssa/ssa-dse-47.c: New testcase. * c-c++-common/asan/pr106558.c: Avoid undefined behavior due to missing return.
2023-06-20Update virtual SSA form manually where easily possible in phipropRichard Biener1-1/+17
This keeps virtual SSA form up-to-date in phiprop when easily possible. Only when we deal with aggregate copies the work would be too heavy-handed in general. * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads keep the virtual SSA form up-to-date.
2023-06-20aarch64: Optimise ADDP with same source operandsKyrylo Tkachov2-0/+50
We've been asked to optimise the testcase in this patch of a 64-bit ADDP with the low and high halves of the same 128-bit vector. This can be done by a single .4s ADDP followed by just reading the bottom 64 bits. A splitter for this is quite straightforward now that all the vec_concat stuff is collapsed by simplify-rtx. With this patch we generate a single: addp v0.4s, v0.4s, v0.4s instead of: dup d31, v0.d[1] addp v0.2s, v0.2s, v31.2s ret Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf. gcc/ChangeLog: * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>): New define_insn_and_split. gcc/testsuite/ChangeLog: * gcc.target/aarch64/simd/addp-same-low_1.c: New test.
2023-06-20AArch64: remove test comment from *mov<mode>_aarch64Tamar Christina1-1/+1
I accidentally left a test comment in the final version of the patch. This removes the comment. gcc/ChangeLog: * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
2023-06-20ada: Fix couple of issues in documentation of overflow checkingEric Botcazou2-46/+7
There is still a mention of the defunct CHECKED mode and the Default Settings paragraph is confusing with regard to the -gnato switch. gcc/ada/ * doc/gnat_ugn/gnat_and_program_execution.rst (Overflows in GNAT) <Default Settings>: Remove obsolete paragraph about -gnato. <Implementation Notes>: Replace CHECKED with STRICT. * gnat_ugn.texi: Regenerate.
2023-06-20ada: Do not issue warning on postcondition in some casesYannick Moy1-0/+32
Warning on suspicious postcondition is not relevant if contract Exceptional_Cases is present, or if contract Always_Terminates is present with a non-statically True value, as in those cases the postcondition can be used to indicate constraints on those pre-state for which the subprogram might terminate normally. gcc/ada/ * sem_util.adb (Check_Result_And_Post_State): Do not warn in cases where the warning could be spurious.
2023-06-20ada: Add the ability to add error codes to error messagesYannick Moy9-21/+134
Add a new character sequence [] for error codes in error messages handled by Error_Msg procedures, to use for SPARK-related errors. Display of additional information on the error or warning based on the error code is delegated to GNATprove. gcc/ada/ * err_vars.ads (Error_Msg_Code): New variable for error codes. * errout.adb (Error_Msg_Internal): Display continuation message when an error code was present. (Set_Msg_Text): Handle character sequence [] for error codes. * errout.ads: Document new insertion sequence []. (Error_Msg_Code): New renaming. * erroutc.adb (Prescan_Message): Detect presence of error code. (Set_Msg_Insertion_Code): Handle new insertion sequence []. * erroutc.ads (Has_Error_Code): New variable for prescan. (Set_Msg_Insertion_Code): Handle new insertion sequence []. * contracts.adb (Check_Type_Or_Object_External_Properties): Replace reference to SPARK RM section by an error code. * sem_elab.adb (SPARK_Processor): Same. * sem_prag.adb (Check_Missing_Part_Of): Same. * sem_res.adb (Resolve_Actuals, Resolve_Entity_Name): Same.
2023-06-20ada: Fix for attribute Range in Exceptional_CasesPiotr Trojanek1-1/+2
Attribute Range is now handled like First and Last when occurring within the consequence of Exceptional_Cases, i.e. attribute Range is not considered to be a read of a formal parameter that would not be allowed in the contract. gcc/ada/ * sem_res.adb (Resolve_Entity_Name): Handle Range like First and Last.
2023-06-20ada: Document partition-wide Ada signal handlersJose Ruiz2-305/+414
Indicate the signal handlers that are set by the Ada run time, and explain how to prevent them if needed. gcc/ada/ * doc/gnat_ugn/the_gnat_compilation_model.rst (Partition-Wide Settings): add this subsection to document configuration settings made by the Ada run time. * gnat_ugn.texi: Regenerate.
2023-06-20ada: Fix for quantified expressions in Exceptional_CasesPiotr Trojanek1-1/+1
When detecting illegal uses of formal parameters of the current subprogram in contract of its Exceptional_Cases, we relied on the Current_Scope. However, quantified expressions introduce an implicit scope, which we need to take into account. gcc/ada/ * sem_res.adb (Resolve_Entity_Name): Ignore implicit loop scopes introduced by quantified expressions.
2023-06-20ada: Fix bug in predicate checks with address clausesBob Duff2-8/+10
This patch fixes a compiler bug triggered by having a type with some defaulted components, and a predicate, and an object of that type with an address clause. In this case, the compiler was crashing. gcc/ada/ * sem_ch3.adb (Analyze_Object_Declaration): Remove predicate-check generation if there is an address clause. These are unnecessary, and cause gigi to crash. * exp_util.ads (Following_Address_Clause): Remove obsolete "???" comments. The suggested changes were done long ago.
2023-06-20ada: Fix fallout of fix to handling of private views in instancesEric Botcazou2-2/+4
Check_Actual_Type incorrectly switches the view of a private type declared in the enclosing scope of a generic unit but that has a private ancestor. gcc/ada/ * einfo.ads (Has_Private_Ancestor): Fix inaccuracy in description. * sem_ch12.adb (Check_Actual_Type): Do not switch the view of the type if it has a private ancestor.
2023-06-20ada: Add CHERI intrinsic bindings and helper functions.Daniel King2-0/+545
The package Interfaces.CHERI provides intrinsic bindings and helper functions to allow software to query, create, and manipulate CHERI capabilities. gcc/ada/ * libgnat/i-cheri.ads: Add CHERI intrinsics and helper functions. * libgnat/i-cheri.adb: Likewise
2023-06-20ada: Small fixes to handling of private views in instancesEric Botcazou4-91/+92
The main change is the removal of the special bypass for private views in Resolve_Implicit_Dereference, which in exchange requires additional work in Check_Generic_Actuals and a couple more calls to Set_Global_Type in Save_References_In_Identifier. This also removes an unused parameter in Convert_View and adds a missing comment in Build_Derived_Record_Type. gcc/ada/ * exp_ch7.adb (Convert_View): Remove Ind parameter and adjust. * sem_ch12.adb (Check_Generic_Actuals): Check the type of both in and in out actual objects, as well as the type of formal parameters of actual subprograms. Extend the condition under which the views are swapped to nested generic constructs. (Save_References_In_Identifier): Call Set_Global_Type on a global identifier rewritten as an explicit dereference, either directly or after having first been rewritten as a function call. (Save_References_In_Operator): Set N2 unconditionally and reuse it. * sem_ch3.adb (Build_Derived_Record_Type): Add missing comment. * sem_res.adb (Resolve_Implicit_Dereference): Remove special bypass for private views in instances.
2023-06-20ada: Fix internal error on aggregate within container aggregateEric Botcazou1-7/+9
This just applies the same fix to Expand_Array_Aggregate as the one that was recently applied to Convert_To_Assignments. gcc/ada/ * exp_aggr.adb (Convert_To_Assignments): Tweak comment. (Expand_Array_Aggregate): Do not delay the expansion if the parent node is a container aggregate.
2023-06-20ada: Fix -fdiagnostics-format=json not printing all messagesGhjuvan Lacambre1-9/+12
The previous version of this code stopped printing messages as soon as it encountered a deleted or continuation message. This was wrong, continuation and deleted messages can be followed by live messages that do need to be printed. gcc/ada/ * errout.adb (Output_Messages): Fix loop termination condition.
2023-06-20ada: Introduce -gnateH switch to force reverse Bit_Order threshold to 64Eric Botcazou6-2/+40
This can be helpful for legacy code that still makes use of an original reverse Bit_Order clause, i.e. without a Scalar_Storage_Order clause. gcc/ada/ * doc/gnat_ugn/building_executable_programs_with_gnat.rst (Compiler Switches): Document -gnateH. * opt.ads (Reverse_Bit_Order_Threshold): New variable. * sem_ch13.adb (Adjust_Record_For_Reverse_Bit_Order): Use its value if it is nonnegative instead of System_Max_Integer_Size. * switch-c.adb (Scan_Front_End_Switches): Deal with -gnateH. * usage.adb (Usage): Print -gnateH. * gnat_ugn.texi: Regenerate.
2023-06-20ada: Update annotations in runtime for proofYannick Moy3-1/+15
With bump of stable SPARK used for proof of the runtime, some annotations need to change. gcc/ada/ * libgnat/s-aridou.adb (Scaled_Divide): Add assertions. * libgnat/s-valuti.adb: Add Loop_Variant. * libgnat/s-valuti.ads: Add Exceptional_Cases on No_Return procedure.
2023-06-20ada: Fix type derivation of subtype of derived typeMarc Poulhiès1-3/+33
Deriving from a subtype of a derived type of a private type, whose full view is itself a derived type of a discriminated record with a known discriminatant was failing with the error message: invalid constraint: type has no discriminant The compiler needs to use the full view to be able to constrain the type. Also fix minor typo in comments. gcc/ada/ * sem_ch3.adb (Build_Derived_Record_Type): Use full view as Parent_Base if needed.
2023-06-20ada: Pass Error_Node to calls to Error_Msg in lib-load.adbGhjuvan Lacambre1-8/+23
When not passing Error_Node, Error_Msg will treat Current_Node as the node attached to the message. When this happens in lib-load.adb due to a file that cannot be loaded, Current_Node might reference a node that doesn't actually exist. This is a problem when using -gnatdJ and -fdiagnostics-format, as in this case GNAT will attempt to retrieve information from the node attached to the message and thus crash when said node is invalid. gcc/ada/ * lib-load.adb (Load_Unit): Pass Error_Node to calls to Error_Msg.
2023-06-20ada: Remove references to Might_Not_Return and Always_ReturnClaire Dross36-461/+395
The Might_Not_Return and Always_Return annotations for GNATprove should now be replaced by the two more precise aspects Exceptional_Cases and Always_Terminates. They allow to specify whether a subprogram is allowed to raise exceptions or fail to complete. gcc/ada/ * libgnat/a-strfix.ads: Replace Might_Not_Return annotations by Exceptional_Cases and Always_Terminates aspects. * libgnat/a-tideio.ads: Idem. * libgnat/a-tienio.ads: Idem. * libgnat/a-tifiio.ads: Idem. * libgnat/a-tiflio.ads: Idem. * libgnat/a-tiinio.ads: Idem. * libgnat/a-timoio.ads: Idem. * libgnat/a-textio.ads: Idem. Also mark functions Name, Col, Line, and Page as out of SPARK as they might raise Layout_Error. * libgnarl/a-reatim.ads: Replace Always_Return annotations by Always_Terminates aspects. * libgnat/a-chahan.ads: Idem. * libgnat/a-nbnbig.ads: Idem. * libgnat/a-nbnbin.ads: Idem. * libgnat/a-nbnbre.ads: Idem. * libgnat/a-ngelfu.ads: Idem. * libgnat/a-nlelfu.ads: Idem. * libgnat/a-nllefu.ads: Idem. * libgnat/a-nselfu.ads: Idem. * libgnat/a-nuelfu.ads: Idem. * libgnat/a-strbou.ads: Idem. * libgnat/a-strmap.ads: Idem. * libgnat/a-strsea.ads: Idem. * libgnat/a-strsup.ads: Idem. * libgnat/a-strunb.ads: Idem. * libgnat/a-strunb__shared.ads: Idem. * libgnat/g-souinf.ads: Idem. * libgnat/i-c.ads: Idem. * libgnat/interfac.ads: Idem. * libgnat/interfac__2020.ads: Idem. * libgnat/s-aridou.adb: Idem. * libgnat/s-arit32.adb: Idem. * libgnat/s-atacco.ads: Idem. * libgnat/s-spcuop.ads: Idem. * libgnat/s-stoele.ads: Idem. * libgnat/s-vaispe.ads: Idem. * libgnat/s-vauspe.ads: Idem. * libgnat/i-cstrin.ads: Add a precondition instead of a Might_Not_Return annotation.
2023-06-20ada: Spurious error on package instantiationJavier Miranda1-101/+146
The compiler reports spurious errors processing the instantation of a generic package when the instantation is performed in the the body of a package that has a private type T, a dispatching primitive of T has the same name as a component of T, and an extension of T is used as the actual parameter for a formal derived type of T in the instantiation. gcc/ada/ * sem_ch4.adb (Try_Selected_Component_In_Instance): New subprogram; factorizes existing code. (Find_Component_In_Instance) Moved inside the new subprogram. (Analyze_Selected_Component): Invoke the new subprogram before trying the Object.Operation notation.
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