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2024-06-24Fix MinGW option -mcrtdll=Pali Rohár3-6/+11
Add missing msvcr40* and msvcrtd* cases to CPP_SPEC and document missing _UCRT macro and msvcr71* case. Fixes commit 453cb585f0f8673a5d69d1b420ffd4b3f53aca00. gcc/ * config/i386/mingw-w64.h (CPP_SPEC): Add missing -mcrtdll= cases: msvcr40*, msvcrtd*. * config/mingw/mingw32.h (CPP_SPEC): Add missing -mcrtdll= cases: msvcr40*, msvcrtd*. * doc/invoke.texi: Add missing -mcrtdll= cases: msvcr40*, msvcrtd*, msvcr71*. Express wildcards with *. Document _UCRT.
2024-06-24Regenerate common.opt.urlsRichard Sandiford1-0/+3
gcc/ * common.opt.urls: Regenerate.
2024-06-24Add a late-combine pass [PR106594]Richard Sandiford22-37/+853
This patch adds a combine pass that runs late in the pipeline. There are two instances: one between combine and split1, and one after postreload. The pass currently has a single objective: remove definitions by substituting into all uses. The pre-RA version tries to restrict itself to cases that are likely to have a neutral or beneficial effect on register pressure. The patch fixes PR106594. It also fixes a few FAILs and XFAILs in the aarch64 test results, mostly due to making proper use of MOVPRFX in cases where we didn't previously. This is just a first step. I'm hoping that the pass could be used for other combine-related optimisations in future. In particular, the post-RA version doesn't need to restrict itself to cases where all uses are substitutable, since it doesn't have to worry about register pressure. If we did that, and if we extended it to handle multi-register REGs, the pass might be a viable replacement for regcprop, which in turn might reduce the cost of having a post-RA instance of the new pass. On most targets, the pass is enabled by default at -O2 and above. However, it has a tendency to undo x86's STV and RPAD passes, by folding the more complex post-STV/RPAD form back into the simpler pre-pass form. Also, running a pass after register allocation means that we can now match define_insn_and_splits that were previously only matched before register allocation. This trips things like: (define_insn_and_split "..." [...pattern...] "...cond..." "#" "&& 1" [...pattern...] { ...unconditional use of gen_reg_rtx ()...; } because matching and splitting after RA will call gen_reg_rtx when pseudos are no longer allowed. rs6000 has several instances of this. xtensa has a variation in which the split condition is: "&& can_create_pseudo_p ()" The failure then is that, if we match after RA, we'll never be able to split the instruction. The patch therefore disables the pass by default on i386, rs6000 and xtensa. Hopefully we can fix those ports later (if their maintainers want). It seems better to add the pass first, though, to make it easier to test any such fixes. gcc.target/aarch64/bitfield-bitint-abi-align{16,8}.c would need quite a few updates for the late-combine output. That might be worth doing, but it seems too complex to do as part of this patch. I tried compiling at least one target per CPU directory and comparing the assembly output for parts of the GCC testsuite. This is just a way of getting a flavour of how the pass performs; it obviously isn't a meaningful benchmark. All targets seemed to improve on average: Target Tests Good Bad %Good Delta Median ====== ===== ==== === ===== ===== ====== aarch64-linux-gnu 2215 1975 240 89.16% -4159 -1 aarch64_be-linux-gnu 1569 1483 86 94.52% -10117 -1 alpha-linux-gnu 1454 1370 84 94.22% -9502 -1 amdgcn-amdhsa 5122 4671 451 91.19% -35737 -1 arc-elf 2166 1932 234 89.20% -37742 -1 arm-linux-gnueabi 1953 1661 292 85.05% -12415 -1 arm-linux-gnueabihf 1834 1549 285 84.46% -11137 -1 avr-elf 4789 4330 459 90.42% -441276 -4 bfin-elf 2795 2394 401 85.65% -19252 -1 bpf-elf 3122 2928 194 93.79% -8785 -1 c6x-elf 2227 1929 298 86.62% -17339 -1 cris-elf 3464 3270 194 94.40% -23263 -2 csky-elf 2915 2591 324 88.89% -22146 -1 epiphany-elf 2399 2304 95 96.04% -28698 -2 fr30-elf 7712 7299 413 94.64% -99830 -2 frv-linux-gnu 3332 2877 455 86.34% -25108 -1 ft32-elf 2775 2667 108 96.11% -25029 -1 h8300-elf 3176 2862 314 90.11% -29305 -2 hppa64-hp-hpux11.23 4287 4247 40 99.07% -45963 -2 ia64-linux-gnu 2343 1946 397 83.06% -9907 -2 iq2000-elf 9684 9637 47 99.51% -126557 -2 lm32-elf 2681 2608 73 97.28% -59884 -3 loongarch64-linux-gnu 1303 1218 85 93.48% -13375 -2 m32r-elf 1626 1517 109 93.30% -9323 -2 m68k-linux-gnu 3022 2620 402 86.70% -21531 -1 mcore-elf 2315 2085 230 90.06% -24160 -1 microblaze-elf 2782 2585 197 92.92% -16530 -1 mipsel-linux-gnu 1958 1827 131 93.31% -15462 -1 mipsisa64-linux-gnu 1655 1488 167 89.91% -16592 -2 mmix 4914 4814 100 97.96% -63021 -1 mn10300-elf 3639 3320 319 91.23% -34752 -2 moxie-rtems 3497 3252 245 92.99% -87305 -3 msp430-elf 4353 3876 477 89.04% -23780 -1 nds32le-elf 3042 2780 262 91.39% -27320 -1 nios2-linux-gnu 1683 1355 328 80.51% -8065 -1 nvptx-none 2114 1781 333 84.25% -12589 -2 or1k-elf 3045 2699 346 88.64% -14328 -2 pdp11 4515 4146 369 91.83% -26047 -2 pru-elf 1585 1245 340 78.55% -5225 -1 riscv32-elf 2122 2000 122 94.25% -101162 -2 riscv64-elf 1841 1726 115 93.75% -49997 -2 rl78-elf 2823 2530 293 89.62% -40742 -4 rx-elf 2614 2480 134 94.87% -18863 -1 s390-linux-gnu 1591 1393 198 87.55% -16696 -1 s390x-linux-gnu 2015 1879 136 93.25% -21134 -1 sh-linux-gnu 1870 1507 363 80.59% -9491 -1 sparc-linux-gnu 1123 1075 48 95.73% -14503 -1 sparc-wrs-vxworks 1121 1073 48 95.72% -14578 -1 sparc64-linux-gnu 1096 1021 75 93.16% -15003 -1 v850-elf 1897 1728 169 91.09% -11078 -1 vax-netbsdelf 3035 2995 40 98.68% -27642 -1 visium-elf 1392 1106 286 79.45% -7984 -2 xstormy16-elf 2577 2071 506 80.36% -13061 -1 gcc/ PR rtl-optimization/106594 PR rtl-optimization/114515 PR rtl-optimization/114575 PR rtl-optimization/114996 PR rtl-optimization/115104 * Makefile.in (OBJS): Add late-combine.o. * common.opt (flate-combine-instructions): New option. * doc/invoke.texi: Document it. * opts.cc (default_options_table): Enable it by default at -O2 and above. * tree-pass.h (make_pass_late_combine): Declare. * late-combine.cc: New file. * passes.def: Add two instances of late_combine. * doc/passes.texi: Document the new passes. * config/i386/i386-options.cc (ix86_override_options_after_change): Disable late-combine by default. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise. * config/xtensa/xtensa.cc (xtensa_option_override): Likewise. gcc/testsuite/ PR rtl-optimization/106594 * gcc.dg/ira-shrinkwrap-prep-1.c: Restrict XFAIL to non-aarch64 targets. * gcc.dg/ira-shrinkwrap-prep-2.c: Likewise. * gcc.dg/stack-check-4.c: Add -fno-shrink-wrap. * gcc.target/aarch64/bitfield-bitint-abi-align16.c: Add -fno-late-combine-instructions. * gcc.target/aarch64/bitfield-bitint-abi-align8.c: Likewise. * gcc.target/aarch64/sve/cond_asrd_3.c: Remove XFAILs. * gcc.target/aarch64/sve/cond_convert_3.c: Likewise. * gcc.target/aarch64/sve/cond_fabd_5.c: Likewise. * gcc.target/aarch64/sve/cond_convert_6.c: Expect the MOVPRFX /Zs described in the comment. * gcc.target/aarch64/sve/cond_unary_4.c: Likewise. * gcc.target/aarch64/pr106594_1.c: New test.
2024-06-24rtl-ssa: Rework _ignoring interfacesRichard Sandiford13-250/+275
rtl-ssa has routines for scanning forwards or backwards for something under the control of an exclusion set. These searches are currently used for two main things: - to work out where an instruction can be moved within its EBB - to work out whether recog can add a new hard register clobber The exclusion set was originally a callback function that returned true for insns that should be ignored. However, for the late-combine work, I'd also like to be able to skip an entire definition, along with all its uses. This patch prepares for that by turning the exclusion set into an object that provides predicate member functions. Currently the only two member functions are: - should_ignore_insn: what the old callback did - should_ignore_def: the new functionality but more could be added later. Doing this also makes it easy to remove some asymmetry that I think in hindsight was a mistake: in forward scans, ignoring an insn meant ignoring all definitions in that insn (ok) and all uses of those definitions (non-obvious). The new interface makes it possible to select the required behaviour, with that behaviour being applied consistently in both directions. Now that the exclusion set is a dedicated object, rather than just a "random" function, I think it makes sense to remove the _ignoring suffix from the function names. The suffix was originally there to describe the callback, and in particular to emphasise that a true return meant "ignore" rather than "heed". gcc/ * rtl-ssa.h: Include predicates.h. * rtl-ssa/predicates.h: New file. * rtl-ssa/access-utils.h (prev_call_clobbers_ignoring): Rename to... (prev_call_clobbers): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. (next_call_clobbers_ignoring): Rename to... (next_call_clobbers): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. (first_nondebug_insn_use_ignoring): Rename to... (first_nondebug_insn_use): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. (last_nondebug_insn_use_ignoring): Rename to... (last_nondebug_insn_use): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. (last_access_ignoring): Rename to... (last_access): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. Conditionally skip definitions. (prev_access_ignoring): Rename to... (prev_access): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. (first_def_ignoring): Replace with... (first_access): ...this new function. (next_access_ignoring): Rename to... (next_access): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. Conditionally skip definitions. * rtl-ssa/change-utils.h (insn_is_changing): Delete. (restrict_movement_ignoring): Rename to... (restrict_movement): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. (recog_ignoring): Rename to... (recog): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. * rtl-ssa/changes.h (insn_is_changing_closure): Delete. * rtl-ssa/functions.h (function_info::add_regno_clobber): Treat the ignore parameter as an object with the same interface as ignore_nothing. * rtl-ssa/insn-utils.h (insn_is): Delete. * rtl-ssa/insns.h (insn_is_closure): Delete. * rtl-ssa/member-fns.inl (insn_is_changing_closure::insn_is_changing_closure): Delete. (insn_is_changing_closure::operator()): Likewise. (function_info::add_regno_clobber): Treat the ignore parameter as an object with the same interface as ignore_nothing. (ignore_changing_insns::ignore_changing_insns): New function. (ignore_changing_insns::should_ignore_insn): Likewise. * rtl-ssa/movement.h (restrict_movement_for_dead_range): Treat the ignore parameter as an object with the same interface as ignore_nothing. (restrict_movement_for_defs_ignoring): Rename to... (restrict_movement_for_defs): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. (restrict_movement_for_uses_ignoring): Rename to... (restrict_movement_for_uses): ...this and treat the ignore parameter as an object with the same interface as ignore_nothing. Conditionally skip definitions. * doc/rtl.texi: Update for above name changes. Use ignore_changing_insns instead of insn_is_changing. * config/aarch64/aarch64-cc-fusion.cc (cc_fusion::parallelize_insns): Likewise. * pair-fusion.cc (no_ignore): Delete. (latest_hazard_before, first_hazard_after): Update for above name changes. Use ignore_nothing instead of no_ignore. (pair_fusion_bb_info::fuse_pair): Update for above name changes. Use ignore_changing_insns instead of insn_is_changing. (pair_fusion::try_promote_writeback): Likewise.
2024-06-24tree-optimization/115599 - reassoc qsort comparator issueRichard Biener1-3/+10
The compare_repeat_factors comparator fails qsort checking eventually because it uses rf2->rank - rf1->rank to compare unsigned numbers which causes issues for ranks that interpret negative as signed. Fixed by re-writing the obvious way. I've also fixed the count comparison which suffers from truncation as count is 64bit signed while the comparator result is 32bit int (that's a lot less likely to hit in practice though). The testcase from the PR is too large to include. PR tree-optimization/115599 * tree-ssa-reassoc.cc (compare_repeat_factors): Use explicit compares to avoid truncations.
2024-06-24rs6000: Eliminate unnecessary byte swaps for duplicated constant vector storeHaochen Gui2-0/+34
gcc/ PR target/113325 * config/rs6000/vsx.md (vsx_stxvd2x4_le_const_<mode>): New. gcc/testsuite/ PR target/113325 * gcc.target/powerpc/pr113325.c: New.
2024-06-24fwprop: invoke change_is_worthwhile to judge if a replacement is worthwhileHaochen Gui3-24/+27
gcc/ * fwprop.cc (try_fwprop_subst_pattern): Invoke change_is_worthwhile to judge if a replacement is worthwhile. Remove single_set check and add is_debug_insn check. * recog.cc (swap_change): Invalidate recog_data when the cached INSN is swapped out. * rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Check if the insn cost of new rtl is unknown and fail the replacement.
2024-06-23[PATCH 06/11] Handle enums for CodeViewMark Harmstone2-0/+541
Translates DW_TAG_enumeration_type DIEs into LF_ENUM symbols. gcc/ * dwarf2codeview.cc (MAX_FIELDLIST_SIZE): Define. (struct codeview_integer): New structure. (struct codeview_subtype): Likewise (struct codeview_custom_type): Add lf_fieldlist and lf_enum to union. (write_cv_integer, cv_integer_len): New functions. (write_lf_fieldlist, write_lf_enum): Likewise. (write_custom_types): Call write_lf_fieldlist and write_lf_enum. (add_enum_forward_def): New function. (get_type_num_enumeration_type): Likewise. (get_type_num): Handle DW_TAG_enumeration_type DIEs. * dwarf2codeview.h (LF_FIELDLIST, LF_INDEX, LF_ENUMERATE): Define. (LF_ENUM, LF_CHAR, LF_SHORT, LF_USHORT, LF_LONG): Likewise. (LF_ULONG, LF_QUADWORD, LF_UQUADWORD): Likewise. (CV_ACCESS_PRIVATE, CV_ACCESS_PROTECTED): Likewise. (CV_ACCESS_PUBLIC, CV_PROP_FWDREF): Likewise.
2024-06-23[PATCH 05/11] Handle const and varible modifiers for CodeViewMark Harmstone2-0/+162
gcc/ * dwarf2codeview.cc (struct codeview_custom_type): Add lf_modifier to union. (write_cv_padding, write_lf_modifier): New functions. (write_custom_types): Call write_lf_modifier. (get_type_num_const_type): New function. (get_type_num_volatile_type): Likewise. (get_type_num): Handle DW_TAG_const_type and DW_TAG_volatile_type DIEs. * dwarf2codeview.h (MOD_const, MOD_volatile): Define. (LF_MODIFIER): Likewise.
2024-06-23[PATCH 04/11] Handle pointers for CodeViewMark Harmstone2-4/+188
Translates DW_TAG_pointer_type DIEs into LF_POINTER symbols, which get output into the .debug$T section. gcc/ * dwarf2codeview.cc (FIRST_TYPE): Define. (struct codeview_custom_type): New structure. (custom_types, last_custom_type): New variables. (get_type_num): Prototype. (write_lf_pointer, write_custom_types): New functions. (codeview_debug_finish): Call write_custom_types. (add_custom_type, get_type_num_pointer_type): New functions. (get_type_num): Handle DW_TAG_pointer_type DIEs. * dwarf2codeview.h (T_VOID): Define. (CV_POINTER_32, CV_POINTER_64): Likewise. (T_32PVOID, T_64PVOID): Likewise. (CV_PTR_NEAR32, CV_PTR64, LF_POINTER): Likewise.
2024-06-23[PATCH 03/11] Handle typedefs for CodeViewMark Harmstone1-0/+6
gcc/ * dwarf2codeview.cc (get_type_num): Handle typedefs.
2024-06-23[PATCH 02/11] Handle CodeView base typesMark Harmstone2-1/+218
Adds a get_type_num function to translate type DIEs into CodeView numbers, along with a hash table for this. For now we just deal with the base types (integers, Unicode chars, floats, and bools). gcc/ * dwarf2codeview.cc (struct codeview_type): New structure. (struct die_hasher): Likewise. (types_htab): New variable. (codeview_debug_finish): Free types_htab if allocated. (get_type_num_base_type, get_type_num): New function. (add_variable): Call get_type_num. * dwarf2codeview.h (T_CHAR, T_SHORT, T_LONG, T_QUAD): Define. (T_UCHAR, T_USHORT, T_ULONG, T_UQUAD, T_BOOL08): Likewise. (T_REAL32, T_REAL64, T_REAL80, T_REAL128, T_RCHAR): Likewise. (T_WCHAR, T_INT4, T_UINT4, T_CHAR16, T_CHAR32, T_CHAR8): Likewise.
2024-06-24Daily bump.GCC Administrator3-1/+86
2024-06-23[PATCH 01/11] Output CodeView data about variablesMark Harmstone3-0/+166
Parse the DW_TAG_variable DIEs, and outputs S_GDATA32 (for global variables) and S_LDATA32 (static global variables) symbols into the .debug$S section. gcc/ * dwarf2codeview.cc (S_LDATA32, S_GDATA32): Define. (struct codeview_symbol): New structure. (sym, last_sym): New variables. (write_data_symbol): New function. (write_codeview_symbols): Call write_data_symbol. (add_variable, codeview_debug_early_finish): New functions. * dwarf2codeview.h (codeview_debug_early_finish): Prototype. * dwarf2out.cc (dwarf2out_early_finish): Call codeview_debug_early_finish.
2024-06-23[PATCH] RISC-V: Fix unrecognizable pattern in riscv_expand_conditional_move()Artemiy Volkov2-1/+13
Presently, the code fragment: int x[5]; void d(int a, int b, int c) { for (int i = 0; i < 5; i++) x[i] = (a != b) ? c : a; } causes an ICE when compiled with -O2 -march=rv32i_zicond: test.c: In function 'd': test.c: error: unrecognizable insn: 11 | } | ^ (insn 8 5 9 2 (set (reg:SI 139 [ iftmp.0_2 ]) (if_then_else:SI (ne:SI (reg/v:SI 136 [ a ]) (reg/v:SI 137 [ b ])) (reg/v:SI 136 [ a ]) (reg/v:SI 138 [ c ]))) -1 (nil)) during RTL pass: vregs This happens because, as part of one of the optimizations in riscv_expand_conditional_move(), an if_then_else is generated with both comparands being register operands, resulting in an unmatchable insn since Zicond patterns require constant 0 as the second comparand. Fix this by adding a extra check before performing this optimization. The code snippet mentioned above is also included in this patch as a new Zicond testcase. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_expand_conditional_move): Add a CONST0_RTX check. gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond-ice-5.c: New test.
2024-06-23[committed][RISC-V][PR target/114139] Verify we have a CONST_INT before ↵Jeff Law2-0/+28
extracting INTVAL Run-of-the-mill checking issue. We had something like (plus (reg) (reg)) and tried to extract INTVAL (XEXP (x, 1)) which of course blows up with checking on. Fixed thusly. Tested on riscv32-elf in my tester. riscv64-elf is in flight, but won't finish for a while due to other tasks in flight. PR target/114139 gcc/ * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Verify object is a CONST_INT before looking at INTVAL. gcc/testsuite/ * gcc.target/riscv/pr114139.c: New test.
2024-06-23tree-optimization/115597 - allow CSE of two-operator VEC_PERM nodesRichard Biener1-1/+0
The following makes sure to always CSE when there's SLP_TREE_SCALAR_STMTS as otherwise a chain of two-operator node operations can result in exponential behavior of the CSE process as likely seen when building 510.parest on aarch64. PR tree-optimization/115597 * tree-vect-slp.cc (vect_cse_slp_nodes): Allow to CSE VEC_PERM nodes.
2024-06-23tree-optimization/115579 - fix wrong code with store-motionRichard Biener2-13/+32
The recent change to relax store motion for variables that cannot have store data races broke the optimization to share flag vars for stores that all happen in the same single BB. The following fixes this. PR tree-optimization/115579 * tree-ssa-loop-im.cc (execute_sm): Return the auxiliary data created. (hoist_memory_references): Record the flag var that's eventually created and re-use it when all stores are in the same BB. * gcc.dg/pr115579.c: New testcase.
2024-06-23AVX-512: Pacify -Wshift-overflow=2. [PR115409]Collin Funk2-3/+3
A shift of 31 on a signed int is undefined behavior. Since unsigned int is 32-bits wide this change fixes it and silences the warning. gcc/ChangeLog: PR target/115409 * config/i386/avx512fp16intrin.h (_mm512_conj_pch): Make the constant unsigned before shifting. * config/i386/avx512fp16vlintrin.h (_mm256_conj_pch): Likewise. (_mm_conj_pch): Likewise. Signed-off-by: Collin Funk <collin.funk1@gmail.com>
2024-06-22[PATCH] RISC-V: Fix unresolved mcpu-[67].c testsCraig Blackmore2-0/+2
These tests check the sched2 dump, so skip them for optimization levels that do not enable sched2. gcc/testsuite/ChangeLog: * gcc.target/riscv/mcpu-6.c: Skip for -O0, -O1, -Og. * gcc.target/riscv/mcpu-7.c: Likewise.
2024-06-22[PATCH v2] RISC-V: Remove integer vector eqne patterndemin.han5-275/+81
We can unify eqne and other comparison operations. Tested on RV32 and RV64. gcc/ChangeLog: * config/riscv/predicates.md (comparison_except_eqge_operator): Only exclude ge. (comparison_except_ge_operator): Ditto. * config/riscv/riscv-string.cc (expand_rawmemchr): Use cmp pattern. (expand_strcmp): Ditto. * config/riscv/riscv-vector-builtins-bases.cc: Remove eqne cond. * config/riscv/vector.md (@pred_eqne<mode>_scalar): Remove eqne patterns. (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto. (*pred_eqne<mode>_scalar): Ditto. (*pred_eqne<mode>_scalar_narrow): Ditto. (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto. (*pred_eqne<mode>_extended_scalar): Ditto. (*pred_eqne<mode>_extended_scalar_narrow): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/integer-cmp-eqne.c: New test.
2024-06-23Daily bump.GCC Administrator3-1/+11
2024-06-22[committed] [RISC-V] Skip zbs-ext-2.c for -Oz as wellJeff Law1-1/+1
> the test should probably also be skipped on -Oz: > > === gcc: Unexpected fails for rv64imafdc lp64d medlow === > FAIL: gcc.target/riscv/zbs-ext-2.c -Oz scan-assembler-times andi\t 1 > FAIL: gcc.target/riscv/zbs-ext-2.c -Oz scan-assembler-times andn\t 1 > FAIL: gcc.target/riscv/zbs-ext-2.c -Oz scan-assembler-times li\t 1 Yea. Just re-ran thing and sure enough we need to skip -Oz as well. So committing the obvious change.... gcc/testsuite/ * gcc.target/riscv/zbs-ext-2.c: Also skip for -Oz.
2024-06-22libstdc++: Move gcc.gnu.org and sourceware.org links to httpsGerald Pfeifer2-9/+9
libstdc++-v3: * doc/xml/manual/debug.xml: Move gcc.gnu.org link to https. Ditto for sourceware.org links. * doc/html/manual/debug.html: Regenerate.
2024-06-22Daily bump.GCC Administrator6-1/+521
2024-06-21diagnostics: remove duplicate copies of diagnostic_kind_textDavid Malcolm4-14/+12
No functional change intended. gcc/ChangeLog: * diagnostic-format-json.cc (json_output_format::on_end_diagnostic): Use get_diagnostic_kind_text rather than embedding a duplicate copy of the table. * diagnostic-format-sarif.cc (make_rule_id_for_diagnostic_kind): Likewise. * diagnostic.cc (get_diagnostic_kind_text): New. * diagnostic.h (get_diagnostic_kind_text): New decl. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-21diagnostics: move diagnostic_{event,path} functions to diagnostic-path.ccDavid Malcolm2-168/+168
No functional change intended. gcc/ChangeLog: * diagnostic-path.cc (diagnostic_event::meaning::dump_to_pp): Move here from diagnostic.cc. (diagnostic_event::meaning::maybe_get_verb_str): Likewise. (diagnostic_event::meaning::maybe_get_noun_str): Likewise. (diagnostic_event::meaning::maybe_get_property_str): Likewise. (diagnostic_path::get_first_event_in_a_function): Likewise. (diagnostic_path::interprocedural_p): Likewise. (debug): Likewise for diagnostic_path * overload. * diagnostic.cc (diagnostic_event::meaning::dump_to_pp): Move from here to diagnostic-path.cc. (diagnostic_event::meaning::maybe_get_verb_str): Likewise. (diagnostic_event::meaning::maybe_get_noun_str): Likewise. (diagnostic_event::meaning::maybe_get_property_str): Likewise. (diagnostic_path::get_first_event_in_a_function): Likewise. (diagnostic_path::interprocedural_p): Likewise. (debug): Likewise for diagnostic_path * overload. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-21[committed] Fix testsuite fallout on stormy16 after IOR->PLUS changeJeff Law1-0/+14
More minor fallout from the IOR->PLUS change a little while ago. This time on xstormy16. The pattern to swap nibbles actually tries to handle all the cases of IOR, XOR and PLUS. But when we generate PLUS earlier in the pipeline, the simplifications/canonicalizations are slightly different resulting in the pattern not matching. This patch adds an alternate pattern which matches what we get now. Basically it looks like QImode rotate by 4, zero extended to HI. Run in my tester to verify the regression was fixed. Pushing to the trunk. gcc/ * config/stormy16/stormy16.md (swpn_zext): New pattern.
2024-06-21libstdc++: Remove std::__is_pointer and std::__is_scalar [PR115497]Jonathan Wakely1-33/+0
This removes the std::__is_pointer and std::__is_scalar traits, as they conflicts with a Clang built-in. Although Clang has a hack to make the class templates work despite using reserved names, removing these class templates will allow that hack to be dropped at some future date. libstdc++-v3/ChangeLog: PR libstdc++/115497 * include/bits/cpp_type_traits.h (__is_pointer, __is_scalar): Remove. (__is_arithmetic): Do not use __is_pointer in the primary template. Add partial specialization for pointers.
2024-06-21libstdc++: Remove std::__is_void class template [PR115497]Jonathan Wakely2-18/+2
This removes the std::__is_void trait, as it conflicts with a Clang built-in. There is only one use of the trait, which can easily be replaced by simpler code. Although Clang has a hack to make the class template work despite using a reserved name, removing std::__is_void will allow that hack to be dropped at some future date. libstdc++-v3/ChangeLog: PR libstdc++/115497 * include/bits/cpp_type_traits.h (__is_void): Remove. * include/debug/helper_functions.h (_Distance_traits): Adjust partial specialization to match void directly, instead of using __is_void<T>::__type and matching __true_type.
2024-06-21libstdc++: Stop using std::__is_pointer in <deque> and <algorithm> [PR115497]Jonathan Wakely2-11/+21
This replaces all uses of the std::__is_pointer type trait with uses of the new __is_pointer built-in. Since the class template was only used to enable some performance optimizations for algorithms, we can use the built-in when __has_builtin(__is_pointer) is true (which is the case for GCC trunk and for current versions of Clang) and just forego the optimization otherwise. Removing the uses of std::__is_pointer means it can be removed from <bits/cpp_type_traits.h>, which is another step towards fixing PR 115497. libstdc++-v3/ChangeLog: PR libstdc++/115497 * include/bits/deque.tcc (__lex_cmp_dit): Replace __is_pointer class template with __is_pointer(T) built-in. (__lexicographical_compare_aux1): Likewise. * include/bits/stl_algobase.h (__equal_aux1): Likewise. (__lexicographical_compare_aux1): Likewise.
2024-06-21libstdc++: Don't use std::__is_scalar in std::valarray initialization [PR115497]Jonathan Wakely1-2/+2
This removes the use of the std::__is_scalar trait from <valarray>, where it can be replaced by __is_trivial. It's used to decide whether we can use memset to value-initialize valarray elements, but memset is suitable for any trivial types, because value-initializing them is equivalent to filling them with zeros. This is another step towards removing the class templates in <bits/cpp_type_traits.h> that conflict with Clang built-in names. libstdc++-v3/ChangeLog: PR libstdc++/115497 * include/bits/valarray_array.h (__valarray_default_construct): Use __is_trivial(_Tp). instead of __is_scalar<_Tp>.
2024-06-21libstdc++: Fix std::fill and std::fill_n optimizations [PR109150]Jonathan Wakely3-30/+173
As noted in the PR, the optimization used for scalar types in std::fill and std::fill_n is non-conforming, because it doesn't consider that assigning a scalar type might have non-trivial side effects which are affected by the optimization. By changing the condition under which the optimization is done we ensure it's only performed when safe to do so, and we also enable it for additional types, which was the original subject of the PR. Instead of two overloads using __enable_if<__is_scalar<T>::__value, R> we can combine them into one and create a local variable which is either a local copy of __value or another reference to it, depending on whether the optimization is allowed. This removes a use of std::__is_scalar, which is a step towards fixing PR 115497 by removing std::__is_pointer from <bits/cpp_type_traits.h> libstdc++-v3/ChangeLog: PR libstdc++/109150 * include/bits/stl_algobase.h (__fill_a1): Combine the !__is_scalar and __is_scalar overloads into one and rewrite the condition used to decide whether to perform the load outside the loop. * testsuite/25_algorithms/fill/109150.cc: New test. * testsuite/25_algorithms/fill_n/109150.cc: New test.
2024-06-21libstdc++: Fix test on x86_64 and non-simd targetsMatthias Kretz1-2/+4
* Running a test compiled with AVX512 instructions requires avx512f_runtime not just avx512f. * The 'reduce2' test violated an invariant of fixed_size_simd_mask and thus failed on all targets without 16-Byte vector builtins enabled (in bits/simd.h). Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/115575 * testsuite/experimental/simd/pr115454_find_last_set.cc: Require avx512f_runtime. Don't memcpy fixed_size masks.
2024-06-21xstormy16: Fix xs_hi_nonmemory_operandRichard Sandiford1-1/+1
All uses of xs_hi_nonmemory_operand allow constraint "i", which means that they allow consts, symbol_refs and label_refs. The definition of xs_hi_nonmemory_operand accounted for consts, but not for symbol_refs and label_refs. gcc/ * config/stormy16/predicates.md (xs_hi_nonmemory_operand): Handle symbol_ref and label_ref.
2024-06-21iq2000: Fix test and branch instructionsRichard Sandiford2-3/+3
The iq2000 test and branch instructions had patterns like: [(set (pc) (if_then_else (eq (and:SI (match_operand:SI 0 "register_operand" "r") (match_operand:SI 1 "power_of_2_operand" "I")) (const_int 0)) (match_operand 2 "pc_or_label_operand" "") (match_operand 3 "pc_or_label_operand" "")))] power_of_2_operand allows any 32-bit power of 2, whereas "I" only accepts 16-bit signed constants. This meant that any power of 2 greater than 32768 would cause an "insn does not satisfy its constraints" ICE. Also, the %p operand modifier barfed on 1<<31, which is sign- rather than zero-extended to 64 bits. The code is inherently limited to 32-bit operands -- power_of_2_operand contains a test involving "unsigned" -- so this patch just ands with 0xffffffff. gcc/ * config/iq2000/iq2000.cc (iq2000_print_operand): Make %p handle 1<<31. * config/iq2000/iq2000.md: Remove "I" constraints on power_of_2_operands.
2024-06-21rtl-ssa: Don't cost no-op movesRichard Sandiford2-2/+11
No-op moves are given the code NOOP_MOVE_INSN_CODE if we plan to delete them later. Such insns shouldn't be costed, partly because they're going to disappear, and partly because targets won't recognise the insn code. gcc/ * rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Don't cost no-op moves. * rtl-ssa/insns.cc (insn_info::calculate_cost): Likewise.
2024-06-21Print "Global Exported" to dump_file from set_range_info.Andrew MacLeod3-98/+47
* gimple-range.cc (gimple_ranger::register_inferred_ranges): Do not dump global range info after set_range_info. (gimple_ranger::register_transitive_inferred_ranges): Likewise. (dom_ranger::range_of_stmt): Likewise. * tree-ssanames.cc (set_range_info): If global range info changes, maybe print new range to dump_file. * tree-vrp.cc (remove_unreachable::handle_early): Do not dump global range info after set_range_info. (remove_unreachable::remove): Likewise. (remove_unreachable::remove_and_update_globals): Likewise. (pass_assumptions::execute): Likewise.
2024-06-21Change fast VRP algorithmAndrew MacLeod3-152/+90
Change the fast VRP algorithm to track contextual ranges active within each basic block. * gimple-range.cc (dom_ranger::dom_ranger): Create a block vector. (dom_ranger::~dom_ranger): Dispose of the block vector. (dom_ranger::edge_range): Delete. (dom_ranger::range_on_edge): Combine range in src BB with any range gori_nme_on_edge returns. (dom_ranger::range_in_bb): Combine global range with any active contextual range for an ssa-name. (dom_ranger::range_of_stmt): Fix non-ssa LHS case, use fur_depend for folding so relations can be registered. (dom_ranger::maybe_push_edge): Delete. (dom_ranger::pre_bb): Create incoming contextual range vector. (dom_ranger::post_bb): Free contextual range vector. * gimple-range.h (dom_ranger::edge_range): Delete. (dom_ranger::m_e0): Delete. (dom_ranger::m_e1): Delete. (dom_ranger::m_bb): New. (dom_ranger::m_pop_list): Delete. * tree-vrp.cc (execute_fast_vrp): Enable relation oracle.
2024-06-21Add builtin_unreachable processing for fast_vrp.Andrew MacLeod1-11/+41
Add a remove_unreachable object to fast vrp, and honor the final_p flag. * tree-vrp.cc (remove_unreachable::remove): Export global range if builtin_unreachable dominates all uses. (remove_unreachable::remove_and_update_globals): Do not reset SCEV. (execute_ranger_vrp): Reset SCEV here instead. (fvrp_folder::fvrp_folder): Take final pass flag and create a remove_unreachable object when specified. (fvrp_folder::pre_fold_stmt): Register GIMPLE_CONDs with the remove_unreachcable object. (fvrp_folder::m_unreachable): New. (execute_fast_vrp): Process remove_unreachable object. (pass_vrp::execute): Add final_p flag to execute_fast_vrp.
2024-06-21testsuite: check that generated .sarif files validate against the SARIF ↵David Malcolm4-0/+3410
schema [PR109360] This patch extends the dg directive verify-sarif-file so that if the "jsonschema" tool is available, it will be used to validate the generated .sarif file. Tested with jsonschema 3.2 with Python 3.8 gcc/ChangeLog: PR testsuite/109360 * doc/install.texi: Mention optional usage of "jsonschema" tool. gcc/testsuite/ChangeLog: PR testsuite/109360 * lib/sarif-schema-2.1.0.json: New file, downloaded from https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/schemas/sarif-schema-2.1.0.json Licensing information can be seen at https://github.com/oasis-tcs/sarif-spec/issues/583 which states "They are free to incorporate it into their implementation. No need for special permission or paperwork from OASIS." * lib/scansarif.exp (verify-sarif-file): If "jsonschema" is available, use it to verify that the .sarif file complies with the SARIF schema. * lib/target-supports.exp (check_effective_target_jsonschema): New. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-21diagnostics: fixes to SARIF output [PR109360]David Malcolm2-21/+56
When adding validation of .sarif files against the schema (PR testsuite/109360) I discovered various issues where we were generating invalid .sarif files. Specifically, in c-c++-common/diagnostic-format-sarif-file-bad-utf8-pr109098-1.c the relatedLocations for the "note" diagnostics were missing column numbers, leading to validation failure due to non-unique elements, such as multiple: "message": {"text": "invalid UTF-8 character <bf>"}}, on line 25 with no column information. Root cause is that for some diagnostics in libcpp we have a location_t representing the line as a whole, setting a column_override on the rich_location (since the line hasn't been fully read yet). We were handling this column override for plain text output, but not for .sarif output. Similarly, in diagnostic-format-sarif-file-pr111700.c there is a warning emitted on "line 0" of the file, whereas SARIF requires line numbers to be positive. We also use column == 0 internally to mean "the line as a whole", whereas SARIF required column numbers to be positive. This patch fixes these various issues. gcc/ChangeLog: PR testsuite/109360 * diagnostic-format-sarif.cc (sarif_builder::make_location_object): Pass any column override from rich_loc to maybe_make_physical_location_object. (sarif_builder::maybe_make_physical_location_object): Add "column_override" param and pass it to maybe_make_region_object. (sarif_builder::maybe_make_region_object): Add "column_override" param and use it when the location has 0 for a column. Don't add "startLine", "startColumn", "endLine", or "endColumn" if the values aren't positive. (sarif_builder::maybe_make_region_object_for_context): Don't add "startLine" or "endLine" if the values aren't positive. libcpp/ChangeLog: PR testsuite/109360 * include/rich-location.h (rich_location::get_column_override): New accessor. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-21libstdc++: Qualify calls in <bits/stl_uninitialized.h> to prevent ADLJonathan Wakely1-4/+4
libstdc++-v3/ChangeLog: * include/bits/stl_uninitialized.h (uninitialized_default_construct) (uninitialized_default_construct_n, uninitialized_value_construct) (uninitialized_value_construct_n): Qualify calls to prevent ADL.
2024-06-21libstdc++: Make std::any_cast<void> ill-formed (LWG 3305)Jonathan Wakely2-0/+23
LWG 3305 was approved earlier this year in Tokyo. We need to give an error if using std::any_cast<void>, but std::any_cast<void()> is valid (but always returns null). libstdc++-v3/ChangeLog: * include/std/any (any_cast(any*), any_cast(const any*)): Add static assertion to reject void types, as per LWG 3305. * testsuite/20_util/any/misc/lwg3305.cc: New test.
2024-06-21libstdc++: Undeprecate std::pmr::polymorphic_allocator::destroy (P2875R4)Jonathan Wakely1-1/+0
This member function was previously deprecated, but that was reverted by P2875R4, approved earlier this year in Tokyo. Since it's not going to be deprecated in C++26, and so presumably not removed, there is no point in giving deprecated warnings for C++23 mode. libstdc++-v3/ChangeLog: * include/bits/memory_resource.h (polymorphic_allocator::destroy): Remove deprecated attribute.
2024-06-21libstdc++: Add deprecation warnings to <strstream> typesJonathan Wakely2-8/+24
libstdc++-v3/ChangeLog: * include/backward/backward_warning.h: Adjust comments to suggest <spanstream> as another alternative to <strstream>. * include/backward/strstream (strstreambuf, istrstream) (ostrstream, strstream): Add deprecated attribute.
2024-06-21libstdc++: Add [[deprecated]] to std::wstring_convert and std::wbuffer_convertJonathan Wakely14-3/+17
These were deprecated in C++17 and std::wstring_convert is planned for removal in C++26. libstdc++-v3/ChangeLog: * include/bits/locale_conv.h (wstring_convert): Add deprecated attribute for C++17 and later. (wbuffer_convert): Likewise. * testsuite/22_locale/codecvt/codecvt_utf16/79980.cc: Disable deprecated warnings. * testsuite/22_locale/codecvt/codecvt_utf8/79980.cc: Likewise. * testsuite/22_locale/codecvt/codecvt_utf8_utf16/79511.cc: Likewise. * testsuite/22_locale/conversions/buffer/1.cc: Add dg-warning. * testsuite/22_locale/conversions/buffer/2.cc: Likewise. * testsuite/22_locale/conversions/buffer/3.cc: Likewise. * testsuite/22_locale/conversions/buffer/requirements/typedefs.cc: Likewise. * testsuite/22_locale/conversions/string/1.cc: Likewise. * testsuite/22_locale/conversions/string/2.cc: Likewise. * testsuite/22_locale/conversions/string/3.cc: Likewise. * testsuite/22_locale/conversions/string/66441.cc: Likewise. * testsuite/22_locale/conversions/string/requirements/typedefs-2.cc: Likewise. * testsuite/22_locale/conversions/string/requirements/typedefs.cc: Likewise.
2024-06-21libstdc++: Fix __cpp_lib_chrono for old std::string ABIJonathan Wakely3-3/+11
The <chrono> header is incomplete for the old std::string ABI, because std::chrono::tzdb is only defined for the new ABI. The feature test macro advertising full C++20 support should not be defined for the old ABI. libstdc++-v3/ChangeLog: * include/bits/version.def (chrono): Add cxx11abi = yes. * include/bits/version.h: Regenerate. * testsuite/std/time/syn_c++20.cc: Adjust expected value for the feature test macro.
2024-06-21libstdc++: Fix std::to_array for trivial-ish types [PR115522]Jonathan Wakely2-2/+39
Due to PR c++/85723 the std::is_trivial trait is true for types with a deleted default constructor, so the use of std::is_trivial in std::to_array is not sufficient to ensure the type can be trivially default constructed then filled using memcpy. I also forgot that a type with a deleted assignment operator can still be trivial, so we also need to check that it's assignable because the is_constant_evaluated() path can't use memcpy. Replace the uses of std::is_trivial with std::is_trivially_copyable (needed for memcpy), std::is_trivially_default_constructible (needed so that the default construction is valid and does no work) and std::is_copy_assignable (needed for the constant evaluation case). libstdc++-v3/ChangeLog: PR libstdc++/115522 * include/std/array (to_array): Workaround the fact that std::is_trivial is not sufficient to check that a type is trivially default constructible and assignable. * testsuite/23_containers/array/creation/115522.cc: New test.
2024-06-21libstdc++: Initialize base in test allocator's constructorJonathan Wakely1-1/+1
This fixes a warning from one of the test allocators: warning: base class 'class std::allocator<__gnu_test::copy_tracker>' should be explicitly initialized in the copy constructor [-Wextra] libstdc++-v3/ChangeLog: * testsuite/util/testsuite_allocator.h (tracker_allocator): Initialize base class in copy constructor.