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2024-05-21ada: Remove duplicate statementRonan Desplanques1-1/+0
This patch removes a duplicate statement that was useless and could be misleading to the reader by suggesting that there are multiple global variables named Style_Check, while there is just one. gcc/ada/ * frontend.adb (Frontend): Remove duplicate statement.
2024-05-21ada: Remove useless trampolines caused by Unchecked_ConversionEric Botcazou1-13/+16
The partial solution implemented in Validate_Unchecked_Conversion to support unchecked conversions between addresses and pointers to subprograms, for the platforms where pointers to subprograms do not all have the same size, turns out to be counter-productive for others because it may cause the creation of useless trampolines, which in turn makes the stack executable. gcc/ada/ * sem_ch13.adb (Validate_Unchecked_Conversion): Restrict forcing the Can_Use_Internal_Rep flag to platforms that require unnesting.
2024-05-21ada: Add elaboration switch tags to info messagesViljar Indus1-5/+8
Add the ?$? insertion characters for elaboration message so they would be marked with the [-gnatel] tag. Note that these insertion characters were not added for SPARK elaboration messages: gcc/ada/ * sem_elab.adb: Add missing elaboration insertion characters to info messages.
2024-05-21ada: Simplify management of scopes while inliningPiotr Trojanek1-15/+4
Code cleanup; semantics is unaffected. gcc/ada/ * inline.adb (Add_Scope_To_Clean): Use Append_Unique_Elmt. (Analyze_Inlined_Bodies): Refine type of a local counter; remove extra whitespace.
2024-05-21ada: Remove some explicit yields in tasking run-timeRonan Desplanques2-36/+0
This patch removes three occurrences where tasking run-time subprograms yielded control shortly before conditional calls to Sleep, in order to avoid these calls more often. It was intended as an optimization on systems where calls to Sleep are costly and in particular VMS. A problem was that two of the yields contained data races that were reported by thread sanitizing tools on some platforms, and that's the motivation for removing them. gcc/ada/ * libgnarl/s-taenca.adb (Wait_For_Completion): Remove call to Yield. * libgnarl/s-tasren.adb (Timed_Selective_Wait, Wait_For_Call): Remove calls to Yield.
2024-05-21ada: Fix formatting in list of implemented Ada 2012 featuresPiotr Trojanek2-6/+6
Fix formatting; meaning is unaffected. gcc/ada/ * doc/gnat_rm/implementation_of_ada_2012_features.rst: Fix formatting. * gnat_rm.texi: Regenerate.
2024-05-21ada: Sort list of implemented Ada 2012 featuresPiotr Trojanek2-1831/+1831
The list of implemented Ada 2012 features is now ordered by the AI numbers. It has been sorted mechanically using the csplit command with a bit of shell scripting. gcc/ada/ * doc/gnat_rm/implementation_of_ada_2012_features.rst: Order list by AI number. * gnat_rm.texi: Regenerate.
2024-05-21ada: Fix index entry for an implemented AI featurePiotr Trojanek2-2/+2
Fix inconsistent reference with "05" in the name of AI. gcc/ada/ * doc/gnat_rm/implementation_of_ada_2012_features.rst (AI-0216): Fix index reference. * gnat_rm.texi: Regenerate.
2024-05-21ada: Update documentation of warning messagesViljar Indus2-15/+15
Update the documentation of warning messages that only emit info messages to clearly reflect that they only emit info messages and not warning messages. gcc/ada/ * doc/gnat_ugn/building_executable_programs_with_gnat.rst: Update the documentation of -gnatw.n and -gnatw.l * gnat_ugn.texi: Regenerate.
2024-05-21ada: Do not leak tagged type names when Discard_Names is enabledPiotr Trojanek4-10/+41
When both pragmas Discard_Names and No_Tagged_Streams apply to a tagged type, the intended behavior is to prevent type names from leaking into object code, as documented in GNAT RM. However, while Discard_Names can be used as a configuration pragma, No_Tagged_Streams must be applied to each type separately. This patch enables the use of restriction No_Streams, which can be activated globally, instead of No_Tagged_Streams on individual types. When no tagged stream object can be created and allocated, then routines that make use of the External_Tag won't be used. gcc/ada/ * doc/gnat_rm/implementation_defined_pragmas.rst (No_Tagged_Streams): Document how to avoid exposing entity names for the entire partition. * exp_disp.adb (Make_DT): Make use of restriction No_Streams. * exp_put_image.adb (Build_Record_Put_Image_Procedure): Respect Discard_Names in the generated Put_Image procedure. * gnat_rm.texi: Regenerate.
2024-05-21ada: Remove conversion from String_Id to String and back to String_IdPiotr Trojanek1-4/+2
Code cleanup; semantics is unaffected. gcc/ada/ * exp_put_image.adb (Build_Record_Put_Image_Procedure): Remove useless conversions.
2024-05-21ada: Remove trailing NUL in minimal expansion of Put_Image attributePiotr Trojanek1-1/+3
When procedure that implements Put_Image attribute emits the type name, this name was wrongly followed by a NUL character. gcc/ada/ * exp_put_image.adb (Build_Record_Put_Image_Procedure): Remove trailing NUL from the fully qualified type name.
2024-05-21ada: Follow-up fix to previous change for Text_PtrEric Botcazou1-1/+1
The variable would be saved and restored while still uninitialized. gcc/ada/ * err_vars.ads (Error_Msg_Sloc): Initialize to No_Location.
2024-05-21ada: Add new Mingw task priority mappingJustin Squirek5-228/+289
This patch adds a new mapping (Non_FIFO_Underlying_Priorities) for dynamically setting task priorities in Windows when pragma Task_Dispatching_Policy (FIFO_Within_Priorities) is not present. Additionally, it documents the requirement to specify the pragma in order to use Set_Priority in the general case. gcc/ada/ * doc/gnat_ugn/platform_specific_information.rst: Add note about different priority level granularities under different policies in Windows and move POSIX related info into new section. * libgnarl/s-taprop.ads: Add note about Task_Dispatching_Policy. * libgnarl/s-taprop__mingw.adb: (Set_Priority): Add use of Non_FIFO_Underlying_Priorities. * libgnat/system-mingw.ads: Add documentation for modifying priority mappings and add alternative mapping Non_FIFO_Underlying_Priorities. * gnat_ugn.texi: Regenerate.
2024-05-21Use pblendw instead of pand to clear upper 16 bits.liuhongt2-4/+48
For vec_pack_truncv8si/v4si w/o AVX512, (const_vector:v4si (const_int 0xffff) x4) is used as mask to clear upper 16 bits, but vpblendw with zero_vector can also be used, and zero vector is cheaper than (const_vector:v4si (const_int 0xffff) x4). gcc/ChangeLog: PR target/114427 * config/i386/i386-expand.cc (expand_vec_perm_even_odd_pack): Use pblendw instead of pand to clear upper bits. gcc/testsuite/ChangeLog: * gcc.target/i386/pr114427.c: New test.
2024-05-20testsuite, rs6000: Make powerpc_altivec consider current_compiler_flags ↵Kewen Lin1-1/+1
[PR114842] As noted in PR114842, most of the test cases which require effective target check powerpc_altivec_ok actually care about if ALTIVEC feature is enabled, and they should adopt effective target powerpc_altivec instead. By considering we already have a number of test cases having explicit -maltivec in dg-options etc., to keep them still be tested as before even without altivec enabled by default, this patch makes powerpc_altivec consider current_compiler_flags like what we do for powerpc_vsx. PR testsuite/114842 gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_powerpc_altivec): Take current_compiler_flags into account.
2024-05-20testsuite, rs6000: Make powerpc_vsx consider current_compiler_flags [PR114842]Kewen Lin1-1/+1
As noted in PR114842, most of the test cases which require effective target check powerpc_vsx_ok actually care about if VSX feature is enabled, and they should adopt effective target powerpc_vsx instead. By considering we already have a number of test cases having explicit -mvsx in dg-options etc., to keep them still be tested as before even without vsx enabled by default, this patch is to make powerpc_vsx consider current_compiler_flags. PR testsuite/114842 gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_powerpc_vsx): Take current_compiler_flags into account.
2024-05-20testsuite, rs6000: Remove effective target powerpc_405_nocacheKewen Lin32-48/+5
With the introduction of -mdejagnu-cpu=, when the test case is specifying -mdejagnu-cpu=405, it would override the other possibly given -mcpu=, so it would compile for PowerPC 405 for sure. This patch is to remove the effective target powerpc_405_nocache and update all its uses. gcc/testsuite/ChangeLog: * gcc.target/powerpc/405-dlmzb-strlen-1.c: Remove the line using powerpc_405_nocache check. * gcc.target/powerpc/405-macchw-1.c: Likewise. * gcc.target/powerpc/405-macchw-2.c: Likewise. * gcc.target/powerpc/405-macchwu-1.c: Likewise. * gcc.target/powerpc/405-macchwu-2.c: Likewise. * gcc.target/powerpc/405-machhw-1.c: Likewise. * gcc.target/powerpc/405-machhw-2.c: Likewise. * gcc.target/powerpc/405-machhwu-1.c: Likewise. * gcc.target/powerpc/405-machhwu-2.c: Likewise. * gcc.target/powerpc/405-maclhw-1.c: Likewise. * gcc.target/powerpc/405-maclhw-2.c: Likewise. * gcc.target/powerpc/405-maclhwu-1.c: Likewise. * gcc.target/powerpc/405-maclhwu-2.c: Likewise. * gcc.target/powerpc/405-mulchw-1.c: Likewise. * gcc.target/powerpc/405-mulchw-2.c: Likewise. * gcc.target/powerpc/405-mulchwu-1.c: Likewise. * gcc.target/powerpc/405-mulchwu-2.c: Likewise. * gcc.target/powerpc/405-mulhhw-1.c: Likewise. * gcc.target/powerpc/405-mulhhw-2.c: Likewise. * gcc.target/powerpc/405-mulhhwu-1.c: Likewise. * gcc.target/powerpc/405-mulhhwu-2.c: Likewise. * gcc.target/powerpc/405-mullhw-1.c: Likewise. * gcc.target/powerpc/405-mullhw-2.c: Likewise. * gcc.target/powerpc/405-mullhwu-1.c: Likewise. * gcc.target/powerpc/405-mullhwu-2.c: Likewise. * gcc.target/powerpc/405-nmacchw-1.c: Likewise. * gcc.target/powerpc/405-nmacchw-2.c: Likewise. * gcc.target/powerpc/405-nmachhw-1.c: Likewise. * gcc.target/powerpc/405-nmachhw-2.c: Likewise. * gcc.target/powerpc/405-nmaclhw-1.c: Likewise. * gcc.target/powerpc/405-nmaclhw-2.c: Likewise. * lib/target-supports.exp (check_effective_target_powerpc_405_nocache): Remove.
2024-05-20libgcc, rs6000: Remove powerpcspe related codeKewen Lin16-1036/+1
Since r9-4728 the powerpcspe support had been removed, this follow-up patch is to remove the remaining pieces in libgcc. libgcc/ChangeLog: * config.host: Remove powerpc-*-eabispe* support. * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Remove __SPE__ code. * config/rs6000/t-savresfgpr (LIB2ADD_ST): Remove e500crtres32gpr.S, e500crtres32gpr.S, e500crtsav64gpr.S, e500crtsav64gprctr.S, e500crtres64gpr.S, e500crtsav32gpr.S, e500crtsavg32gpr.S, e500crtres64gprctr.S, e500crtsavg64gprctr.S, e500crtresx32gpr.S, e500crtrest32gpr.S, e500crtrest64gpr.S and e500crtresx64gpr.S. * config/rs6000/e500crtres32gpr.S: Remove. * config/rs6000/e500crtres64gpr.S: Remove. * config/rs6000/e500crtres64gprctr.S: Remove. * config/rs6000/e500crtrest32gpr.S: Remove. * config/rs6000/e500crtrest64gpr.S: Remove. * config/rs6000/e500crtresx32gpr.S: Remove. * config/rs6000/e500crtresx64gpr.S: Remove. * config/rs6000/e500crtsav32gpr.S: Remove. * config/rs6000/e500crtsav64gpr.S: Remove. * config/rs6000/e500crtsav64gprctr.S: Remove. * config/rs6000/e500crtsavg32gpr.S: Remove. * config/rs6000/e500crtsavg64gpr.S: Remove. * config/rs6000/e500crtsavg64gprctr.S: Remove.
2024-05-20testsuite, rs6000: Remove powerpcspe test cases and checksKewen Lin6-162/+5
Since r9-4728 the powerpcspe support had been removed, this follow-up patch is to remove the remaining pieces in testsuite. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_vect_cmdline_needed): Remove check_effective_target_powerpc_spe. (check_effective_target_powerpc_spe_nocache): Remove. (check_effective_target_powerpc_spe): Remove. (check_ppc_cpu_supports_hw_available): Remove powerpc*-*-eabispe check. (check_p8vector_hw_available): Likewise. (check_p9vector_hw_available): Likewise. (check_p9modulo_hw_available): Likewise. (check_ppc_float128_sw_available): Likewise. (check_ppc_float128_hw_available): Likewise. (check_vsx_hw_available): Likewise. (check_vmx_hw_available): Likewise. (check_ppc_recip_hw_available): Likewise. (check_dfp_hw_available): Likewise. (check_htm_hw_available): Likewise. * g++.dg/ext/spe1.C: Remove. * g++.dg/other/opaque-1.C: Remove. * g++.dg/other/opaque-2.C: Remove. * g++.dg/other/opaque-3.C: Remove. * g++.target/powerpc/simd-5.C: Remove.
2024-05-20testsuite, rs6000: Remove powerpc_popcntb_okKewen Lin4-23/+6
There are three uses of effective target powerpc_popcntb_ok, they are all for compiling, but powerpc_popcntb_ok checks for executable generation, which is too heavy. This patch is to remove powerpc_popcntb_ok and adjust its three uses accordingly. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_powerpc_popcntb_ok): Remove. * gcc.target/powerpc/cmpb-2.c: Adjust with dg-skip-if as powerpc_popcntb_ok gets removed. * gcc.target/powerpc/cmpb-3.c: Likewise. * gcc.target/powerpc/cmpb32-2.c: Likewise.
2024-05-20testsuite, rs6000: Remove all linux*paired* checks and casesKewen Lin12-397/+20
Since r9-115-g559289370f76bf the support of paired single had been dropped, but we still have some test checks and cases for that, this patch is to get rid of them. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_vect_int): Remove the check on powerpc-*-linux*paired*. (check_effective_target_vect_intfloat_cvt): Likewise. (check_effective_target_vect_uintfloat_cvt): Likewise. (check_effective_target_vect_floatint_cvt): Likewise. (check_effective_target_vect_floatuint_cvt): Likewise. (check_effective_target_powerpc_altivec_ok): Likewise. (check_effective_target_powerpc_p9modulo_ok): Likewise. (check_effective_target_powerpc_float128_sw_ok): Likewise. (check_effective_target_powerpc_float128_hw_ok): Likewise. (check_effective_target_powerpc_vsx_ok): Likewise. (check_effective_target_powerpc_htm_ok): Likewise. (check_effective_target_vect_shift): Likewise. (check_effective_target_vect_char_add): Likewise. (check_effective_target_vect_shift_char): Likewise. (check_effective_target_vect_long): Likewise. (check_effective_target_ifn_copysign): Likewise. (check_effective_target_vect_sdot_hi): Likewise. (check_effective_target_vect_udot_hi): Likewise. (check_effective_target_vect_pack_trunc): Likewise. (check_effective_target_vect_int_mult): Likewise. * gcc.target/powerpc/paired-1.c: Remove. * gcc.target/powerpc/paired-10.c: Remove. * gcc.target/powerpc/paired-2.c: Remove. * gcc.target/powerpc/paired-3.c: Remove. * gcc.target/powerpc/paired-4.c: Remove. * gcc.target/powerpc/paired-5.c: Remove. * gcc.target/powerpc/paired-6.c: Remove. * gcc.target/powerpc/paired-7.c: Remove. * gcc.target/powerpc/paired-8.c: Remove. * gcc.target/powerpc/paired-9.c: Remove. * gcc.target/powerpc/ppc-paired.c: Remove.
2024-05-20testsuite, rs6000: Remove some checks with aix[456]Kewen Lin1-29/+0
Since r12-75-g0745b6fa66c69c aix6 support had been dropped, so we don't need to check for aix[456].* when testing, this patch is to remove such checks. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_powerpc_altivec_ok): Remove checks for aix[456].* (check_effective_target_powerpc_p9modulo_ok): Likewise. (check_effective_target_powerpc_float128_sw_ok): Likewise. (check_effective_target_powerpc_float128_hw_ok): Likewise. (check_effective_target_powerpc_vsx_ok): Likewise.
2024-05-20testsuite: Fix typo in torture/vector-{1,2}.cKewen Lin2-2/+2
When making some clean up patches, I happened to find test cases vector-{1,2}.c are having typo "powerpc64--*-*" in target selector, which should be powerpc64-*-*. The reason why we didn't catch before is that all our testing machines support VMX insns, so it passes always. But it would break if a test machine doesn't support that, so this patch is to fix it to ensure robustness. gcc/testsuite/ChangeLog: * gcc.dg/torture/vector-1.c: Fix typo. * gcc.dg/torture/vector-2.c: Likewise.
2024-05-20rs6000: Remove useless operands[3]Kewen Lin1-3/+0
As shown, three uses of operands[3] are totally useless, so this patch is to remove them to avoid any confusion. gcc/ChangeLog: * config/rs6000/rs6000.md (@ieee_128bit_vsx_neg<IEEE128>2): Remove the use of operands[3]. (@ieee_128bit_vsx_neg<IEEE128>2): Likewise. (*ieee_128bit_vsx_nabs<mode>2): Likewise.
2024-05-20rs6000: Remove useless entries in rregKewen Lin1-5/+1
When I was working on a trial patch to get rid of TFmode, I noticed that mode attribute rreg only gets used for mode iterator SFDF, it means that only SF and DF key-value pairs are useful, the other are useless, so this patch is to clean up them. gcc/ChangeLog: * config/rs6000/rs6000.md (mode attribute rreg): Remove useless entries with modes TF, TD, V4SF and V2DF.
2024-05-20rs6000: Drop useless vector_{load,store}_<mode> definesKewen Lin1-14/+0
When I was working on a patch to get rid of TFmode, I noticed that define_expands vector_load_<mode> and vector_store_<mode> are useless. This patch is to clean up both. gcc/ChangeLog: * config/rs6000/vector.md (define_expand vector_load_<mode>): Remove. (vector_store_<mode>): Likewise.
2024-05-20rs6000: Clean up TF and TD check with FLOAT128_2REG_PKewen Lin1-1/+1
Commit r6-2116-g2c83faf86827bf did some clean up on TFmode and TFmode check with FLOAT128_2REG_P, but it missed to update an assertion, this patch is to make it align. btw, it's noticed when I'm making a patch to get rid of TFmode. gcc/ChangeLog: * config/rs6000/rs6000-call.cc (rs6000_darwin64_record_arg_recurse): Clean up TFmode and TDmode check with FLOAT128_2REG_P.
2024-05-20rs6000: Add assert !TARGET_VSX if !TARGET_ALTIVEC and strip a useless checkKewen Lin1-2/+3
In function rs6000_option_override_internal, we have the checks and adjustments like: if (TARGET_P8_VECTOR && !TARGET_ALTIVEC) rs6000_isa_flags &= ~OPTION_MASK_P8_VECTOR; if (TARGET_P8_VECTOR && !TARGET_VSX) rs6000_isa_flags &= ~OPTION_MASK_P8_VECTOR; But in fact some previous code has guaranteed !TARGET_VSX if !TARGET_ALTIVEC, so we can remove the former check and adjustment. This patch is to remove it accordingly and also place an explicit assertion. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove useless check on TARGET_P8_VECTOR && !TARGET_ALTIVEC and add an assertion on !TARGET_VSX if !TARGET_ALTIVEC.
2024-05-20rs6000: Fix ICE on IEEE128 long double without vsx [PR114402]Kewen Lin2-2/+18
As PR114402 shows, we supports IEEE128 format long double even if there is no vsx support, but there is an ICE about cbranch as the test case shows. For now, we only supports compare:CCFP pattern for IEEE128 fp if TARGET_FLOAT128_HW, so in function rs6000_generate_compare we have a check with !TARGET_FLOAT128_HW && FLOAT128_VECTOR_P (mode) to make !TARGET_FLOAT128_HW IEEE128 fp handling go with libcall. But unfortunately the IEEE128 without vsx support doesn't meet FLOAT128_VECTOR_P (mode) so it goes further with an unmatched compare:CCFP pattern which triggers ICE. So this patch is to make rs6000_generate_compare consider IEEE128 without vsx as well then it can end up with libcall. PR target/114402 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_generate_compare): Make IEEE128 handling without vsx go with libcall. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr114402.c: New test.
2024-05-21Daily bump.GCC Administrator6-1/+724
2024-05-21PR modula2/115164 initial test code highlighting the problemGaius Mulley2-0/+18
This patch includes some trivial testcode which highlights PR 115164. Expect future test code to perform runtime checks for a series of trailing zeros. gcc/testsuite/ChangeLog: PR modula2/115164 * gm2/isolib/run/pass/testlowread.mod: New test. * gm2/isolib/run/pass/testwritereal.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-05-20PHIOPT: Don't transform minmax if middle bb contains a phi [PR115143]Andrew Pinski4-0/+92
The problem here is even if last_and_only_stmt returns a statement, the bb might still contain a phi node which defines a ssa name which is used in that statement so we need to add a check to make sure that the phi nodes are empty for the middle bbs in both the `CMP?MINMAX:MINMAX` case and the `CMP?MINMAX:B` cases. Bootstrapped and tested on x86_64_linux-gnu with no regressions. PR tree-optimization/115143 gcc/ChangeLog: * tree-ssa-phiopt.cc (minmax_replacement): Check for empty phi nodes for middle bbs for the case where middle bb is not empty. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr115143-1.c: New test. * gcc.c-torture/compile/pr115143-2.c: New test. * gcc.c-torture/compile/pr115143-3.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-05-20fortran: Assume there is no cyclic reference with submodule symbols [PR99798]Mikael Morin2-2/+72
This prevents a premature release of memory with procedure symbols from submodules, causing random compiler crashes. The problem is a fragile detection of cyclic references, which can match with procedures host-associated from a module in submodules, in cases where it shouldn't. The formal namespace is released, and with it the dummy arguments symbols of the procedure. But there is no cyclic reference, so the procedure symbol itself is not released and remains, with pointers to its dummy arguments now dangling. The fix adds a condition to avoid the case, and refactors to a new predicate by the way. Part of the original condition is also removed, for lack of a reason to keep it. PR fortran/99798 gcc/fortran/ChangeLog: * symbol.cc (gfc_release_symbol): Move the condition guarding the handling cyclic references... (cyclic_reference_break_needed): ... here as a new predicate. Remove superfluous parts. Add a condition preventing any premature release with submodule symbols. gcc/testsuite/ChangeLog: * gfortran.dg/submodule_33.f08: New test.
2024-05-20aarch64: Fold vget_low_* intrinsics to BIT_FIELD_REF [PR102171]Pengxuan Zheng7-132/+124
This patch folds vget_low_* intrinsics to BIT_FILED_REF to open up more optimization opportunities for gimple optimizers. While we are here, we also remove the vget_low_* definitions from arm_neon.h and use the new intrinsics framework. PR target/102171 gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (AARCH64_SIMD_VGET_LOW_BUILTINS): New macro to create definitions for all vget_low intrinsics. (VGET_LOW_BUILTIN): Likewise. (enum aarch64_builtins): Add vget_low function codes. (aarch64_general_fold_builtin): Fold vget_low calls. * config/aarch64/aarch64-simd-builtins.def: Delete vget_low builtins. * config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Delete. (aarch64_vget_lo_halfv8bf): Likewise. * config/aarch64/arm_neon.h (__attribute__): Delete. (vget_low_f16): Likewise. (vget_low_f32): Likewise. (vget_low_f64): Likewise. (vget_low_p8): Likewise. (vget_low_p16): Likewise. (vget_low_p64): Likewise. (vget_low_s8): Likewise. (vget_low_s16): Likewise. (vget_low_s32): Likewise. (vget_low_s64): Likewise. (vget_low_u8): Likewise. (vget_low_u16): Likewise. (vget_low_u32): Likewise. (vget_low_u64): Likewise. (vget_low_bf16): Likewise. gcc/testsuite/ChangeLog: * gcc.target/aarch64/pr113573.c: Replace __builtin_aarch64_get_lowv8hi with vget_low_s16. * gcc.target/aarch64/vget_low_2.c: New test. * gcc.target/aarch64/vget_low_2_be.c: New test. Signed-off-by: Pengxuan Zheng <quic_pzheng@quicinc.com>
2024-05-20AArch64: Improve costing of ctzWilco Dijkstra1-4/+18
Improve costing of ctz - both TARGET_CSSC and vector cases were not handled yet. gcc: * config/aarch64/aarch64.cc (aarch64_rtx_costs): Improve CTZ costing.
2024-05-20AArch64: Fix printing of 2-instruction alternativesWilco Dijkstra1-2/+2
Add missing '\' in 2-instruction movsi/di alternatives so that they are printed on separate lines. gcc: * config/aarch64/aarch64.md (movsi_aarch64): Use '\;' to force newline in 2-instruction pattern. (movdi_aarch64): Likewise.
2024-05-20aarch64: Further renaming of generic codeAjit Kumar Agarwal1-35/+36
Renaming of generic code is done to make target independent and target dependent code to support multiple targets. Target independent code is the Generic code with pure virtual function to interface betwwen target independent and dependent code. Target dependent code is the implementation of pure virtual function for aarch64 target and the call to target independent code. 2024-05-20 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com> gcc/ChangeLog: * config/aarch64/aarch64-ldp-fusion.cc: Rename generic parts of code to avoid "ldp" and "stp".
2024-05-20MAINTAINERS: Update Joern Rennecke's statusGerald Pfeifer1-2/+1
This is per his mail to gcc@gcc.gnu.org on 7 Jul 2023. ChangeLog: * MAINTAINERS: Move Joern Rennecke from arc and epiphany maintainer to Write After Approval.
2024-05-20Regenerate riscv.opt.urls and i386.opt.urlsMark Wielaard2-15/+3
risc-v added an -mfence-tso option. i386 removed Xeon Phi ISA support options. But the opt.urls files weren't regenerated. Fixes: a6114c2a6911 ("RISC-V: Implement -m{,no}fence-tso") Fixes: e1a7e2c54d52 ("i386: Remove Xeon Phi ISA support") gcc/ChangeLog: * config/riscv/riscv.opt.urls: Regenerate. * config/i386/i386.opt.urls: Likewise.
2024-05-20aarch64: Preparatory patch to place target independent and dependent changed ↵Ajit Kumar Agarwal1-182/+373
code in one file Common infrastructure of load store pair fusion is divided into target independent and target dependent changed code. Target independent code is the Generic code with pure virtual function to interface betwwen target independent and dependent code. Target dependent code is the implementation of pure virtual function for aarch64 target and the call to target independent code. 2024-05-20 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com> gcc/ChangeLog: * config/aarch64/aarch64-ldp-fusion.cc: Factor out a target-independent interface and move it to the head of the file
2024-05-20Manually add ChangeLog entry for ↵Jakub Jelinek1-0/+29
r15-575-gda73261ce7731be7f2b164f1db796878cdc23365
2024-05-20ada: Allow 'others' in formal packages with overloaded formalsBob Duff3-22/+14
If a generic package has two or more generic formal parameters with the same defining name (which can happen only for formal subprograms), then RM-12.7(4.1/3) disallows named associations in a corresponding formal package. This is not intended to cover "others => <>". This patch allows "others => <>" even when it applies to such formals. Previously, the compiler incorrectly gave an error. Minor related cleanups involving type Text_Ptr. gcc/ada/ * sem_ch12.adb: Misc cleanups and comment fixes. (Check_Overloaded_Formal_Subprogram): Remove the Others_Choice error message. (Others_Choice): Remove this variable; no longer needed. * types.ads (Text_Ptr): Add a range constraint limiting the subtype to values that are actually used. This has the advantage that when the compiler is compiled with validity checks, uninitialized values of subtypes Text_Ptr and Source_Ptr will be caught. * sinput.ads (Sloc_Adjust): Use the base subtype; this is used as an offset, so we need to allow arbitrary negative values.
2024-05-20ada: Add direct workaround for limitations of RTSfind mechanismEric Botcazou6-63/+12
This adds a direct workaround for the spurious compilation errors caused by the presence of preconditions/postconditions in the Interfaces.C unit, which trip on limitations of the RTSfind mechanism when it comes to visibility, as well as removes an indirect workaround that was added very recently. These errors were first triggered in the context of finalization and worked around by preloading the System.Finalization_Primitives unit. Now they also appear in the context of tasking, and it turns out that the preloading trick does not work for separate compilation units. gcc/ada/ * exp_ch7.ads (Preload_Finalization_Collection): Delete. * exp_ch7.adb (Allows_Finalization_Collection): Revert change. (Preload_Finalization_Collection): Delete. * opt.ads (Interface_Seen): Likewise. * scng.adb (Scan): Revert latest change. * sem_ch10.adb: Remove clause for Exp_Ch7. (Analyze_Compilation_Unit): Revert latest change. * libgnat/i-c.ads: Use a fully qualified name for the standard "+" operator in the preconditons/postconditions of subprograms.
2024-05-20ada: Fix internal error on nested aggregate in conditional expressionEric Botcazou1-1/+3
This plugs a loophole in the change improving code generation for nested aggregates present in conditional expressions: once the delayed expansion is chosen for the nested aggregate, the expansion of the parent aggregate cannot be left to the back-end and the test must be adjusted to implement this in the presence of conditional expressions too. gcc/ada/ * exp_aggr.adb (Expand_Record_Aggregate.Component_OK_For_Backend): Also return False for a delayed conditional expression.
2024-05-20ada: Get rid of secondary stack for indefinite record types with size clauseEric Botcazou3-6/+18
This change eliminates the use of the secondary stack for indefinite record types for which a valid (object) size clause is specified. In accordance with the RM, the compiler accepts (object) size clauses on such types only if all the components, including those of the variants of the variant part if any, have a size known at compile time, and only if the clauses specify a value that is at least as large as the largest possible size of objects of the types when all the variants are considered. However, it would still have used the secondary stack, despite valid (object) size clauses, before the change, as soon as a variant part was present in the types. gcc/ada/ * freeze.ads (Check_Compile_Time_Size): Remove obsolete description of usage for the Size_Known_At_Compile_Time flag. * freeze.adb (Check_Compile_Time_Size.Size_Known): In the case where a variant part is present, do not return False if Esize is known. * sem_util.adb (Needs_Secondary_Stack.Caller_Known_Size_Record): Add missing "Start of processing" comment. Return true if either a size clause or an object size clause has been given for the first subtype of the type.
2024-05-20ada: Formal package comment corrections in sinfo.adsBob Duff1-15/+46
Misc comment corrections and clarifications in sinfo.ads related to generic formal packages. gcc/ada/ * sinfo.ads: Misc comment corrections and clarifications. The syntax for GENERIC_ASSOCIATION and FORMAL_PACKAGE_ACTUAL_PART was wrong. Emphasize that "others => <>" is not represented as an N_Generic_Association (with or without Box_Present set), and give examples illustrating the various possibilities.
2024-05-20ada: Add Is_Base_Type predicate to C interfaceEric Botcazou2-3/+9
This also documents what the predicate effectively does. gcc/ada/ * einfo-utils.ads (Is_Base_Type): Move to Miscellaneous Subprograms section and add description. * fe.h (Is_Base_Type): Declare.
2024-05-20ada: Error on instantiation of generic containing legal container aggregateGary Dismukes1-9/+8
When a container aggregate for a predefined container type (such as a Vector type) that has an iterated component association occurs within a generic unit and that generic is instantiated, the compiler reports a spurious error message "iterated component association can only appear in an array aggregate" and the compilation aborts (because Unrecoverable_Error is raised unconditionally after that error). The problem is that as part of the instantiation process, for aggregates whose type has a partial view, in Copy_Generic_Node the compiler switches the visibility so that the full view of the type is available, and for a type whose full view is a record type this leads to incorrectly trying to process the aggregate as a record aggregate in Resolve_Aggregate (making a call to Resolve_Record_Aggregate). Rather than trying to address this by changing what Copy_Generic_Node does, this can be fixed by reordering and adjusting the code in Resolve_Aggregate, so that we first test whether we need to resolve as a record aggregate (if the aggregate is not homogeneous), followed by testing whether the type has an Aggregate aspect and calling Resolve_Container_Aggregate. As a bonus, we also remove the subsequent complex condition and redundant code for handling null container aggregates. gcc/ada/ * sem_aggr.adb (Resolve_Aggregate): Move condition and call for Resolve_Record_Aggregate in front of code related to calling Resolve_Container_Aggregate (and add test that the aggregate is not homogeneous), and remove special-case testing and call to Resolve_Container_Aggregate for empty aggregates. Also, add error check for an attempt to use "[]" for an aggregate of a record type that does not specify an Aggregate aspect. (Resolve_Record_Aggregate): Remove error check for record aggregates with "[]" (now done by Resolve_Aggregate).
2024-05-20ada: Error on instantiation of generic containing legal container aggregateGary Dismukes1-17/+5
When a container aggregate for a predefined container type (such as a Vector type) that has an iterated component association occurs within a generic unit and that generic is instantiated, the compiler reports a spurious error message "iterated component association can only appear in an array aggregate" and the compilation aborts (because Unrecoverable_Error is raised unconditionally after that error). The problem is that as part of the instantiation process, for aggregates whose type has a partial view, in Copy_Generic_Node the compiler switches the visibility so that the full view of the type is available, and for a type whose full view is a record type this leads to incorrectly trying to process the aggregate as a record aggregate in Resolve_Aggregate (making a call to Resolve_Record_Aggregate). Rather than trying to address this by changing what Copy_Generic_Node does, this can be fixed by reordering and adjusting the code in Resolve_Aggregate, so that we first test whether we need to resolve as a record aggregate (if the aggregate is not homogeneous), followed by testing whether the type has an Aggregate aspect and calling Resolve_Container_Aggregate. As a bonus, we also remove the subsequent complex condition and redundant code for handling null container aggregates. gcc/ada/ * sem_aggr.adb (Resolve_Aggregate): Move condition and call for Resolve_Record_Aggregate in front of code related to calling Resolve_Container_Aggregate (and add test that the aggregate is not homogeneous), and remove special-case testing and call to Resolve_Container_Aggregate for empty aggregates.
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