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2024-10-29arm: [MVE intrinsics] fix vst testsAlfie Richards124-248/+248
The tests for vst* instrinsics use functions which return a void expression which can generate a warning. This hasn't come up previously as the inlining presumably prevents the warning. This change removed the uneccessary and incorrect returns. 2024-09-11 Alfie Richards <Alfie.Richards@arm.com> gcc/testsuite/ * gcc.target/arm/mve/intrinsics/vst1q_p_f16.c: Remove `return`. * gcc.target/arm/mve/intrinsics/vst1q_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst2q_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst4q_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrbq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrhq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrwq_u32.c: Likewise.
2024-10-29c: Add __builtin_stdc_rotate_{left,right} builtins [PR117030]Jakub Jelinek9-4/+464
I believe the new C2Y <stdbit.h> type-generic functions stdc_rotate_{left,right} have the same problems the other stdc_* type-generic functions had. If we want to support arbitrary unsigned _BitInt(N), don't want to use statement expressions (so that one can actually use them in static variable initializers), don't want to evaluate the arguments multiple times and don't want to expand the arguments multiple times during preprocessing to avoid the old tgmath preprocessing bloat, we need a built-in for those. The following patch adds those. And as we need to support rotations by 0 and tree-ssa-forwprop.cc is only able to pattern recognize with BIT_AND_EXPR for that case (i.e. for power of two widths), the patch just constructs LROTATE_EXPR/RROTATE_EXPR right away. Negative second arguments are considered UB, while positive ones are modulo precision. 2024-10-29 Jakub Jelinek <jakub@redhat.com> PR c/117030 gcc/ * doc/extend.texi (__builtin_stdc_rotate_left, __builtin_stdc_rotate_right): Document. gcc/c-family/ * c-common.cc (c_common_reswords): Add __builtin_stdc_rotate_left and __builtin_stdc_rotate_right. * c-ubsan.cc (ubsan_instrument_shift): For {L,R}ROTATE_EXPR just check if op1 is negative. gcc/c/ * c-parser.cc: Include asan.h and c-family/c-ubsan.h. (c_parser_postfix_expression): Handle __builtin_stdc_rotate_left and __builtin_stdc_rotate_right. * c-fold.cc (c_fully_fold_internal): Handle LROTATE_EXPR and RROTATE_EXPR. gcc/testsuite/ * gcc.dg/builtin-stdc-rotate-1.c: New test. * gcc.dg/builtin-stdc-rotate-2.c: New test. * gcc.dg/ubsan/builtin-stdc-rotate-1.c: New test. * gcc.dg/ubsan/builtin-stdc-rotate-2.c: New test.
2024-10-29Daily bump.GCC Administrator5-1/+170
2024-10-28testsuite: drop the "test-" prefix from sarif-output python scriptsDavid Malcolm12-6/+6
Drop the "text-" prefix from the various gcc.dg/sarif-output/test-*.py scripts so that the scripts are close to the .c files they are used by when the files are sorted by name. gcc/testsuite/ChangeLog: * gcc.dg/sarif-output/test-bad-pragma.py: Rename to... * gcc.dg/sarif-output/bad-pragma.py: ...this. * gcc.dg/sarif-output/bad-pragma.c: Update for script renaming. * gcc.dg/sarif-output/test-include-chain-1.py: Rename to... * gcc.dg/sarif-output/include-chain-1.py: ...this. * gcc.dg/sarif-output/include-chain-1.c: Update for script renaming. * gcc.dg/sarif-output/test-include-chain-2.py: Rename to... * gcc.dg/sarif-output/include-chain-2.py: ...this. * gcc.dg/sarif-output/include-chain-2.c: Update for script renaming. * gcc.dg/sarif-output/test-missing-semicolon.py: Rename to... * gcc.dg/sarif-output/missing-semicolon.py: ...this. * gcc.dg/sarif-output/missing-semicolon.c: Update for script renaming. * gcc.dg/sarif-output/test-no-diagnostics.py: Rename to... * gcc.dg/sarif-output/no-diagnostics.py: ...this. * gcc.dg/sarif-output/no-diagnostics.c: Update for script renaming. * gcc.dg/sarif-output/test-werror.py: Rename to... * gcc.dg/sarif-output/werror.py: ...this. * gcc.dg/sarif-output/werror.c: Update for script renaming. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-10-28testcase: Add testcase for PR 117330 [PR117330]Andrew Pinski1-0/+22
This testcase was causing an ICE during vectorization due to r15-4695-gd17e672ce82e69 but was fixed with r15-4713-g0942bb85fc5573. Pushed as obvious after a quick test on x86_64-linux-gnu to make sure the testcase passes. PR tree-optimization/117330 gcc/testsuite/ChangeLog: * gcc.dg/torture/pr117330-1.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-10-28testsuite: Require atomic operations for pr47333_0Dimitar Dimitrov1-0/+1
Since the test uses __sync_fetch_and_add, add a requirement for target to support atomic operations on int and long types. This fixes a spurious test failure on pru-unknown-elf, which lacks atomic ops. The test still passes on x86_64-linux-gnu. gcc/testsuite/ChangeLog: * g++.dg/lto/pr47333_0.C: Require target that supports atomic operations on int and long types. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2024-10-28gcc: fix 'statements' comment typoSam James1-1/+1
gcc/ChangeLog: * opts-common.cc (prune_options): Fix typo.
2024-10-28testsuite: add testcase for fixed PR107467Sam James1-0/+52
PR107467 ended up being fixed by the fix for PR115110, but let's add the testcase on top. gcc/testsuite/ChangeLog: PR tree-optimization/107467 PR middle-end/115110 * g++.dg/lto/pr107467_0.C: New test.
2024-10-28Fix bitwise_or logic for prange.Andrew MacLeod1-1/+1
Set non-zero only if at least one of the two operands does not contain zero. * range-op-ptr.cc (operator_bitwise_or::fold_range): Fix logic for setting nonzero.
2024-10-28aarch64: Use implementation namespace for vxarq_u64 immediate argumentKyrylo Tkachov1-2/+2
Looks like this immediate variable was missed out when I last fixed the namespace issues in arm_neon.h. Fixed in the obvious manner. Bootstrapped and tested on aarch64-none-linux-gnu. Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com> * config/aarch64/arm_neon.h (vxarq_u64): Rename imm6 to __imm6.
2024-10-28libstdc++: Fix tests for std::vector range operationsJonathan Wakely8-45/+50
The commit I pushed was not the one I'd tested, so it had older versions of the tests, with bugs that I'd already fixed locally. This commit has the fixed tests that I'd intended to push in the first place. libstdc++-v3/ChangeLog: * testsuite/23_containers/vector/bool/cons/from_range.cc: Use dg-do run instead of compile. (test_ranges): Use do_test instead of do_test_a for rvalue range. (test_constexpr): Call function template instead of just instantiating it. * testsuite/23_containers/vector/bool/modifiers/assign/assign_range.cc: Use dg-do run instead of compile. (do_test): Use same test logic for vector<bool> as for primary template. (test_constexpr): Call function template instead of just instantiating it. * testsuite/23_containers/vector/bool/modifiers/insert/append_range.cc: Use dg-do run instead of compile. (test_ranges): Use do_test instead of do_test_a for rvalue range. (test_constexpr): Call function template instead of just instantiating it. * testsuite/23_containers/vector/bool/modifiers/insert/insert_range.cc: Use dg-do run instead of compile. (do_test): Fix incorrect function arguments to match intended results. (test_ranges): Use do_test instead of do_test_a for rvalue range. (test_constexpr): Call function template instead of just instantiating it. * testsuite/23_containers/vector/cons/from_range.cc: Use dg-do run instead of compile. (test_ranges): Fix ill-formed call to do_test. (test_constexpr): Call function template instead of just instantiating it. * testsuite/23_containers/vector/modifiers/append_range.cc: Use dg-do run instead of compile. (test_constexpr): Likewise. * testsuite/23_containers/vector/modifiers/assign/assign_range.cc: Use dg-do run instead of compile. (do_test): Do not reuse input ranges. (test_constexpr): Call function template instead of just instantiating it. * testsuite/23_containers/vector/modifiers/insert/insert_range.cc: Use dg-do run instead of compile. (do_test): Fix incorrect function arguments to match intended results. (test_constexpr): Call function template instead of just instantiating it.
2024-10-28build: update bootstrap req to C++14Jason Merrill3-69/+795
We moved to a bootstrap requirement of C++11 in GCC 11, 8 years after support was stable in GCC 4.8. It is now 8 years since C++14 was the default mode in GCC 6 (and 9 years since support was complete in GCC 5), and we have a few bits of optional C++14 code in the compiler, so it seems a good time to update the bootstrap requirement again. The big benefit of the change is the greater constexpr power, but C++14 also added variable templates, generic lambdas, lambda init-capture, binary literals, and numeric literal digit separators. C++14 was feature-complete in GCC 5, and became the default in GCC 6. 5.4.0 bootstraps trunk correctly; trunk stage1 built with 5.3.0 breaks in eh_data_format_name due to PR69995. gcc/ChangeLog: * doc/install.texi (Prerequisites): Update to C++14. ChangeLog: * configure.ac: Update requirement to C++14. * configure: Regenerate.
2024-10-28[target/117316] Fix initializer for riscv code alignment handlingJeff Law1-3/+27
The construct used for initializing the code alignments in a recent change is causing bootstrap problems on riscv64 as seen in the referenced bugzilla. This patch adjusts the initializer by pushing the NULL down into each uarch clause. Bootstrapped on riscv64, regression test in flight, but given bootstrap is broken it seemed advisable to move this forward now. I'm so much looking forward to the day when we have performant hardware for bootstrap testing... Sigh. Anyway, bootstrapped and installing on the trunk. PR target/117316 gcc/ * config/riscv/riscv.cc (riscv_tune_param): Drop initializer. (*_tune_info): Add initializers for code alignments.
2024-10-28tree-optimization/117307 - STMT_VINFO_SLP_VECT_ONLY mis-computationRichard Biener2-6/+30
STMT_VINFO_SLP_VECT_ONLY isn't properly computed as union of all group members and when the group is later split due to duplicates not all sub-groups inherit the flag. PR tree-optimization/117307 * tree-vect-data-refs.cc (vect_analyze_data_ref_accesses): Properly compute STMT_VINFO_SLP_VECT_ONLY. Set it on all parts of a split group. * gcc.dg/vect/pr117307.c: New testcase.
2024-10-28tree-core.h (omp_clause_code): Comments regarding range checks for ↵Tobias Burnus1-1/+23
OMP_CLAUSE_... gcc/ChangeLog: * tree-core.h (enum omp_clause_code): Add comments to cross ref to OMP_CLAUSE_DECL etc. and mark the ranges used in the range checks.
2024-10-28vec-lowering: Fix ABSU lowering [PR111285]Andrew Pinski2-1/+38
ABSU_EXPR lowering incorrectly used the resulting type for the new expression but in the case of ABSU the resulting type is an unsigned type and with ABSU is folded away. The fix is to use a signed type for the expression instead. Bootstrapped and tested on x86_64-linux-gnu. PR middle-end/111285 gcc/ChangeLog: * tree-vect-generic.cc (do_unop): Use a signed type for the operand if the operation was ABSU_EXPR. gcc/testsuite/ChangeLog: * g++.dg/torture/vect-absu-1.C: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-10-28phiopt: Move check for maybe_undef_p slightly earlierAndrew Pinski1-7/+7
This moves the check for maybe_undef_p in match_simplify_replacement slightly earlier before figuring out the true/false arg using arg0/arg1 instead. In most cases this is no difference in compile time; just in the case there is an undef in the args there would be a slight compile time improvement as there is no reason to figure out which arg corresponds to the true/false side of the conditional. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-ssa-phiopt.cc (match_simplify_replacement): Move check for maybe_undef_p earlier. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-10-28Remove code in vectorizer pattern recog relying on vec_cond{u,eq,}Richard Biener1-36/+1
With the intent to rely on vec_cond_mask and vec_cmp patterns comparisons do not need rewriting into COND_EXPRs that eventually combine to vec_cond{u,eq,}. * tree-vect-patterns.cc (check_bool_pattern): For comparisons we do nothing if we can expand them or we can't replace them with a ? -1 : 0 condition - but the latter would require expanding the comparison which we proved we can't. So do nothing, aka not think vec_cond{u,eq,} will save us.
2024-10-28RISC-V:Bugfix for vlmul_ext and vlmul_trunc with NULL return value[pr117286]xuli2-0/+20
This patch fixes following ICE: test.c: In function 'func': test.c:37:24: internal compiler error: Segmentation fault 37 | vfloat16mf2_t vc = __riscv_vlmul_trunc_v_f16m1_f16mf2(vb); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The root cause is that vlmul_trunc has a null return value. gimple_call <__riscv_vlmul_trunc_v_f16m1_f16mf2, NULL, vb_13> ^^^ Passed the rv64gcv_zvfh regression test. Singed-off-by: Li Xu <xuli1@eswincomputing.com> PR target/117286 gcc/ChangeLog: * config/riscv/riscv-vector-builtins-bases.cc: Do not expand NULL return. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr117286.c: New test.
2024-10-28gcc.target/i386/pr53533-[13].c: Adjust assembly scanH.J. Lu2-2/+6
Before 1089d083117 Simplify (B * v + C) * D -> BD* v + CD when B,C,D are all INTEGER_CST. the loop was .L2: movl (%rdi,%rdx), %eax addl $12345, %eax imull $-1564285888, %eax, %eax leal -333519936(%rax), %eax movl %eax, (%rsi,%rdx) addq $4, %rdx cmpq $1024, %rdx jne .L2 There were 1 addl and 1 leal. 1 addq was to update the loop counter. The optimized loop is .L2: imull $-1564285888, (%rdi,%rax), %edx subl $1269844480, %edx movl %edx, (%rsi,%rax) addq $4, %rax cmpq $1024, %rax jne .L2 1 addl is changed to subl and leal is removed. Adjust assembly scan to check for 1 subl and 1 addl/addq as well as lea removal. * gcc.target/i386/pr53533-1.c: Adjust assembly scan. * gcc.target/i386/pr53533-3.c: Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2024-10-28Daily bump.GCC Administrator6-1/+130
2024-10-27libstdc++: Add P1206R7 from_range members to std::vector [PR111055]Jonathan Wakely15-8/+1366
This is another piece of P1206R7, adding new members to std::vector and std::vector<bool>. The __uninitialized_copy_a extension needs to be enhanced to support passing non-common ranges (i.e. a sentinel that is a different type from the iterator) and move-only input iterators. libstdc++-v3/ChangeLog: PR libstdc++/111055 * include/bits/ranges_base.h (__container_compatible_range): New concept. * include/bits/stl_bvector.h (vector(from_range, R&&, const Alloc&)) (assign_range, insert_range, append_range): Define. * include/bits/stl_uninitialized.h (__do_uninit_copy): Support non-common ranges. (__uninitialized_copy_a): Likewise. * include/bits/stl_vector.h (_Vector_base::_M_append_range_to): New function. (_Vector_base::_M_append_range): Likewise. (vector(from_range, R&&, const Alloc&), assign_range): Define. (append_range): Define. (insert_range): Declare. * include/debug/vector (vector(from_range, R&&, const Alloc&)) (assign_range, insert_range, append_range): Define. * include/bits/vector.tcc (insert_range): Define. * testsuite/util/testsuite_iterators.h (input_iterator_wrapper_rval): New class template. * testsuite/23_containers/vector/bool/cons/from_range.cc: New test. * testsuite/23_containers/vector/bool/modifiers/assign/assign_range.cc: New test. * testsuite/23_containers/vector/bool/modifiers/insert/append_range.cc: New test. * testsuite/23_containers/vector/bool/modifiers/insert/insert_range.cc: New test. * testsuite/23_containers/vector/cons/from_range.cc: New test. * testsuite/23_containers/vector/modifiers/append_range.cc: New test. * testsuite/23_containers/vector/modifiers/assign/assign_range.cc: New test. * testsuite/23_containers/vector/modifiers/insert/insert_range.cc: New test. Reviewed-by: Patrick Palka <ppalka@redhat.com>
2024-10-27libstdc++: Fix std::vector<bool>::emplace to forward parameterJonathan Wakely2-2/+26
If the parameter is not lvalue-convertible to bool then the current code will fail to compile. The parameter should be forwarded to restore the original value category. libstdc++-v3/ChangeLog: * include/bits/stl_bvector.h (emplace_back, emplace): Forward parameter pack to preserve value category. * testsuite/23_containers/vector/bool/emplace_rvalue.cc: New test.
2024-10-27arm: Support -mfdpic for more targetsFangrui Song2-2/+5
Targets that are not arm*-*-uclinuxfdpiceabi can use -S -mfdpic, but -c -mfdpic does not pass --fdpic to gas. This is an unnecessary restriction. Just define the ASM_SPEC in bpabi.h. Additionally, use armelf[b]_linux_fdpiceabi emulations for -mfdpic in linux-eabi.h. This will allow a future musl fdpic port to use the desired BFD emulation. gcc/ChangeLog: * config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): Transform -mfdpic. * config/arm/linux-eabi.h (TARGET_FDPIC_LINKER_EMULATION): Define. (SUBTARGET_EXTRA_LINK_SPEC): Use TARGET_FDPIC_LINKER_EMULATION if -mfdpic.
2024-10-27xtensa: Define TARGET_DIFFERENT_ADDR_DISPLACEMENT_P target hookTakayuki 'January June' Suwa2-6/+9
In commit bc5a9dab55d13f888a3cdd150c8cf5c2244f35e0 ("gcc: xtensa: reorder movsi_internal patterns for better code generation during LRA"), the instruction order in "movsi_internal" MD definition was changed to make LRA use load/store instructions with larger memory address displacements, but as a side effect, it now uses the larger displacements (ie., the larger instructions) even outside of reload operations. The underlying problem is that LRA assumes by default that there is only one maximal legitimate displacement for the same address structure, meaning that it has no choice but to use the first load/store instruction it finds. To fix this, define TARGET_DIFFERENT_ADDR_DISPLACEMENT_P hook to always return true. gcc/ChangeLog: * config/xtensa/xtensa.cc (TARGET_DIFFERENT_ADDR_DISPLACEMENT_P): Add new target hook to always return true. * config/xtensa/xtensa.md (movsi_internal): Revert the previous changes.
2024-10-27genmatch: Add selftests to genmatch for diag_vfprintfJakub Jelinek6-2/+152
The following patch adds selftests to genmatch to verify the new printing routine there. So that I can rely on HAVE_DECL_FMEMOPEN (host test), the tests are done solely in stage2+ where we link the host libcpp etc. to genmatch. The tests have been adjusted from pretty-print.cc (test_pp_format), and I've added to that function two new tests because I've noticed nothing was testing the %M$.*N$s etc. format specifiers. 2024-10-27 Jakub Jelinek <jakub@redhat.com> * configure.ac (gcc_AC_CHECK_DECLS): Add fmemopen. * configure: Regenerate. * config.in: Regenerate. * Makefile.in (build/genmatch.o): Add -DGENMATCH_SELFTESTS to BUILD_CPPFLAGS for stage2+ genmatch. * genmatch.cc (test_diag_vfprintf, genmatch_diag_selftests): New functions. (main): Call genmatch_diag_selftests. * pretty-print.cc (test_pp_format): Add two tests, one for %M$.*N$s and one for %M$.Ns.
2024-10-27c-family: -Wleading-whitespace= argument spellingJakub Jelinek6-10/+10
On Thu, Oct 24, 2024 at 03:33:25PM -0400, Eric Gallager wrote: > On Thu, Oct 24, 2024 at 4:17 AM Jakub Jelinek <jakub@redhat.com> wrote: > > I've tried to build stage3 with > > -Wleading-whitespace=blanks -Wtrailing-whitespace=blank -Wno-error=leading-whitespace=blanks -Wno-error=trailing-whitespace=blank > > So wait, it's "blanks" (plural) when it's leading, but "blank" > (singular) when it's trailing? That inconsistency bothers me... I've mentioned it already in https://gcc.gnu.org/pipermail/gcc-patches/2024-October/664664.html Citing that here: Not sure about the kinds for the option, given -Wleading-whitespace= uses plural and this option singular and -Wleading-whitespace= spaces means literally just ' ' characters, while space in -Wtrailing-whitespace= was ' ', '\t', '\v' and '\f'; so category; perhaps just use any and blanks? Other preferences? Here is a patch to do the blank->blanks and space->any changes. 2024-10-27 Jakub Jelinek <jakub@redhat.com> gcc/ * doc/invoke.texi (Wtrailing-whitespace=): Change blank argument to blanks and space argument to any. gcc/c-family/ * c.opt (warn_trailing_whitespace_kind): Change blank to blanks and space to any. gcc/testsuite/ * c-c++-common/cpp/Wtrailing-whitespace-2.c: Use -Wtrailing-whitespace=blanks rather than -Wtrailing-whitespace=blank. * c-c++-common/cpp/Wtrailing-whitespace-3.c: Use -Wtrailing-whitespace=any rather than -Wtrailing-whitespace=space. * c-c++-common/cpp/Wtrailing-whitespace-7.c: Use -Wtrailing-whitespace=blanks rather than -Wtrailing-whitespace=blank. * c-c++-common/cpp/Wtrailing-whitespace-8.c: Use -Wtrailing-whitespace=any rather than -Wtrailing-whitespace=space.
2024-10-27testsuite: Fix up gcc.dg/vec-perm-lower.c testJakub Jelinek1-1/+1
On Tue, Oct 15, 2024 at 12:45:35PM +0000, Tamar Christina wrote: > I'll write a gimple one and commit with this then. The new test FAILs on i686-linux, with the usual FAIL: gcc.dg/vec-perm-lower.c (test for excess errors) Excess errors: .../gcc/testsuite/gcc.dg/vec-perm-lower.c:9:1: warning: SSE vector return without SSE enabled changes the ABI [-Wpsabi] .../gcc/testsuite/gcc.dg/vec-perm-lower.c:8:1: warning: MMX vector argument without MMX enabled changes the ABI [-Wpsabi] The following patch fixes that. Tested on x86_64-linux with make check-gcc RUNTESTFLAGS='--target_board=unix/\{-m32,-m32/-mno-sse/-mno-mmx,-m64\} dg.exp=vec-perm-lower.c' which previously FAILed, now PASSes, ok for trunk? 2024-10-27 Jakub Jelinek <jakub@redhat.com> * gcc.dg/vec-perm-lower.c: Add -Wno-psabi to dg-options.
2024-10-27Fortran: Fix regressions with intent(out) class[PR115070, PR115348].Paul Thomas3-12/+80
2024-10-27 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/115070 PR fortran/115348 * trans-expr.cc (gfc_trans_class_init_assign): If all the components of the default initializer are null for a scalar, build an empty statement to prevent prior declarations from disappearing. gcc/testsuite/ PR fortran/115070 * gfortran.dg/pr115070.f90: New test. PR fortran/115348 * gfortran.dg/pr115348.f90: New test.
2024-10-27testsuite: Sanitize pacbti test cases for Cortex-MTorbjörn SVENSSON14-24/+24
Some of the test cases were scanning for "bti", but it would, incorrectly, match the ".arch_extenssion pacbti". gcc/testsuite/ChangeLog: * gcc.target/arm/bti-1.c: Check for asm instructions starting with a tab. * gcc.target/arm/bti-2.c: Likewise. * gcc.target/arm/pac-1.c: Likewise. * gcc.target/arm/pac-2.c: Likewise. * gcc.target/arm/pac-3.c: Likewise. * gcc.target/arm/pac-4.c: Likewise. * gcc.target/arm/pac-6.c: Likewise. * gcc.target/arm/pac-7.c: Likewise. * gcc.target/arm/pac-8.c: Likewise. * gcc.target/arm/pac-9.c: Likewise. * gcc.target/arm/pac-10.c: Likewise. * gcc.target/arm/pac-11.c: Likewise. * gcc.target/arm/pac-15.c: Likewise. * gcc.target/arm/pac-sibcall.c: Likewise. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> Co-authored-by: Yvan ROUX <yvan.roux@foss.st.com>
2024-10-27Daily bump.GCC Administrator5-1/+62
2024-10-26doc, fortran: Add a missing menu item.Iain Sandoe1-0/+1
The changes in r15-4697-g4727bfb37701 omit a menu entry which causes a bootstrap fail when Frotran is included for at least makeinfo 6.7. Fixed thus. gcc/fortran/ChangeLog: * intrinsic.texi: Add menu item for UINT. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-10-26tree: Mark PAREN_EXPR and VEC_DUPLICATE_EXPR as non-trapping [PR117234]Andrew Pinski5-0/+75
While looking to fix a possible trapping issue in PHI-OPT's factor, I noticed that some tree codes could be marked as trapping even though they don't have a possibility to trap. In the case of PAREN_EXPR, it is basically a nop except when it comes to association across it so it can't trap. In the case of VEC_DUPLICATE_EXPR, it is similar to a CONSTRUCTOR, so it can't trap. This fixes those 2 issues and adds 4 testcases, 2 which are specific to aarch64 since the only way to get a VEC_DUPLICATE_EXPR is to use intrinsics currently. Build and tested for aarch64-linux-gnu. PR tree-optimization/117234 gcc/ChangeLog: * tree-eh.cc (operation_could_trap_helper_p): Treat PAREN_EXPR and VEC_DUPLICATE_EXPR like constructing expressions. gcc/testsuite/ChangeLog: * g++.dg/eh/noncall-fp-1.C: New test. * g++.target/aarch64/sve/noncall-eh-fp-1.C: New test. * gcc.dg/tree-ssa/trapping-1.c: New test. * gcc.target/aarch64/sve/trapping-1.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-10-26Add UNSIGNED for intrinsics.Thomas Koenig3-193/+409
gcc/fortran/ChangeLog: * gfortran.texi: Correct reference to make clear that UNSIGNED will not be part of F202Y. Other clarifications. Extend table of intrinsics, add links. * intrinsic.texi: Add descriptions for UNSIGNED arguments. * invoke.texi: Add anchor for -funsigned.
2024-10-26Fix old glitch in the GNAT Reference ManualEric Botcazou2-2/+2
gcc/ada PR ada/62122 * doc/gnat_rm/implementation_defined_attributes.rst (Unrestricted_Access): Remove null exclusion. * gnat_rm.texi: Regenerate.
2024-10-26Assert finished vectorizer pattern COND_EXPR transitionRichard Biener2-7/+3
The following places a few strathegic asserts so we do not end up with COND_EXPRs with a comparison as the first operand during vectorization. * tree-vect-slp.cc (vect_get_operand_map): Mark COMPARISON_CLASS_P COND_EXPR condition path unreachable. * tree-vect-stmts.cc (vect_is_simple_use): Likewise. (vectorizable_condition): Assert the COND_EXPR condition isn't COMPARISON_CLASS_P.
2024-10-26Finish vectorizer pattern proper COND_EXPR transitionRichard Biener1-2/+5
This fixes up vect_recog_ctz_ffs_pattern. * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Create a separate pattern stmt for the comparison in the generated COND_EXPR.
2024-10-26Finish vectorizer pattern proper COND_EXPR transitionRichard Biener1-2/+5
The following tries to finish building proper GIMPLE COND_EXPRs in vectorizer pattern recognition. * tree-vect-patterns.cc (vect_recog_divmod_pattern): Build separate comparion pattern for the condition of a COND_EXPR pattern.
2024-10-26testsuite: fixup tbaa test againSam James1-4/+4
Test was broken until r15-4684-g2d1d6be00257c5 which made it actually run and r15-4685-g091e45b4e97d1e which applied fixes other than the trivial rename. But more is needed: this gets the test working properly in terms of scanning the dump and handling the interaction w/ LTO with not producing an executable (did try ltrans scan but that didn't work either). Unfortunately, the test seems to fail for me on godbolt even going back to GCC 7.1 or thereabouts, hence XFAIL. However, if I revert r9-3870-g2a98b4bfc3d952, I do get an ICE in fld_incomplete_type_of -- because we do far more checking with LTO now on (in)complete types. And reverting it on releases/gcc-9 actually makes it give 0. In summary: fix the test fully so it really does run and we get a check for ICEing at least, and mark the dg-final scan as XFAIL so Honza can comment on that. gcc/testsuite/ChangeLog: PR testsuite/117299 * gcc.dg/lto/tbaa_0.c: Move to... * gcc.dg/tbaa.c: ...here.
2024-10-26Daily bump.GCC Administrator26-1/+2803
2024-10-25libbacktrace: recognize new Mach-O DWARF sectionsIan Lance Taylor1-2/+2
Patch from Pavel Safonov. These sections are used on macOS Sequoia. Fixes https://github.com/ianlancetaylor/libbacktrace/issues/136 * macho.c (dwarf_section_names): Add __debug_addr and __debug_line_str.
2024-10-25simplify-rtx: Handle `a != 0 ? -a : 0` [PR58195]Andrew Pinski3-0/+72
The gimple (and generic) levels have this optmization since r12-2041-g7d6979197274a662da7bdc5. It seems like a good idea to add a similar one to rtl just in case it is not caught at the gimple level. Note the loop case in csel-neg-1.c is not handled at the gimple level (even with phiopt turned back on), this is because of casts to avoid signed integer overflow; a patch to fix this at the gimple level will be submitted seperately. Changes since v1: * v2: Use `CONST0_RTX (mode)` instead of const0_rtx. Add csel-neg-2.c for float testcase which now passes. Build and tested for aarch64-linux-gnu. PR rtl-optimization/58195 gcc/ChangeLog: * simplify-rtx.cc (simplify_context::simplify_ternary_operation): Handle `a != 0 ? -a : 0` and `a == 0 ? 0 : -a`. gcc/testsuite/ChangeLog: * gcc.target/aarch64/csel-neg-1.c: New test. * gcc.target/aarch64/csel-neg-2.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-10-25testsuite: lto: fix pr47333 testSam James1-0/+3
This failure was hidden until we started to run the test by fixing the filename earlier: ignore -Wtemplate-body using a pragma like e.g. g++.dg/lto/20101010-1_0.C does because lto.exp doesn't support dg-additional-options. gcc/testsuite/ChangeLog: PR lto/47333 * g++.dg/lto/pr47333_0.C: Ignore -Wtemplate-body.
2024-10-25testsuite: lto: fix pr62026 testSam James1-1/+1
This failure was hidden until we started to run the test by fixing the filename earlier: pass -Wno-return-type. gcc/testsuite/ChangeLog: PR lto/62026 * g++.dg/lto/pr62026_0.C: Pass -Wno-return-type.
2024-10-25testsuite: lto: fix pr95677 testSam James1-3/+2
These failures were hidden until we started to run the test by fixing the filename earlier: use dg-lto directives. gcc/testsuite/ChangeLog: PR c++/95677 * g++.dg/lto/pr95677_0.C: Use dg-lto-*.
2024-10-25testsuite: lto: fix tbaa_0 testSam James1-3/+5
These failures were hidden until we started to run the test by fixing the filename earlier: use dg-lto directives, pass -std=gnu89 for implicit-int, and use -flto-partition=none like c-c++-common/hwasan/builtin-special-handling.c. gcc/testsuite/ChangeLog: * gcc.dg/lto/tbaa_0.c: Use dg-lto directives, pass -std=gnu89, and use -flto-partition=none.
2024-10-25testsuite: lto: rename tbaa-1 testSam James1-0/+0
This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: * gcc.dg/lto/tbaa-1.c: Move to... * gcc.dg/lto/tbaa_0.c: ...here.
2024-10-25testsuite: lto: rename pr47333 testSam James1-0/+0
This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: PR target/47333 * g++.dg/lto/pr47333.C: Move to... * g++.dg/lto/pr47333_0.C: ...here.
2024-10-25testsuite: lto: rename pr62026 testSam James1-0/+0
This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: PR lto/62026 * g++.dg/lto/pr62026.C: Move to... * g++.dg/lto/pr62026_0.C: ...here.
2024-10-25testsuite: lto: rename pr95677 testSam James1-0/+0
This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: PR c++/95677 * g++.dg/lto/pr95677.C: Move to... * g++.dg/lto/pr95677_0.C: ...here.
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