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libgomp/ChangeLog:
* plugin/plugin-gcn.c (isa_matches_agent): Mention the device number
and ROCR_VISIBLE_DEVICES when reporting an ISA mismatch error.
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Just notice the indent is not that right for ustrunc pattern from
the md files. Thus, make it correct. It is somehow very obvious
and will commit it after next 48H if no more comments.
gcc/ChangeLog:
* config/riscv/autovec.md: Fix indent format issue.
Signed-off-by: Pan Li <pan2.li@intel.com>
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2024-11-11 Tomas Trnka <trnka@scm.com>
Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/116388
* class.cc (finalize_component): Leading underscore in the name
of 'byte_stride' to suppress invalid finalization.
gcc/testsuite/
PR fortran/116388
* gfortran.dg/finalize_58.f90: New test.
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gcc/fortran/ChangeLog:
* check.cc (gfc_check_complex): Reject UNSIGNED.
* gfortran.texi: Update example program. Note that
CMPLX, INT and REAL also take unsigned arguments.
* intrinsic.texi (CMPLX): Document UNSIGNED.
(INT): Likewise.
(REAL): Likewise.
gcc/testsuite/ChangeLog:
* gfortran.dg/unsigned_41.f90: New test.
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Explain that 'bootstrap-ubsan' won't abort on errors by default and how
to override that by setting UBSAN_OPTIONS.
gcc/ChangeLog:
PR other/116948
* doc/install.texi (Building a native compiler): Document UBSAN_OPTIONS.
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gcc/ChangeLog:
PR other/116948
* doc/install.texi (Building a native compiler): Mention bootstrap-ubsan.
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The second source register of insn "*extzvsi-1bit_addsubx" cannot be the
same as the destination register, because that register will be overwritten
with an intermediate value after insn splitting.
/* example #1 */
int test1(int b, int a) {
return ((a & 1024) ? 4 : 0) + b;
}
;; result #1 (incorrect)
test1:
extui a2, a3, 10, 1 ;; overwrites A2 before used
addx4 a2, a2, a2
ret.n
This patch fixes that.
;; result #1 (correct)
test1:
extui a3, a3, 10, 1 ;; uses A3 and then overwrites
addx4 a2, a3, a2
ret.n
However, it should be noted that the first source register can be the same
as the destination without any problems.
/* example #2 */
int test2(int a, int b) {
return ((a & 1024) ? 4 : 0) + b;
}
;; result (correct)
test2:
extui a2, a2, 10, 1 ;; uses A2 and then overwrites
addx4 a2, a2, a3
ret.n
gcc/ChangeLog:
* config/xtensa/xtensa.md (*extzvsi-1bit_addsubx):
Add '&' to the destination register constraint to indicate that
it is 'earlyclobber', append '0' to the first source register
constraint to indicate that it can be the same as the destination
register, and change the split condition from 1 to reload_completed
so that the insn will be split only after RA in order to obtain
allocated registers that satisfy the above constraints.
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gcc/ChangeLog:
* common/config/i386/cpuinfo.h
(get_intel_cpu): Handle Diamond Rapids.
* common/config/i386/i386-common.cc (processor_name):
Add Diamond Rapids.
(processor_alias_table): Ditto.
* common/config/i386/i386-cpuinfo.h (enum processor_types):
Add INTEL_COREI7_DIAMONDRAPIDS.
* config.gcc: Add -march=diamondrapids.
* config/i386/driver-i386.cc (host_detect_local_cpu): Handle
diamondrapids.
* config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
* config/i386/i386-options.cc (processor_cost_table): Ditto.
(m_DIAMONDRAPIDS): New.
(m_CORE_AVX512): Add diamondrapids.
* config/i386/i386.h (enum processor_type): Ditto.
* doc/extend.texi: Ditto.
* doc/invoke.texi: Ditto.
gcc/testsuite/ChangeLog:
* g++.target/i386/mv16.C: Ditto.
* gcc.target/i386/funcspec-56.inc: Handle new march.
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gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_intel_cpu): Add new model
number for Arrow Lake.
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&& HONOR_NANS (BFmode).
hw instruction doesn't raise exceptions, turns sNAN into qNAN quietly,
and always round to nearest (even). Output denormals are always
flushed to zero and input denormals are always treated as zero. MXCSR
is not consulted nor updated.
W/o native instructions, flag_unsafe_math_optimizations is needed for
the permutation instructions.
Similar guard extend from vector __bf16 to vector float with
!HONOR_NANS (BFmode).
gcc/ChangeLog:
* config/i386/i386.md (truncsf2bf2): Add !flag_rounding_math
to the condition, require flag_unsafe_math_optimizations when
native instruction is not available.
* config/i386/mmx.md: (truncv2sfv2bf2): Ditto.
(extendv2bfv2sf2): Add !HONOR_NANS (BFmode) to the condition.
* config/i386/sse.md: (truncv4sfv4sf2): Add
!flag_rounding_math to the condition, require
flag_unsafe_math_optimizations when native instruction is not
available.
(truncv8sfv8bf2): Ditto.
(truncv16sfv16bf2): Ditto.
(extendv4bfv4sf2): Add !HONOR_NANS (BFmode) to the condition.
(extendv8bfv8sf2): Ditto.
(extendv16bfv16sf2): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512bf16-truncsfbf.c: Add -ffast-math.
* gcc.target/i386/avx512bw-extendbf2sf.c: Ditto.
* gcc.target/i386/avx512bw-truncsfbf.c: Ditto.
* gcc.target/i386/sse2-extendbf2sf.c: Ditto.
* gcc.target/i386/ssse3-truncsfbf.c: Ditto.
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There are some SVE testsuite fails when forcing SLP because costing
prevents VLA vectors from being used as we add permute cost for
the VEC_PERM nodes that are part of a SLP load-lanes node. The
permutes only exist for representational reasons and pessimize SLP
vs non-SLP so the following makes sure to cost them as zero.
* tree-vect-slp.cc (vectorizable_slp_permutation_1): Return
zero for the permute nodes part of load-lanes.
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For configurations where both GCN and nvptx offloading are enabled, we get:
PASS: libgomp.c/max_vf-1.c (test for excess errors)
PASS: libgomp.c/max_vf-1.c scan-tree-dump-times ompexp "GOMP_MAX_VF" 2
PASS: libgomp.c/max_vf-1.c scan-tree-dump-times ompexp "__builtin_GOMP_parallel_loop_nonmonotonic_dynamic \\(.*, D\\.[0-9]*, 0\\);" 1
PASS: libgomp.c/max_vf-1.c scan-amdgcn-amdhsa-offload-tree-dump-times optimized "__builtin_GOMP_parallel_loop_nonmonotonic_dynamic \\(.*, 64, 0\\);" 1
FAIL: libgomp.c/max_vf-1.c scan-nvptx-none-offload-tree-dump-times optimized "__builtin_GOMP_parallel_loop_nonmonotonic_dynamic \\(.*, 64, 0\\);" 1
FAIL: libgomp.c/max_vf-1.c scan-amdgcn-amdhsa-offload-tree-dump-times optimized "__builtin_GOMP_parallel_loop_nonmonotonic_dynamic \\(.*, 7, 0\\);" 1
PASS: libgomp.c/max_vf-1.c scan-nvptx-none-offload-tree-dump-times optimized "__builtin_GOMP_parallel_loop_nonmonotonic_dynamic \\(.*, 7, 0\\);" 1
Avoid these FAILs via 'only_for_offload_target [...]'. Also, for consistency
with other libgomp test cases, use effective-target specifiers of the libgomp
test suite. Fix-up for recent commit d334f729e53867b838e867375b3f475ba793d96e
"openmp: Add testcases for omp_max_vf".
libgomp/
* testsuite/libgomp.c/max_vf-1.c: Adjust.
* testsuite/libgomp.c/max_vf-2.c: Likewise.
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CODE_CONTAINS_STRUCT () currently reports that a TRAIT_EXPR contains a
TS_EXP struct, but it does not actually start with a TS_EXP as an initial
sequence. In modules.cc, when we stream out a tree, we explicitly check for the
TS_EXP case and call note_location(t->exp.locus) if so. Currently, this
actually queries the tree_common::chain field of a tree_trait_expr, which
seems not to be used, returning 0, which is interpreted as UNKNOWN_LOCATION
and does no harm.
If location_t will change to be 64 bytes, as is under discussion, then on
32-bit platforms (well those, such as sparc, on which uint64_t has higher
alignment requirement than a pointer), reading t->exp.locus will end up
reading a different field (tree_trait_expr::type1) due to padding
offsets. That field is not generally 0, and the resulting bogus location_t
is sufficiently problematic to cause an ICE in the line_map code. Pretty
much any modules testcase displays the issue, such as partial-2_a.C.
Resolve by initializing tree_contains_struct with the correct value for
TRAIT_EXPR, namely TS_TYPED.
gcc/cp/ChangeLog:
* cp-objcp-common.cc (cp_common_init_ts): Change TRAIT_EXPR from
TS_EXP to TS_TYPED.
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This improves compatibility with clang, and is used by some projects.
PR target/117478
gcc/ChangeLog:
* config/darwin-driver.cc (darwin_driver_init): Handle ObjC/ObjC++
* config/darwin.opt: Add ObjC/ObjC++ as driver-only options.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
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This removes an (broken) simplification from fold which is already handled in match.
The reason why it was broken is because of the use of wi::to_wide on the RHS of the
rotate which could be 2 different types even though the LHS was the same type.
Since it is already handled in match (by the patterns for
`Turn (a OP c1) OP c2 into a OP (c1+c2).`). It can be removed without losing any optimizations.
Bootstrapped and tested on x86_64-linux-gnu.
PR middle-end/117492
gcc/ChangeLog:
* fold-const.cc (fold_binary_loc): Remove `Two consecutive rotates adding up
to the some integer` simplifcation.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr117492-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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After adding vn_valueize to the handle the `a | b ==/!= 0` case
of insert_predicates_for_cond, it would go into an infinite loop
as the Value number for either a or b could be the same as what it
is for the whole expression. This avoids that recursion so there is
no infinite loop here.
Bootstrapped and tested on x86_64-linux.
PR tree-optimization/117496
gcc/ChangeLog:
* tree-ssa-sccvn.cc (insert_predicates_for_cond): If the
valueization for the new lhs is the same as the old one,
don't recurse.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr117496-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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This is the followup as mentioned in
https://gcc.gnu.org/pipermail/gcc-patches/2024-November/667987.html .
We need to canonicalize the compares using tree_swap_operands_p instead
of checking CONSTANT_CLASS_P.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-ssa-sccvn.cc (visit_phi): Swap the operands
before calling vn_nary_op_lookup_pieces if
tree_swap_operands_p returns true.
(insert_predicates_for_cond): Use tree_swap_operands_p
instead of checking for CONSTANT_CLASS_P.
(process_bb): Swap the comparison and operands
if tree_swap_operands_p returns true.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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These commits used *.c rather than *.cc suffix and miracuously got through
the pre-commit hook but broke ChangeLog generation.
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r15-4998 and r15-5004 had wrong commit message, add those to
ignored commits. ChangeLog will need to be added manually.
2024-11-09 Jakub Jelinek <jakub@redhat.com>
* gcc-changelog/git_update_version.py (ignored_commits): Add 2
further commits.
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Every now and then my x86_64-linux bootstrap fails due to missing
dependencies somewhere in m2, usually during stage3. I'm using
make -j32 and run 2 bootstraps concurrently (x86_64-linux and i686-linux)
on the same box.
Last night the same happened to me again,
with the first error
In file included from ./tm.h:29,
from ../../gcc/backend.h:28,
from ../../gcc/m2/gm2-gcc/gcc-consolidation.h:27,
from m2/gm2-compiler-boot/M2AsmUtil.c:26:
../../gcc/config/i386/i386.h:2484:10: fatal error: insn-attr-common.h: No such file or directory
2484 | #include "insn-attr-common.h"
| ^~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[3]: *** [../../gcc/m2/Make-lang.in:1576: m2/gm2-compiler-boot/M2AsmUtil.o] Error 1
make[3]: *** Waiting for unfinished jobs....
Now, gcc/Makefile.in has a general rule:
# In order for parallel make to really start compiling the expensive
# objects from $(OBJS) as early as possible, build all their
# prerequisites strictly before all objects.
$(ALL_HOST_OBJS) : | $(generated_files)
which ensures that everything that might depend on the generated files
waits for those to be generated.
The above error clearly shows that such waiting didn't happen for
m2/gm2-compiler-boot/M2AsmUtil.o and some others.
ALL_HOST_OBJS includes $(ALL_HOST_FRONTEND_OBJS),
where the latter is
ALL_HOST_FRONTEND_OBJS = $(foreach v,$(CONFIG_LANGUAGES),$($(v)_OBJS))
m2_OBJS already includes various *.o files, for all those we wait until
the generated files are generated. Though, seems
cc1gm2 depends on m2/stage1/cc1gm2 (which is just copied there),
and that depends on m2/gm2-compiler-boot/m2flex.o,
$(GM2_C_OBJS) and m2/gm2-gcc/rtegraph.o already included in m2_OBJS,
but also on
$(GM2_LIBS_BOOT) $(MC_LIBS)
where
MC_LIBS=m2/mc-boot-ch/Glibc.o m2/mc-boot-ch/Gmcrts.o
GM2_LIBS_BOOT = m2/gm2-compiler-boot/gm2.a \
m2/gm2-libs-boot/libgm2.a \
$(GM2-BOOT-O)
GM2-BOOT-O isn't defined, and the 2 libraries depend on
$(BUILD-LIBS-BOOT) $(BUILD-COMPILER-BOOT)
So, the following patch adds those to m2_OBJS.
I'm not sure if something further is needed, like some objects
used to build the helper programs, mc and whatever else is needed,
I guess it depends on if they use or can use say tm.h or similar
headers which depend on the generated headers.
2024-11-09 Jakub Jelinek <jakub@redhat.com>
gcc/m2/
* Make-lang.in (m2_OBJS): Add $(BUILD-LIBS-BOOT),
$(BUILD-COMPILER-BOOT) and $(MC_LIBS).
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Starting with r14-435-g00d97bf3b5a, doing `#pragma arm "arm_mve.h"
false` or `#pragma arm "arm_mve.h" true` without first doing
`#pragma arm "arm_mve_types.h"` causes GCC to ICE.
gcc/ChangeLog:
PR target/117408
* config/arm/arm-mve-builtins.cc(handle_arm_mve_h): Detect if MVE
types is missing and if so, return error.
gcc/testsuite/ChangeLog:
PR target/117408
* gcc.target/arm/mve/pr117408-1.c: New test.
* gcc.target/arm/mve/pr117408-2.c: Likewise.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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My https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668065.html
patch regressed
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++11 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++11 (test for excess errors)
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++14 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-3.C -std=gnu++14 (test for excess errors)
...
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++26 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++26 (test for excess errors)
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++98 (internal compiler error: in create_tmp_var, at gimple-expr.cc:484)
+FAIL: g++.dg/tm/pr45940-4.C -std=gnu++98 (test for excess errors)
tests, but it turns out it is a preexisting bug.
If I modify the pr45940-3.C testcase
--- gcc/testsuite/g++.dg/tm/pr45940-3.C 2020-01-12 11:54:37.258400660 +0100
+++ gcc/testsuite/g++.dg/tm/pr45940-3.C 2024-11-08 10:35:11.918390743 +0100
@@ -16,6 +16,7 @@ class sp_counted_base
{
protected:
int use_count_; // #shared
+ int a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q, r, s, t, u, v, w, x, y, z, aa, ab, ac, ad, ae, af;
public:
__attribute__((transaction_safe))
virtual void dispose() = 0; // nothrow
then it ICEs already on vanilla trunk.
The problem is that expand_assign_tm just wants to force it into
TM memcpy argument, if is_gimple_reg (reg), then it creates a temporary,
stores the value there and takes temporary address, otherwise it takes
address of rhs. That doesn't work if rhs is an empty CONSTRUCTOR with
C++ non-POD type (TREE_ADDRESSABLE type), we ICE trying to create temporary,
because we shouldn't be creating a temporary.
Now before my patch with the CONSTRUCTOR only having a vtable pointer
(64bit) and 32-bit field, we gimplified the zero initialization just
as storing of 0s to the 2 fields, but as we are supposed to also clear
padding bits, we now gimplify it as MEM[...] = {}; to make sure
even the padding bits are cleared. With the adjusted testcase,
we gimplified it even before as MEM[...] = {}; because it was simply
too large and clearing everything looked beneficial.
The following patch fixes this ICE by using TM memset, it is both
wasteful to force zero constructor into a temporary just to TM memcpy
it into the lhs, and in C++ cases like this invalid.
2024-11-09 Jakub Jelinek <jakub@redhat.com>
* trans-mem.cc (expand_assign_tm): Don't take address
of empty CONSTRUCTOR, instead use BUILT_IN_TM_MEMSET
to clear lhs in that case. Formatting fixes.
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The patch for PR117145 and PR117245 also fixed PR100420 and PR116284 which
are bugs related to arrays of unspecified size. Those are now represented
as variable size arrays with size (0, 0). There are still some loose ends,
which are resolved here by
1. adding a testcase for PR116284,
2. moving code related to creation and detection of arrays of unspecified
sizes in their own functions,
3. preferring a specified size over an unspecified size when forming
a composite type as required by C99 (PR118391)
4. removing useless code in comptypes_internal and composite_type_internal.
PR c/116284
PR c/117391
gcc/c/ChangeLog:
* c-tree.h (c_type_unspecified_p): New inline function.
* c-typeck.cc (c_build_array_type_unspecified): New function.
(comptypes_interal): Remove useless code.
(composite_type_internal): Update.
* c-decl.cc (grokdeclarator): Revise.
gcc/testsuite/ChangeLog:
* gcc.dg/pr116284.c: New test.
* gcc.dg/pr117391.c: New test.
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- Fix warnings with newer python versions about bad escapes by
making all the python string raw.
- Add a fallback for using the builtin perf event list if the
CPU model number is unknown.
- Regenerate the shipped gcc-auto-profile with the changes.
contrib/ChangeLog:
* gen_autofdo_event.py: Convert strings to raw.
Add fallback to using builtin perf event list.
gcc/ChangeLog:
* config/i386/gcc-auto-profile: Regenerate.
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This patch implements C2y N3356, if declarations as described at
<https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3356.htm>.
This feature is cognate with C++17 Selection statements with initializer
<https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0305r1.html>,
but they are not the same yet. For example, C++17 allows
if (lock (); int i = getval ())
whereas C2y does not.
The proposal adds new grammar productions. selection-header is handled
in c_parser_selection_header which is the gist of the patch.
simple-declaration is handled by c_parser_declaration_or_fndef, which
gets a new parameter.
PR c/117019
gcc/c/ChangeLog:
* c-parser.cc (c_parser_declaration_or_fndef): Adjust declaration.
(c_parser_external_declaration): Adjust a call to
c_parser_declaration_or_fndef.
(c_parser_declaration_or_fndef): New bool parameter. Return a tree
instead of void. Adjust for N3356. Adjust a call to
c_parser_declaration_or_fndef.
(c_parser_compound_statement_nostart): Adjust calls to
c_parser_declaration_or_fndef.
(c_parser_selection_header): New.
(c_parser_paren_selection_header): New.
(c_parser_if_statement): Call c_parser_paren_selection_header
instead of c_parser_paren_condition.
(c_parser_switch_statement): Call c_parser_selection_header instead of
c_parser_expression.
(c_parser_for_statement): Adjust calls to c_parser_declaration_or_fndef.
(c_parser_objc_methodprotolist): Likewise.
(c_parser_oacc_routine): Likewise.
(c_parser_omp_loop_nest): Likewise.
(c_parser_omp_declare_simd): Likewise.
gcc/testsuite/ChangeLog:
* gcc.dg/c23-if-decls-1.c: New test.
* gcc.dg/c23-if-decls-2.c: New test.
* gcc.dg/c2y-if-decls-1.c: New test.
* gcc.dg/c2y-if-decls-2.c: New test.
* gcc.dg/c2y-if-decls-3.c: New test.
* gcc.dg/c2y-if-decls-4.c: New test.
* gcc.dg/c2y-if-decls-5.c: New test.
* gcc.dg/c2y-if-decls-6.c: New test.
* gcc.dg/c2y-if-decls-7.c: New test.
* gcc.dg/c2y-if-decls-8.c: New test.
* gcc.dg/c2y-if-decls-9.c: New test.
* gcc.dg/c2y-if-decls-10.c: New test.
* gcc.dg/c2y-if-decls-11.c: New test.
* gcc.dg/gnu2y-if-decls-1.c: New test.
* gcc.dg/gnu99-if-decls-1.c: New test.
* gcc.dg/gnu99-if-decls-2.c: New test.
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LRA has problems handling spills for OI mode. There are issues with
SUBREG support as well.
2024-11-08 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
PR target/117238
* config/pa/pa64-regs.h (PA_HARD_REGNO_MODE_OK): Don't allow
mode size 32.
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Division is slow on hppa and mode sizes are powers of 2. So, we
can use '&' operator to check displacement alignment.
2024-11-08 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
* config/pa/predicates.md (base14_operand): Use '&' operator
instead of '%' to check displacement alignment.
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LRA has problems handling spills for OI and TI modes. There are
issues with SUBREG support as well.
This change fixes gcc.c-torture/compile/pr92618.c with LRA.
2024-11-08 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
PR target/117238
* config/pa/pa32-regs.h (PA_HARD_REGNO_MODE_OK): Don't allow
mode size 32. Limit mode size 16 in general registers to
complex modes.
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This is fairly subtle.
When handling spills for SUBREG arguments in pa_emit_move_sequence,
alter_subreg may be called. It in turn calls adjust_address_1 and
change_address_1. change_address_1 calls pa_legitimate_address_p
to validate the new spill address. change_address_1 generates an
internal compiler error if the address is not valid. We need to
allow 14-bit displacements for all modes when reload_in_progress
is true and strict is false to prevent the internal compiler error.
SUBREGs are only used with the general registers, so the spill
should result in an integer access. 14-bit displacements are okay
for integer loads and stores but not for floating-point loads and
stores.
Potentially, the change could break the handling of spills for the
floating point-registers but I believe these are handled separately
in pa_emit_move_sequence.
This change fixes the build of symmetrica-3.0.1+ds.
2024-11-08 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
PR target/117443
* config/pa/pa.cc (pa_legitimate_address_p): Allow any
14-bit displacement when reload is in progress and strict
is false.
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I've noticed alloc_align attribute is missing on the non-vector
::operator new with std::align_val_t and const std::nothrow_t&
arguments, this patch adds it. The last hunk is just
an attempt to make the line shorter.
The first hunk originally added also __alloc_size__ (1) attribute,
but seems that regresses
FAIL: g++.dg/tm/pr46270.C -std=gnu++98 (test for excess errors)
with
Excess errors:
.../libstdc++-v3/libsupc++/new:137:26: warning: new declaration 'void* operator new(std::size_t)' ambiguates built-in declaration 'void* operator new(long unsigned int)
+transaction_safe' [-Wbuiltin-declaration-mismatch]
.../libstdc++-v3/libsupc++/new:140:26: warning: new declaration 'void* operator new [](std::size_t)' ambiguates built-in declaration 'void* operator new [](long unsigned int)
+transaction_safe' [-Wbuiltin-declaration-mismatch]
I must say I have no clue why that happens only in C++98 (C++11 and
above are quiet) and why only with -fgnu-tm, tried to debug that but
am lost. It is some conflict with the predeclared ::operator new, but
those clearly do have the externally_visible attribute, and alloc_size (1)
attributes:
extvisattr = build_tree_list (get_identifier ("externally_visible"),
NULL_TREE);
newattrs = tree_cons (get_identifier ("alloc_size"),
build_tree_list (NULL_TREE, integer_one_node),
extvisattr);
newtype = cp_build_type_attribute_variant (ptr_ftype_sizetype, newattrs);
newtype = build_exception_variant (newtype, new_eh_spec);
...
tree opnew = push_cp_library_fn (NEW_EXPR, newtype, 0);
DECL_IS_MALLOC (opnew) = 1;
DECL_SET_IS_OPERATOR_NEW (opnew, true);
DECL_IS_REPLACEABLE_OPERATOR (opnew) = 1;
and at C++98 I think libstdc++ doesn't add transaction_safe attribute:
// Conditionally enable annotations for the Transactional Memory TS on C++11.
// Most of the following conditions are due to limitations in the current
// implementation.
#if __cplusplus >= 201103L && _GLIBCXX_USE_CXX11_ABI \
&& _GLIBCXX_USE_DUAL_ABI && __cpp_transactional_memory >= 201500L \
&& !_GLIBCXX_FULLY_DYNAMIC_STRING && _GLIBCXX_USE_WEAK_REF \
&& _GLIBCXX_USE_ALLOCATOR_NEW
#define _GLIBCXX_TXN_SAFE transaction_safe
#define _GLIBCXX_TXN_SAFE_DYN transaction_safe_dynamic
#else
#define _GLIBCXX_TXN_SAFE
#define _GLIBCXX_TXN_SAFE_DYN
#endif
push_cp_library_fn adds transaction_safe attribute whenever -fgnu-tm
is used, regardless of the other conditionals:
if (flag_tm)
apply_tm_attr (fn, get_identifier ("transaction_safe"));
Anyway, omitting alloc_size (1) fixes that test and given that the
predeclared operator new already has alloc_size (1) attribute, I think it
can be safely left out.
2024-11-08 Jakub Jelinek <jakub@redhat.com>
* libsupc++/new (::operator new, ::operator new[]): Add malloc
attribute where missing. Add alloc_align attribute when
std::align_val_t is present and where it was missing. Formatting fix.
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libstdc++-v3/ChangeLog:
* include/bits/hashtable.h (_Hashtable): Add 'inline' to some
one-line constructors.
Reviewed-by: François Dumont <fdumont@gcc.gnu.org>
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This is not a reserved name in C++11 and C++14, so must not be defined.
Also use the appropriate feature test macros for the try_emplace members
of the Debug Mode maps.
libstdc++-v3/ChangeLog:
* include/bits/hashtable_policy.h (_Insert_base::try_emplace):
Do not define for C++11 and C++14.
* include/debug/map.h (try_emplace): Use feature test macro.
* include/debug/unordered_map (try_emplace): Likewise.
* testsuite/17_intro/names.cc: Define try_emplace before C++17.
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x86 doesn't have .REDUC_PLUS for V2SImode - there's no effective
target for that so add it to the list of targets not expecting the
BB vectorization.
* gcc.dg/vect/bb-slp-77.c: Add x86_64-*-* and i?86-*-* to
the list of expected failing targets.
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When not dealing with the special armv8.1-m.main conditional instructions case
make sure it uses the default_noce_conversion_profitable_p call to determine
whether the sequence is cost effective.
Also make sure arm_noce_conversion_profitable_p accepts vsel<cond> patterns for
Armv8.1-M Mainline targets.
gcc/ChangeLog:
PR target/116444
* config/arm/arm.cc (arm_noce_conversion_profitable_p): Call
default_noce_conversion_profitable_p when not dealing with the
armv8.1-m.main special case.
(arm_is_vsel_fp_insn): New function.
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Since C++20 virtual methods can be constexpr, and if they are
constexpr evaluated, we choose tentative_decl_linkage for those
defer their output and decide at_eof again.
On the following testcases we ICE though, because if
expand_or_defer_fn_1 decides to use tentative_decl_linkage, it
returns true and the caller in that case cals emit_associated_thunks,
where use_thunk which it calls asserts DECL_INTERFACE_KNOWN on the
thunk destination, which isn't the case for tentative_decl_linkage.
The following patch fixes the ICE by not emitting the thunks
for the DECL_DEFER_OUTPUT fns just yet but waiting until at_eof
time when we return to those.
Note, the second testcase ICEs already since r0-110035 with -std=c++0x
before it gets a chance to diagnose constexpr virtual method.
2024-11-08 Jakub Jelinek <jakub@redhat.com>
PR c++/117317
* semantics.cc (emit_associated_thunks): Do nothing for
!DECL_INTERFACE_KNOWN && DECL_DEFER_OUTPUT fns.
* g++.dg/cpp2a/pr117317-1.C: New test.
* g++.dg/cpp2a/pr117317-2.C: New test.
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Update test case for armv8.1-m.main that supports conditional
arithmetic.
armv7-m:
push {r4, lr}
ldr r4, .L6
ldr r4, [r4]
lsls r4, r4, #29
it mi
addmi r2, r2, #1
bl bar
movs r0, #0
pop {r4, pc}
armv8.1-m.main:
push {r3, r4, r5, lr}
ldr r4, .L5
ldr r5, [r4]
tst r5, #4
csinc r2, r2, r2, eq
bl bar
movs r0, #0
pop {r3, r4, r5, pc}
gcc/testsuite/ChangeLog:
* gcc.target/arm/epilog-1.c: Use check-function-bodies.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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This fixes reported regression at
https://linaro.atlassian.net/browse/GNU-1407.
gcc/testsuite/ChangeLog:
* gcc.target/arm/pr68620.c: Use effective-target
arm_libc_fp_abi.
* lib/target-supports.exp: Define effective-target
arm_libc_fp_abi.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Co-authored-by: Richard Earnshaw <rearnsha@arm.com>
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When building the test case with neon, the 'vst1.32' instruction is used
instead of 'strd'. Allow both variants to make the test pass.
gcc/testsuite/ChangeLog:
* gcc.target/arm/pr40457-2.c: Add vst1.32 as an allowed
instruction.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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Using "dg-do run" with a selector overrides the default selector set by
vect.exp that picks between "dg-do run" and "dg-do compile" based on the
target's support for simd operations for Arm targets.
The actual selection of default operation is performed in
check_vect_support_and_set_flags.
gcc/testsuite/ChangeLog:
* g++.dg/vect/pr84556.cc: Change from "dg-do run" with selector
to instead use dg-require-effective-target with the same
selector.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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The following also enables the testcase on x86 as it now has the
required cbranch.
* gcc.dg/vect/vect-early-break_21.c: Remove disabling of
x86_64 and i?86.
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This uses 'if constexpr' instead of tag dispatching, removing the need
for a second call using that tag, and simplifying the overload set that
needs to be resolved for calls to __distance_fw.
libstdc++-v3/ChangeLog:
* include/bits/hashtable_policy.h (__distance_fw): Replace tag
dispatching with 'if constexpr'.
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Implement -mcpu options for:
- Cortex-A520AE
- Cortex-A720AE
- Cortex-R82AE
These all implement the same feature sets as their non-AE
counterparts, using the same scheduler and costs and differing only in
their respective part numbers.
gcc/ChangeLog:
* config/aarch64/aarch64-cores.def (cortex-a520ae,
cortex-a720ae, cortex-r82ae): Define new entries.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document A520AE, A720AE and R82AE CPUs.
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Test uses MVE, so add effective-target arm_fp requirement.
gcc/testsuite/ChangeLog:
* g++.target/arm/mve/general-c++/nomve_fp_1.c: Use
effective-target arm_fp.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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form1:
void __attribute__((noinline)) \
vec_sat_u_sub_imm##IMM##_##T##_fmt_1 (T *out, T *in, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
out[i] = (T)IMM >= in[i] ? (T)IMM - in[i] : 0; \
}
Passed the rv64gcv full regression test.
Signed-off-by: Li Xu <xuli1@eswincomputing.com>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h: add data for vec sat_sub.
* gcc.target/riscv/rvv/autovec/vec_sat_arith.h: add unsigned imm vec sat_sub form1.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-1.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-2.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-3.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-4.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-1.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-2.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-3.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-4.c: New test.
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Clarify the effects if rehashing is needed. Document the __n_elt
parameter.
libstdc++-v3/ChangeLog:
* include/bits/hashtable.h (_M_insert_unique_node): Improve
comment.
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[PR115285]
The conversions to key_type and value_type that are performed when
inserting into _Hashtable need to be fixed to do any required
conversions explicitly. The current code assumes that conversions from
the parameter to the key_type or value_type can be done implicitly,
which isn't necessarily true.
Remove the _S_forward_key function which doesn't handle all cases and
either forward the parameter if it already has type cv key_type, or
explicitly construct a temporary of type key_type.
Similarly, the _ConvertToValueType specialization for maps doesn't
handle all cases either, for std::pair arguments only some value
categories are handled. Remove _ConvertToValueType and for the _M_insert
function for unique keys, either forward the argument unchanged or
explicitly construct a temporary of type value_type.
For the _M_insert overload for non-unique keys we don't need any
conversion at all, we can just forward the argument directly to where we
construct a node.
libstdc++-v3/ChangeLog:
PR libstdc++/115285
* include/bits/hashtable.h (_Hashtable::_S_forward_key): Remove.
(_Hashtable::_M_insert_unique_aux): Replace _S_forward_key with
a static_cast to a type defined using conditional_t.
(_Hashtable::_M_insert): Replace _ConvertToValueType with a
static_cast to a type defined using conditional_t.
* include/bits/hashtable_policy.h (_ConvertToValueType): Remove.
* testsuite/23_containers/unordered_map/insert/115285.cc: New test.
* testsuite/23_containers/unordered_set/insert/115285.cc: New test.
* testsuite/23_containers/unordered_set/96088.cc: Adjust
expected number of allocations.
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libstdc++-v3/ChangeLog:
* include/bits/stl_pair.h (__is_pair): Define for C++11 and
C++14 as well.
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