diff options
Diffstat (limited to 'libgcc')
| -rw-r--r-- | libgcc/ChangeLog | 6 | ||||
| -rw-r--r-- | libgcc/config/i386/sol2-unwind.h | 7 | ||||
| -rw-r--r-- | libgcc/config/sparc/sol2-unwind.h | 7 |
3 files changed, 18 insertions, 2 deletions
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 861d5da..66f2921 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,9 @@ +2013-05-28 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set + fs->signal_frame for SIGFPE raised for IEEE-754 exceptions. + * config/i386/sol2-unwind.h (x86_fallback_frame_state): Likewise. + 2013-05-22 Eric Botcazou <ebotcazou@adacore.com> * config.host (powerpc-*-elf*): Add rs6000/t-savresfgpr to tmake_file. diff --git a/libgcc/config/i386/sol2-unwind.h b/libgcc/config/i386/sol2-unwind.h index f804aaf..e677109 100644 --- a/libgcc/config/i386/sol2-unwind.h +++ b/libgcc/config/i386/sol2-unwind.h @@ -249,7 +249,12 @@ x86_fallback_frame_state (struct _Unwind_Context *context, fs->regs.reg[8].how = REG_SAVED_OFFSET; fs->regs.reg[8].loc.offset = (long)&mctx->gregs[EIP] - new_cfa; fs->retaddr_column = 8; - fs->signal_frame = 1; + + /* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn + rather than before it, so don't set fs->signal_frame in that case. + We test whether the ES field of the Status Register is zero. */ + if ((mctx->fpregs.fp_reg_set.fpchip_state.status & 0x80) == 0) + fs->signal_frame = 1; return _URC_NO_REASON; } diff --git a/libgcc/config/sparc/sol2-unwind.h b/libgcc/config/sparc/sol2-unwind.h index 584a9b0..4a8c42f5 100644 --- a/libgcc/config/sparc/sol2-unwind.h +++ b/libgcc/config/sparc/sol2-unwind.h @@ -403,7 +403,12 @@ MD_FALLBACK_FRAME_STATE_FOR (struct _Unwind_Context *context, fs->retaddr_column = 0; fs->regs.reg[0].how = REG_SAVED_OFFSET; fs->regs.reg[0].loc.offset = (long)shifted_ra_location - new_cfa; - fs->signal_frame = 1; + + /* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn + rather than before it, so don't set fs->signal_frame in that case. + We test whether the cexc field of the FSR is zero. */ + if ((mctx->fpregs.fpu_fsr & 0x1f) == 0) + fs->signal_frame = 1; return _URC_NO_REASON; } |