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-rw-r--r--gcc/ChangeLog403
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/ada/ChangeLog71
-rw-r--r--gcc/analyzer/ChangeLog8
-rw-r--r--gcc/c-family/ChangeLog10
-rw-r--r--gcc/c/ChangeLog7
-rw-r--r--gcc/cp/ChangeLog10
-rw-r--r--gcc/fortran/ChangeLog7
-rw-r--r--gcc/testsuite/ChangeLog428
9 files changed, 945 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dabb6b1..9018283 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,406 @@
+2024-11-14 Jan Hubicka <hubicka@ucw.cz>
+
+ * common.opt.urls: Fix.
+
+2024-11-14 Richard Ball <richard.ball@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * doc/extend.texi: Add AArch64 docs for indirect_return
+ attribute.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * config/aarch64/aarch64.cc (aarch64_gnu_attributes): Add
+ indirect_return.
+ (aarch64_gen_callee_cookie): Use indirect_return attribute.
+ (aarch64_callee_indirect_return): New.
+ (aarch_fun_is_indirect_return): New.
+ (aarch64_function_ok_for_sibcall): Disallow tail calls if caller
+ is non-indirect_return but callee is indirect_return.
+ (aarch64_function_arg): Add indirect_return to cookie.
+ (aarch64_init_cumulative_args): Record indirect_return in
+ CUMULATIVE_ARGS.
+ (aarch64_comp_type_attributes): Check indirect_return attribute.
+ (aarch64_output_mi_thunk): Add indirect_return to cookie.
+ * config/aarch64/aarch64.h (CUMULATIVE_ARGS): Add new field
+ indirect_return.
+ * config/aarch64/aarch64.md (tlsdesc_small_<mode>): Update.
+ * config/aarch64/aarch64-opts.h (AARCH64_NUM_ABI_ATTRIBUTES): New.
+ * config/aarch64/aarch64-protos.h (aarch64_gen_callee_cookie): Update.
+ * config/arm/aarch-bti-insert.cc (call_needs_bti_j): New.
+ (rest_of_insert_bti): Use call_needs_bti_j.
+ * config/arm/aarch-common-protos.h
+ (aarch_fun_is_indirect_return): New.
+ * config/arm/arm.cc
+ (aarch_fun_is_indirect_return): New.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64.cc (GNU_PROPERTY_AARCH64_FEATURE_1_GCS):
+ Define.
+ (aarch64_file_end_indicate_exec_stack): Set GCS property bit.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
+ macros for GCS.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64.h (STACK_SAVEAREA_MODE): Make space for gcs.
+ * config/aarch64/aarch64.md (save_stack_nonlocal): New.
+ (restore_stack_nonlocal): New.
+ * tree-nested.cc (get_nl_goto_field): Updated.
+
+2024-11-14 Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * config/aarch64/arm_acle.h (__gcspr): New.
+ (__gcspopm): New.
+ (__gcsss): New.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+ Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-builtins.cc (enum aarch64_builtins): Add
+ AARCH64_BUILTIN_GCSPR, AARCH64_BUILTIN_GCSPOPM, AARCH64_BUILTIN_GCSSS.
+ (aarch64_init_gcs_builtins): New.
+ (aarch64_general_init_builtins): Call aarch64_init_gcs_builtins.
+ (aarch64_expand_gcs_builtin): New.
+ (aarch64_general_expand_builtin): Call aarch64_expand_gcs_builtin.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64.md (aarch64_load_gcspr): New.
+ (aarch64_gcspopm): New.
+ (aarch64_gcspopm_xzr): New.
+ (aarch64_gcsss1): New.
+ (aarch64_gcsss2): New.
+ Co-authored-by: Richard Sandiford <richard.sandiford@arm.com>
+
+2024-11-14 Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * config/aarch64/arm_acle.h (__chkfeat): New.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64-builtins.cc (enum aarch64_builtins):
+ Define AARCH64_BUILTIN_CHKFEAT.
+ (aarch64_general_init_builtins): Handle chkfeat.
+ (aarch64_general_expand_builtin): Handle chkfeat.
+ Co-authored-by: Richard Sandiford <richard.sandiford@arm.com>
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64.md (aarch64_chkfeat): New.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * config/aarch64/aarch64-protos.h (aarch_gcs_enabled): Declare.
+ * config/aarch64/aarch64.cc (aarch_gcs_enabled): Define.
+ (aarch_handle_no_branch_protection): Handle gcs.
+ (aarch_handle_standard_branch_protection): Handle gcs.
+ (aarch_handle_gcs_protection): New.
+ * config/aarch64/aarch64.opt: Add aarch_enable_gcs.
+ * configure: Regenerate.
+ * configure.ac: Handle gcs in --enable-standard-branch-protection.
+ * doc/invoke.texi: Document -mbranch-protection=gcs.
+
+2024-11-14 Jan Hubicka <hubicka@ucw.cz>
+
+ PR tree-optimization/117370
+ * common.opt: Add -fmalloc-dce.
+ * common.opt.urls: Update.
+ * doc/invoke.texi: Document it; also add missing -flifetime-dse entry.
+ * tree-ssa-dce.cc (is_removable_allocation_p): Break out from
+ ...
+ (mark_stmt_if_obviously_necessary): ... here; also check that
+ operator new satisfies gimple_call_from_new_or_delete.
+ (checks_return_value_of_removable_allocation_p): New Function.
+ (mark_all_reaching_defs_necessary_1): add missing case for
+ STRDUP and STRNDUP
+ (propagate_necessity): Use is_removable_allocation_p and
+ checks_return_value_of_removable_allocation_p.
+ (eliminate_unnecessary_stmts): Update conditionals that use
+ removed allocation; use is_removable_allocation_p.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.cc (get_group_load_store_type): Do not
+ exempt cpart_size == cnunits from failing.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.cc (get_group_load_store_type): Add missing
+ braces.
+
+2024-11-14 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (ipa_dump_jump_function): Declare.
+ * ipa-prop.cc (ipa_dump_jump_function): New function.
+ (ipa_print_node_jump_functions_for_edge): Move printing of
+ individual jump functions to the new function.
+
+2024-11-14 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (ipa_print_constant_value): Declare.
+ * ipa-prop.cc (ipa_print_constant_value): Make public.
+ * ipa-cp.cc (print_ipcp_constant_value): Re-add this overloaded
+ function for printing tree constants.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-generic.cc (expand_vector_divmod): Query vector
+ comparison and vec_cond_mask capability.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.cc (vectorizable_condition): Refactor
+ target support check.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117567
+ * tree-vect-slp.cc (vect_build_slp_tree_2): Handle not present
+ lanes when doing re-association.
+
+2024-11-14 Andrew Pinski <quic_apinski@quicinc.com>
+
+ * cfgexpand.cc (add_scope_conflicts): Return right away
+ if there are only one stack variable.
+
+2024-11-14 Eikansh Gupta <quic_eikagupt@quicinc.com>
+
+ PR tree-optimization/109906
+ * match.pd (a rrotate (32-b) -> a lrotate b): New pattern
+ (a lrotate (32-b) -> a rrotate b): New pattern
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.cc (get_group_load_store_type): For
+ VMAT_ELEMENTWISE there's no overrun.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117554
+ * tree-vect-stmts.cc (get_group_load_store_type): We can
+ use gather/scatter only for a single-lane single element group
+ access.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117559
+ * tree-vect-slp.cc (vect_mark_slp_stmts): Pass in vinfo,
+ mark all mask defs of a load/store-lane .MASK_LOAD/STORE
+ as pure.
+ (vect_make_slp_decision): Adjust.
+ (vect_slp_analyze_bb_1): Likewise.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117556
+ PR tree-optimization/117553
+ * tree-vect-stmts.cc (vect_analyze_stmt): Do not analyze
+ the SLP load-lanes node for live lanes, but only the
+ permute node.
+ (vect_transform_stmt): Likewise for the transform.
+
+2024-11-14 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/117495
+ * config/i386/i386.md (cstorebf4): Use ix86_fp_comparison_operator
+ and calls ix86_expand_setcc directly.
+
+2024-11-13 Jin Ma <jinma@linux.alibaba.com>
+
+ PR target/116591
+ * config/riscv/vector.md: Add restriction to call pred_th_whole_mov.
+
+2024-11-13 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-protos.h
+ (aarch64_required_extensions::common_denominator): New member
+ function.
+ * config/aarch64/aarch64-sve-builtins-base.def: Remove zero-variant
+ entry for mmla.
+ * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): Remove
+ support for it.
+ * config/aarch64/aarch64-sve-builtins.cc
+ (function_builder::add_overloaded): Relax the assert for duplicate
+ definitions and instead calculate the common denominator of all
+ requirements.
+
+2024-11-13 Filip Kastl <fkastl@suse.cz>
+
+ PR target/56504
+ * config/i386/i386-options.cc (ix86_option_override_internal):
+ Add ix86_veclibabi_type_aocl case.
+ * config/i386/i386-options.h (ix86_veclibabi_aocl): Add extern
+ ix86_veclibabi_aocl().
+ * config/i386/i386-opts.h (enum ix86_veclibabi): Add
+ ix86_veclibabi_type_aocl into the ix86_veclibabi enum.
+ * config/i386/i386.cc (ix86_veclibabi_aocl): New function.
+ * config/i386/i386.opt: Add the 'aocl' type.
+ * doc/invoke.texi: Document -mveclibabi=aocl.
+
+2024-11-13 John David Anglin <danglin@gcc.gnu.org>
+
+ PR target/117525
+ * config/pa/pa.md (fix_truncsfsi2): Remove inner `fix:SF`.
+ (fix_truncdfsi2, fix_truncsfdi2, fix_truncdfdi2,
+ fixuns_truncsfsi2, fixuns_truncdfsi2, fixuns_truncsfdi2,
+ fixuns_truncdfdi2): Likewise.
+
+2024-11-13 David Malcolm <dmalcolm@redhat.com>
+
+ * diagnostic-path.cc (diagnostic_event::get_desc): Add param
+ "ref_pp" and use instead of global_dc.
+ (class path_label): Likewise, adding field m_ref_pp.
+ (event_range::event_range): Add param "ref_pp" and pass to
+ m_path_label.
+ (path_summary::path_summary): Add param "ref_pp" and pass to
+ event_range ctor.
+ (diagnostic_text_output_format::print_path): Pass *pp to
+ path_summary ctor.
+ (selftest::test_empty_path): Pass *event_pp to pass_summary ctor.
+ (selftest::test_intraprocedural_path): Likewise.
+ (selftest::test_interprocedural_path_1): Likewise.
+ (selftest::test_interprocedural_path_2): Likewise.
+ (selftest::test_recursion): Likewise.
+ (selftest::test_control_flow_1): Likewise.
+ (selftest::test_control_flow_2): Likewise.
+ (selftest::test_control_flow_3): Likewise.
+ (selftest::assert_cfg_edge_path_streq): Likewise.
+ (selftest::test_control_flow_5): Likewise.
+ (selftest::test_control_flow_6): Likewise.
+ * diagnostic-path.h (diagnostic_event::get_desc): Add param
+ "ref_pp".
+ * lazy-diagnostic-path.cc (selftest::test_intraprocedural_path):
+ Pass *event_pp to get_desc.
+ * simple-diagnostic-path.cc (selftest::test_intraprocedural_path):
+ Likewise.
+
+2024-11-13 Soumya AR <soumyaa@nvidia.com>
+
+ PR target/57492
+ * match.pd: Added patterns to fold calls to pow to ldexp and optimize
+ specific ldexp calls.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * config/riscv/riscv.cc (add_condition_to_bb): New function.
+ (dispatch_function_versions): New function.
+ (get_suffixed_assembler_name): New function.
+ (make_resolver_func): New function.
+ (riscv_generate_version_dispatcher_body): New function.
+ (riscv_get_function_versions_dispatcher): New function.
+ (TARGET_GENERATE_VERSION_DISPATCHER_BODY): Implement it.
+ (TARGET_GET_FUNCTION_VERSIONS_DISPATCHER): Implement it.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * config/riscv/riscv.cc
+ (riscv_mangle_decl_assembler_name): New function.
+ (TARGET_MANGLE_DECL_ASSEMBLER_NAME): Define.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * config/riscv/riscv.cc
+ (parse_features_for_version): New function.
+ (compare_fmv_features): New function.
+ (riscv_compare_version_priority): New function.
+ (riscv_common_function_versions): New function.
+ (TARGET_COMPARE_VERSION_PRIORITY): Implement it.
+ (TARGET_OPTION_FUNCTION_VERSIONS): Implement it.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * config/riscv/riscv-protos.h
+ (riscv_process_target_attr): Remove as it is not used.
+ (riscv_option_valid_version_attribute_p): Declare.
+ (riscv_process_target_version_attr): Declare.
+ * config/riscv/riscv-target-attr.cc
+ (riscv_target_attrs): Renamed from riscv_attributes.
+ (riscv_target_version_attrs): New attributes for target_version.
+ (riscv_process_one_target_attr): New arguments to select attrs.
+ (riscv_process_target_attr): Likewise.
+ (riscv_option_valid_attribute_p): Likewise.
+ (riscv_process_target_version_attr): New function.
+ (riscv_option_valid_version_attribute_p): New function.
+ * config/riscv/riscv.cc
+ (TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P): Implement it.
+ * config/riscv/riscv.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE): Define
+ it to 0 to use "target_version" for function versioning.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * common/config/riscv/riscv-common.cc
+ (RISCV_EXT_BITMASK): New macro.
+ (struct riscv_ext_bitmask_table_t): New struct.
+ (riscv_minimal_hwprobe_feature_bits): New function.
+ * common/config/riscv/riscv-ext-bitmask.def: New file.
+ * config/riscv/riscv-subset.h (GCC_RISCV_SUBSET_H): Include
+ riscv-feature-bits.h.
+ (riscv_minimal_hwprobe_feature_bits): Declare the function.
+ * config/riscv/riscv-feature-bits.h: New file.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * config/riscv/riscv-target-attr.cc
+ (riscv_target_attr_parser::handle_priority): New function.
+ (riscv_target_attr_parser::update_settings): Update priority
+ attribute.
+ * config/riscv/riscv.opt: Add TargetVariable riscv_fmv_priority.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * defaults.h (TARGET_CLONES_ATTR_SEPARATOR): Define new macro.
+ * multiple_target.cc (get_attr_str): Use
+ TARGET_CLONES_ATTR_SEPARATOR to separate attributes.
+ (separate_attrs): Likewise.
+ (expand_target_clones): Likewise.
+ * attribs.cc (attr_strcmp): Likewise.
+ (sorted_attr_string): Likewise.
+ * tree.cc (get_target_clone_attr_len): Likewise.
+ * config/riscv/riscv.h (TARGET_CLONES_ATTR_SEPARATOR): Define
+ TARGET_CLONES_ATTR_SEPARATOR for RISC-V.
+ * doc/tm.texi: Document TARGET_CLONES_ATTR_SEPARATOR.
+ * doc/tm.texi.in: Likewise.
+
+2024-11-13 Martin Uecker <uecker@tugraz.at>
+
+ PR c/117059
+ * doc/invoke.texi (Wzero-as-null-pointer-constant): Adapt
+ description.
+
+2024-11-13 Soumya AR <soumyaa@nvidia.com>
+
+ PR target/111733
+ * config/aarch64/aarch64-sve.md
+ (ldexp<mode>3): Added a new pattern to match ldexp calls with scalar
+ floating modes and expand to the existing pattern for FSCALE.
+ * config/aarch64/iterators.md:
+ (SVE_FULL_F_SCALAR): Added an iterator to match all FP SVE modes as well
+ as their scalar equivalents.
+ (VPRED): Extended the attribute to handle GPF_HF modes.
+ * internal-fn.def (LDEXP): Changed macro to incorporate ldexpf16.
+
+2024-11-13 xuli <xuli1@eswincomputing.com>
+
+ PR target/117483
+ * config/riscv/riscv-vsetvl.cc: Fix bug.
+
+2024-11-13 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
+
+ * config/riscv/riscv.cc (riscv_rtx_costs): Correct costing of LO_SUM
+ expressions.
+
+2024-11-13 Hu, Lin1 <lin1.hu@intel.com>
+
+ PR target/117418
+ * config/i386/i386-expand.cc (ix86_expand_builtin): Convert
+ pointer's mode according to Pmode.
+
2024-11-13 Jeff Law <jlaw@ventanamicro.com>
Revert:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 8a225a1..97867f4 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241113
+20241114
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 814b8a1..335587f 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,74 @@
+2024-11-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gcc-interface/decl.cc (elaborate_expression_2): Do not divide and
+ multiply back if the alignment factor is already explicit.
+
+2024-11-14 Steve Baird <baird@adacore.com>
+
+ * sem_aggr.adb (Resolve_Delta_Aggregate): The rule about
+ discriminant dependent component references in choices applies to
+ both array and record delta aggregates, so check for violations in
+ Resolve_Delta_Aggregate. Call a new procedure,
+ Check_For_Bad_Dd_Component_Choice, for each choice.
+ (Resolve_Delta_Record_Aggregate): Call a new procedure,
+ Check_For_Bad_Overlap, for each pair of choices.
+
+2024-11-14 Ronan Desplanques <desplanques@adacore.com>
+
+ * bindgen.adb (Gen_Elab_Calls): Tweak test.
+ (Gen_Elab_Externals): Likewise.
+
+2024-11-14 Claire Dross <dross@adacore.com>
+
+ * libgnat/a-strmap.adb: Add assert to regain proofs.
+ * libgnat/a-strsup.adb: Likewise.
+ * libgnat/s-aridou.adb: Add assertions to regain proofs.
+ * libgnat/s-arit32.adb: Use Exceptional_Cases to specify Raise.
+ * libgnat/s-arit64.adb: Use Round_Quatient from Impl instead of
+ redefining it.
+ * libgnat/s-arit64.ads: Likewise.
+ * libgnat/s-expmod.adb: Regain proof of lemma.
+ * libgnat/s-exponn.adb: Likewise.
+ * libgnat/s-expont.adb: Likewise.
+ * libgnat/s-imgboo.adb: Add local lemma to regain proof.
+ * libgnat/s-valuti.ads: Add Always_Terminates on Bad_Value.
+
+2024-11-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ * libgnat/s-imagef.ads (Image_Fixed): Adjust outdated sentence.
+
+2024-11-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ * sem_ch13.adb (Record_Hole_Check): Deal consistently with the base
+ type throughout the processing. Return if its declaration is not a
+ full type declaration. Assert that its record definition is either
+ a derived type definition or a record definition. If the type has a
+ private declaration that does not specify unknown discriminants, use
+ it as the source of discriminant specifications, if any.
+ (Check_Component_List): Process every N_Discriminant_Specification
+ but assert that its defining identifier is really a discriminant.
+
+2024-11-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ * libgnat/s-aridou.ads (Add_With_Ovflo_Check): Adjust description.
+ (Subtract_With_Ovflo_Check): Likewise.
+ (Multiply_With_Ovflo_Check): Likewise.
+ (Scaled_Divide): Likewise.
+ (Double_Divide): Likewise.
+ * libgnat/s-arit64.ads (Multiply_With_Ovflo_Check64): Likewise.
+ * libgnat/s-arit128.ads (Multiply_With_Ovflo_Check128): Likewise.
+
+2024-11-14 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR ada/112524
+ PR ada/113781
+ * par-ch4.adb (P_Primary) <Tok_For>: Give an error about missing
+ parentheses in the (purported) iterated component case too.
+ (P_Unparen_Cond_Expr_Etc): Likewise.
+ * sem.adb (Analyze): Raise PE on N_Iterated_Component_Association.
+ * sem_util.ads (Diagnose_Iterated_Component_Association): Delete.
+ * sem_util.adb (Diagnose_Iterated_Component_Association): Likewise.
+
2024-11-12 Marc Poulhiès <poulhies@adacore.com>
* gcc-interface/Makefile.in: Remove extra 'with'.
diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog
index a586a74..ebebfc2 100644
--- a/gcc/analyzer/ChangeLog
+++ b/gcc/analyzer/ChangeLog
@@ -1,3 +1,11 @@
+2024-11-13 David Malcolm <dmalcolm@redhat.com>
+
+ * checker-path.cc (checker_path::debug): Explicitly use
+ global_dc's reference printer.
+ * diagnostic-manager.cc
+ (diagnostic_manager::prune_interproc_events): Likewise.
+ (diagnostic_manager::prune_system_headers): Likewise.
+
2024-11-02 David Malcolm <dmalcolm@redhat.com>
* analyzer.cc: Include "make-unique.h". Convert "to_json"
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index b1cbbed..5e3a59f 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,13 @@
+2024-11-13 Martin Uecker <uecker@tugraz.at>
+
+ PR c/117059
+ * c.opt (Wzero-as-null-pointer-constant): Enable for C and ObjC.
+
+2024-11-13 Jakub Jelinek <jakub@redhat.com>
+
+ * c-lex.cc (interpret_float): Subtract 3 or 4 from copylen
+ rather than 2 if last character of CPP_N_DFLOAT is a digit.
+
2024-11-12 Jason Merrill <jason@redhat.com>
* c.opt.urls: Regenerate.
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 1cd828c..7fe6b40 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,10 @@
+2024-11-13 Martin Uecker <uecker@tugraz.at>
+
+ PR c/117059
+ * c-typeck.cc (parse_build_binary_op): Add warning.
+ (build_conditional_expr): Add warning.
+ (convert_for_assignment): Add warning.
+
2024-11-11 Jakub Jelinek <jakub@redhat.com>
* c-decl.cc (names_builtin_p): Change return type from
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 58cd457..8662134 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,13 @@
+2024-11-14 Jason Merrill <jason@redhat.com>
+
+ * name-lookup.cc (do_namespace_alias): set_originating_module after
+ pushdecl.
+
+2024-11-14 Jason Merrill <jason@redhat.com>
+
+ * module.cc (module_state_config::get_dialect): Expect coroutines in
+ C++20.
+
2024-11-11 Jason Merrill <jason@redhat.com>
* Make-lang.in: Also collect tags from libcody and c++tools.
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 326f071..6a484a7 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,10 @@
+2024-11-13 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/105054
+ * resolve.cc (get_temp_from_expr): If the pointer function has
+ a deferred character length, generate a new deferred charlen
+ for the temporary.
+
2024-11-11 Paul Thomas <pault@gcc.gnu.org>
PR fortran/109345
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index fa5aead8..09e8f63 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,431 @@
+2024-11-14 Jason Merrill <jason@redhat.com>
+
+ * g++.dg/modules/namespace-7_a.C: New test.
+ * g++.dg/modules/namespace-7_b.C: New test.
+
+2024-11-14 Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * gcc.target/aarch64/gcs-nonlocal-3.c: New test.
+ * gcc.target/aarch64/sme/nonlocal_goto_4.c: Update.
+ * gcc.target/aarch64/sme/nonlocal_goto_5.c: Update.
+ * gcc.target/aarch64/sme/nonlocal_goto_6.c: Update.
+
+2024-11-14 Matthieu Longo <matthieu.longo@arm.com>
+
+ * g++.target/aarch64/return_address_sign_ab_exception.C: Update.
+ * gcc.target/aarch64/eh_return.c: Update.
+
+2024-11-14 Richard Ball <richard.ball@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * gcc.target/aarch64/indirect_return-1.c: New test.
+ * gcc.target/aarch64/indirect_return-2.c: New test.
+ * gcc.target/aarch64/indirect_return-3.c: New test.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * gcc.target/aarch64/pragma_cpp_predefs_4.c: Add gcs specific
+ tests.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * gcc.target/aarch64/pragma_cpp_predefs_1.c: GCS test.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * gcc.target/aarch64/gcs-nonlocal-1.c: New test.
+ * gcc.target/aarch64/gcs-nonlocal-1-track-speculation.c: New test.
+ * gcc.target/aarch64/gcs-nonlocal-2.c: New test.
+ * gcc.target/aarch64/gcs-nonlocal-2-track-speculation.c: New test.
+ * gcc.target/aarch64/gcs-nonlocal-1.h: New header file.
+ * gcc.target/aarch64/gcs-nonlocal-2.h: New header file.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+
+ * gcc.target/aarch64/acle/gcs-1.c: New test.
+ * gcc.target/aarch64/gcspopm-1.c: New test.
+ * gcc.target/aarch64/gcspr-1.c: New test.
+ * gcc.target/aarch64/gcsss-1.c: New test.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+ Yury Khrustalev <yury.khrustalev@arm.com>
+ Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/acle/chkfeat-1.c: New test.
+ * gcc.target/aarch64/chkfeat-1.c: New test.
+ * gcc.target/aarch64/chkfeat-2.c: New test.
+
+2024-11-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * gcc.target/aarch64/pragma_cpp_predefs_4.c: Add branch-protection
+ tests.
+
+2024-11-14 Jan Hubicka <hubicka@ucw.cz>
+
+ * g++.dg/tree-ssa/dce-1.C: New test.
+
+2024-11-14 Jan Hubicka <hubicka@ucw.cz>
+
+ * g++.dg/cdce3.C: Disable allocation dce.
+ * g++.dg/tree-ssa/pr19476-1.C: Likewise.
+ * g++.dg/tree-ssa/pr19476-2.C: Likewise.
+ * g++.dg/tree-ssa/pr19476-3.C: Likewise.
+ * g++.dg/tree-ssa/pr19476-4.C: Likewise.
+ * gcc.dg/analyzer/pr101837.c: Disable malloc dce.
+ * gcc.dg/tree-ssa/pr19831-3.c: Update.
+ * gfortran.dg/pr68078.f90: Disable malloc DCE.
+
+2024-11-14 Martin Jambor <mjambor@suse.cz>
+
+ * gcc.dg/ipa/ipcp-agg-1.c: Add a scan dump for a constant value in
+ the latice dump.
+
+2024-11-14 Jan Hubicka <hubicka@ucw.cz>
+
+ PR tree-optimization/110819
+ PR tree-optimization/116868
+ PR tree-optimization/58483
+ * g++.dg/tree-ssa/pr96945.C: cleanup
+ * g++.dg/tree-ssa/pr110819.C: New test.
+ * g++.dg/tree-ssa/pr116868.C: New test.
+ * g++.dg/tree-ssa/pr58483.C: New test.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117567
+ * gcc.dg/torture/pr117567.c: New testcase.
+
+2024-11-14 Eikansh Gupta <quic_eikagupt@quicinc.com>
+
+ PR tree-optimization/109906
+ * gcc.dg/tree-ssa/pr109906.c: New test.
+
+2024-11-14 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117556
+ PR tree-optimization/117553
+ * gcc.dg/vect/vect-live-slp-3.c: Expect us to SLP even for
+ VLA vectors (in single-lane mode).
+
+2024-11-14 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/sat_s_add-2.c: Move to...
+ * gcc.target/riscv/sat_s_add-1-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-3.c: Move to...
+ * gcc.target/riscv/sat_s_add-1-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-4.c: Move to...
+ * gcc.target/riscv/sat_s_add-1-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-1.c: Move to...
+ * gcc.target/riscv/sat_s_add-1-i8.c: ...here.
+ * gcc.target/riscv/sat_s_add-6.c: Move to...
+ * gcc.target/riscv/sat_s_add-2-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-7.c: Move to...
+ * gcc.target/riscv/sat_s_add-2-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-8.c: Move to...
+ * gcc.target/riscv/sat_s_add-2-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-5.c: Move to...
+ * gcc.target/riscv/sat_s_add-2-i8.c: ...here.
+ * gcc.target/riscv/sat_s_add-10.c: Move to...
+ * gcc.target/riscv/sat_s_add-3-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-11.c: Move to...
+ * gcc.target/riscv/sat_s_add-3-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-12.c: Move to...
+ * gcc.target/riscv/sat_s_add-3-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-9.c: Move to...
+ * gcc.target/riscv/sat_s_add-3-i8.c: ...here.
+ * gcc.target/riscv/sat_s_add-14.c: Move to...
+ * gcc.target/riscv/sat_s_add-4-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-15.c: Move to...
+ * gcc.target/riscv/sat_s_add-4-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-16.c: Move to...
+ * gcc.target/riscv/sat_s_add-4-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-13.c: Move to...
+ * gcc.target/riscv/sat_s_add-4-i8.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-2.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-1-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-3.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-1-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-4.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-1-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-1.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-1-i8.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-6.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-2-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-7.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-2-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-8.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-2-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-5.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-2-i8.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-10.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-3-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-11.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-3-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-12.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-3-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-9.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-3-i8.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-14.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-4-i16.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-15.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-4-i32.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-16.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-4-i64.c: ...here.
+ * gcc.target/riscv/sat_s_add-run-13.c: Move to...
+ * gcc.target/riscv/sat_s_add-run-4-i8.c: ...here.
+ * gcc.target/riscv/sat_u_add-2.c: Move to...
+ * gcc.target/riscv/sat_u_add-1-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-3.c: Move to...
+ * gcc.target/riscv/sat_u_add-1-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-4.c: Move to...
+ * gcc.target/riscv/sat_u_add-1-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-1.c: Move to...
+ * gcc.target/riscv/sat_u_add-1-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-6.c: Move to...
+ * gcc.target/riscv/sat_u_add-2-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-7.c: Move to...
+ * gcc.target/riscv/sat_u_add-2-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-8.c: Move to...
+ * gcc.target/riscv/sat_u_add-2-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-5.c: Move to...
+ * gcc.target/riscv/sat_u_add-2-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-10.c: Move to...
+ * gcc.target/riscv/sat_u_add-3-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-11.c: Move to...
+ * gcc.target/riscv/sat_u_add-3-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-12.c: Move to...
+ * gcc.target/riscv/sat_u_add-3-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-9.c: Move to...
+ * gcc.target/riscv/sat_u_add-3-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-14.c: Move to...
+ * gcc.target/riscv/sat_u_add-4-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-15.c: Move to...
+ * gcc.target/riscv/sat_u_add-4-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-16.c: Move to...
+ * gcc.target/riscv/sat_u_add-4-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-13.c: Move to...
+ * gcc.target/riscv/sat_u_add-4-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-18.c: Move to...
+ * gcc.target/riscv/sat_u_add-5-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-19.c: Move to...
+ * gcc.target/riscv/sat_u_add-5-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-20.c: Move to...
+ * gcc.target/riscv/sat_u_add-5-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-17.c: Move to...
+ * gcc.target/riscv/sat_u_add-5-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-22.c: Move to...
+ * gcc.target/riscv/sat_u_add-6-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-23.c: Move to...
+ * gcc.target/riscv/sat_u_add-6-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-24.c: Move to...
+ * gcc.target/riscv/sat_u_add-6-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-21.c: Move to...
+ * gcc.target/riscv/sat_u_add-6-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-2.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-1-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-3.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-1-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-4.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-1-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-1.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-1-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-6.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-2-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-7.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-2-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-8.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-2-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-5.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-2-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-10.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-3-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-11.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-3-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-12.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-3-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-9.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-3-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-14.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-4-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-15.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-4-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-16.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-4-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-13.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-4-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-18.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-5-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-19.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-5-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-20.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-5-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-17.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-5-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-22.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-6-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-23.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-6-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-24.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-6-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add-run-21.c: Move to...
+ * gcc.target/riscv/sat_u_add-run-6-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-2.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-1-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-3.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-1-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-4.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-1-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-1.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-1-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-6.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-2-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-7.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-2-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-8.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-2-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-5.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-2-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-10.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-3-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-11.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-3-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-12.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-3-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-9.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-3-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-14.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-4-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-15.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-4-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-16.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-4-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-13.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-4-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-2.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-1-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-3.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-1-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-4.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-1-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-1.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-1-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-6.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-2-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-7.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-2-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-8.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-2-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-5.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-2-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-10.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-3-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-11.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-3-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-12.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-3-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-9.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-3-u8.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-14.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-4-u16.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-15.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-4-u32.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-16.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-4-u64.c: ...here.
+ * gcc.target/riscv/sat_u_add_imm-run-13.c: Move to...
+ * gcc.target/riscv/sat_u_add_imm-run-4-u8.c: ...here.
+
+2024-11-14 Hongyu Wang <hongyu.wang@intel.com>
+
+ PR target/117495
+ * gcc.target/i386/pr117495.c: New test.
+
+2024-11-13 Jin Ma <jinma@linux.alibaba.com>
+
+ PR target/116591
+ * gcc.target/riscv/rvv/xtheadvector/pr116591.c: New test.
+
+2024-11-13 Filip Kastl <fkastl@suse.cz>
+
+ PR target/56504
+ * gcc.target/i386/vectorize-aocl1.c: New test.
+
+2024-11-13 Soumya AR <soumyaa@nvidia.com>
+
+ PR target/57492
+ * gcc.dg/tree-ssa/ldexp.c: New test.
+ * gcc.dg/tree-ssa/pow-to-ldexp.c: New test.
+
+2024-11-13 Yangyu Chen <cyy@cyyself.name>
+
+ * g++.target/riscv/mv-symbols1.C: New test.
+ * g++.target/riscv/mv-symbols2.C: New test.
+ * g++.target/riscv/mv-symbols3.C: New test.
+ * g++.target/riscv/mv-symbols4.C: New test.
+ * g++.target/riscv/mv-symbols5.C: New test.
+ * g++.target/riscv/mvc-symbols1.C: New test.
+ * g++.target/riscv/mvc-symbols2.C: New test.
+ * g++.target/riscv/mvc-symbols3.C: New test.
+ * g++.target/riscv/mvc-symbols4.C: New test.
+
+2024-11-13 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/105054
+ * gfortran.dg/ptr_func_assign_6.f08: New test.
+
+2024-11-13 Martin Uecker <uecker@tugraz.at>
+
+ PR c/117059
+ * gcc.dg/Wzero-as-null-pointer-constant.c: New test.
+
+2024-11-13 Jakub Jelinek <jakub@redhat.com>
+
+ * gcc.dg/dfp/c11-constants-3.c: New test.
+ * gcc.dg/dfp/c11-constants-4.c: New test.
+ * gcc.dg/dfp/c23-constants-3.c: New test.
+ * gcc.dg/dfp/c23-constants-4.c: New test.
+
+2024-11-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/117029
+ * gcc.dg/cpp/pr7263-3.c: Adjust expected diagnostic wording.
+ * gcc.dg/c23-imaginary-constants-1.c: New test.
+ * gcc.dg/c23-imaginary-constants-2.c: New test.
+ * gcc.dg/c23-imaginary-constants-3.c: New test.
+ * gcc.dg/c23-imaginary-constants-4.c: New test.
+ * gcc.dg/c23-imaginary-constants-5.c: New test.
+ * gcc.dg/c23-imaginary-constants-6.c: New test.
+ * gcc.dg/c23-imaginary-constants-7.c: New test.
+ * gcc.dg/c23-imaginary-constants-8.c: New test.
+ * gcc.dg/c23-imaginary-constants-9.c: New test.
+ * gcc.dg/c23-imaginary-constants-10.c: New test.
+ * gcc.dg/c2y-imaginary-constants-1.c: New test.
+ * gcc.dg/c2y-imaginary-constants-2.c: New test.
+ * gcc.dg/c2y-imaginary-constants-3.c: New test.
+ * gcc.dg/c2y-imaginary-constants-4.c: New test.
+ * gcc.dg/c2y-imaginary-constants-5.c: New test.
+ * gcc.dg/c2y-imaginary-constants-6.c: New test.
+ * gcc.dg/c2y-imaginary-constants-7.c: New test.
+ * gcc.dg/c2y-imaginary-constants-8.c: New test.
+ * gcc.dg/c2y-imaginary-constants-9.c: New test.
+ * gcc.dg/c2y-imaginary-constants-10.c: New test.
+ * gcc.dg/c2y-imaginary-constants-11.c: New test.
+ * gcc.dg/c2y-imaginary-constants-12.c: New test.
+
+2024-11-13 Soumya AR <soumyaa@nvidia.com>
+
+ * gcc.target/aarch64/sve/fscale.c: New test.
+
+2024-11-13 xuli <xuli1@eswincomputing.com>
+
+ PR target/117483
+ * gcc.target/riscv/pr117483.c: New test.
+
+2024-11-13 Hu, Lin1 <lin1.hu@intel.com>
+
+ PR target/117418
+ * gcc.target/i386/pr117418-1.c: New test.
+
2024-11-13 Jeff Law <jlaw@ventanamicro.com>
Revert: