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-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/pr108430.c21
-rw-r--r--gcc/tree-vect-stmts.cc3
2 files changed, 22 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr108430.c b/gcc/testsuite/gcc.target/aarch64/sve/pr108430.c
new file mode 100644
index 0000000..e7ce0f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr108430.c
@@ -0,0 +1,21 @@
+/* { dg-do run { target aarch64_sve512_hw } } */
+/* { dg-options "-O3 -msve-vector-bits=512" } */
+
+long d = 1;
+static int i = 37;
+static unsigned long a[22];
+static unsigned short c[22];
+static unsigned g[80];
+static unsigned short *h = c;
+static unsigned long *j = a;
+int main() {
+ for (long m = 0; m < 8; ++m)
+ d = 1;
+ for (unsigned char p = 0; p < 17; p += 2)
+ {
+ long t = h[p] ? i : j[p];
+ g[p] = t;
+ }
+ if (g[0])
+ __builtin_abort ();
+}
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 1cc3e00..e6e02fd 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -10588,11 +10588,10 @@ vectorizable_condition (vec_info *vinfo,
cond.code = orig_code;
if (loop_vinfo->scalar_cond_masked_set.contains (cond))
{
- bitop1 = orig_code;
- bitop2 = BIT_NOT_EXPR;
masks = &LOOP_VINFO_MASKS (loop_vinfo);
cond_code = cond.code;
swap_cond_operands = true;
+ must_invert_cmp_result = true;
}
}
}