diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 15 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 40 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 19 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr89386-1.c | 16 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr89386.c | 16 |
5 files changed, 97 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e91cba1..d368dc6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-09-12 Uroš Bizjak <ubizjak@gmail.com> + + PR tree-optimization/89386 + * config/i386/sse.md (smulhrs<mode>3): New expander. + (smulhrsv4hi3): Ditto. + 2019-09-12 Richard Biener <rguenther@suse.de> PR tree-optimization/91750 @@ -27,15 +33,6 @@ * tree-vect-patterns.c (vect_recog_mulhs_pattern): New pattern function. (vect_vect_recog_func_ptrs): Add it. - * testsuite/gcc.target/aarch64/sve2/mulhrs_1.c: New test. - * testsuite/gcc.dg/vect/vect-mulhrs-1.c: As above. - * testsuite/gcc.dg/vect/vect-mulhrs-2.c: As above. - * testsuite/gcc.dg/vect/vect-mulhrs-3.c: As above. - * testsuite/gcc.dg/vect/vect-mulhrs-4.c: As above. - * doc/sourcebuild.texi (vect_mulhrs_hi): Document new target selector. - * testsuite/lib/target-supports.exp - (check_effective_target_vect_mulhrs_hi): Return true for AArch64 - with SVE2. 2019-09-11 Michael Meissner <meissner@linux.ibm.com> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 621b4db..c7f539f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -16475,6 +16475,26 @@ ix86_fixup_binary_operands_no_copy (MULT, <MODE>mode, operands); }) +(define_expand "smulhrs<mode>3" + [(set (match_operand:VI2_AVX2 0 "register_operand") + (truncate:VI2_AVX2 + (lshiftrt:<ssedoublemode> + (plus:<ssedoublemode> + (lshiftrt:<ssedoublemode> + (mult:<ssedoublemode> + (sign_extend:<ssedoublemode> + (match_operand:VI2_AVX2 1 "nonimmediate_operand")) + (sign_extend:<ssedoublemode> + (match_operand:VI2_AVX2 2 "nonimmediate_operand"))) + (const_int 14)) + (match_dup 3)) + (const_int 1))))] + "TARGET_SSSE3" +{ + operands[3] = CONST1_RTX(<MODE>mode); + ix86_fixup_binary_operands_no_copy (MULT, <MODE>mode, operands); +}) + (define_insn "*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>" [(set (match_operand:VI2_AVX2 0 "register_operand" "=x,x,v") (truncate:VI2_AVX2 @@ -16502,6 +16522,26 @@ (set_attr "prefix" "orig,maybe_evex,evex") (set_attr "mode" "<sseinsnmode>")]) +(define_expand "smulhrsv4hi3" + [(set (match_operand:V4HI 0 "register_operand") + (truncate:V4HI + (lshiftrt:V4SI + (plus:V4SI + (lshiftrt:V4SI + (mult:V4SI + (sign_extend:V4SI + (match_operand:V4HI 1 "register_operand")) + (sign_extend:V4SI + (match_operand:V4HI 2 "register_operand"))) + (const_int 14)) + (match_dup 3)) + (const_int 1))))] + "TARGET_MMX_WITH_SSE && TARGET_SSSE3" +{ + operands[3] = CONST1_RTX(V4HImode); + ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands); +}) + (define_expand "ssse3_pmulhrswv4hi3" [(set (match_operand:V4HI 0 "register_operand") (truncate:V4HI diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8d82d65..cd80562 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,8 +1,27 @@ +2019-09-12 Uroš Bizjak <ubizjak@gmail.com> + + PR tree-optimization/89386 + * gcc.target/i386/pr89386.c: New test. + * gcc.target/i386/pr89386-1.c: Ditto. + 2019-09-12 Richard Biener <rguenther@suse.de> PR tree-optimization/91750 * gcc.dg/vect/pr91750.c: New testcase. +2019-09-12 Yuliang Wang <yuliang.wang@arm.com> + + PR tree-optimization/89386 + * testsuite/gcc.target/aarch64/sve2/mulhrs_1.c: New test. + * testsuite/gcc.dg/vect/vect-mulhrs-1.c: As above. + * testsuite/gcc.dg/vect/vect-mulhrs-2.c: As above. + * testsuite/gcc.dg/vect/vect-mulhrs-3.c: As above. + * testsuite/gcc.dg/vect/vect-mulhrs-4.c: As above. + * doc/sourcebuild.texi (vect_mulhrs_hi): Document new target selector. + * testsuite/lib/target-supports.exp + (check_effective_target_vect_mulhrs_hi): Return true for AArch64 + with SVE2. + 2019-09-11 Sandra Loosemore <sandra@codesourcery.com> PR testsuite/83889 diff --git a/gcc/testsuite/gcc.target/i386/pr89386-1.c b/gcc/testsuite/gcc.target/i386/pr89386-1.c new file mode 100644 index 0000000..a2d708b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr89386-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mssse3 -O2 -ftree-vectorize" } */ + +#define N 4 + +short a[N], b[N], c[N]; + +int foo (void) +{ + int i; + + for (i = 0; i < N; i++) + a[i] = ((((int) b[i] * (int) c[i]) >> 14) + 1) >> 1; +} + +/* { dg-final { scan-assembler "pmulhrsw" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr89386.c b/gcc/testsuite/gcc.target/i386/pr89386.c new file mode 100644 index 0000000..b308787 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr89386.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mssse3 -O2 -ftree-vectorize" } */ + +#define N 1024 + +short a[N], b[N], c[N]; + +int foo (void) +{ + int i; + + for (i = 0; i < N; i++) + a[i] = ((((int) b[i] * (int) c[i]) >> 14) + 1) >> 1; +} + +/* { dg-final { scan-assembler "pmulhrsw" } } */ |