diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/tree-ssa/pr89487.c | 13 | ||||
| -rw-r--r-- | gcc/tree-loop-distribution.c | 11 | ||||
| -rw-r--r-- | gcc/tree-ssa-loop-ivopts.c | 4 |
5 files changed, 41 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e9b681f..024e018a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2019-03-04 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/89487 + * tree-loop-distribution.c (has_nonaddressable_dataref_p): New. + (create_rdg_vertices): Compute has_nonaddressable_dataref_p. + (distribute_loop): Don't do runtime alias check if there is non- + addressable data reference. + * tree-ssa-loop-ivopts.c (may_be_nonaddressable_p): Check if VAR_DECL + is a register variable. + 2019-03-02 Jakub Jelinek <jakub@redhat.com> PR target/89506 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 4e8fd02..0b089b9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-03-04 Bin Cheng <bin.cheng@linux.alibaba.com> + + PR tree-optimization/89487 + * gcc/testsuite/gcc.dg/tree-ssa/pr89487.c: New test. + 2019-03-03 Harald Anlauf <anlauf@gmx.de> PR fortran/77583 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr89487.c b/gcc/testsuite/gcc.dg/tree-ssa/pr89487.c new file mode 100644 index 0000000..a024196 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr89487.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-loop-distribution" } */ + +void +caml_interprete (void) +{ + register int *pc asm("%r15"); + register int *sp asm("%r14"); + int i; + + for (i = 0; i < 3; ++i) + *--sp = pc[i]; +} diff --git a/gcc/tree-loop-distribution.c b/gcc/tree-loop-distribution.c index 066356f..81283d1 100644 --- a/gcc/tree-loop-distribution.c +++ b/gcc/tree-loop-distribution.c @@ -160,6 +160,9 @@ static vec<loop_p> loop_nest; /* Vector of data references in the loop to be distributed. */ static vec<data_reference_p> datarefs_vec; +/* If there is nonaddressable data reference in above vector. */ +static bool has_nonaddressable_dataref_p; + /* Store index of data reference in aux field. */ #define DR_INDEX(dr) ((uintptr_t) (dr)->aux) @@ -467,6 +470,7 @@ create_rdg_vertices (struct graph *rdg, vec<gimple *> stmts, loop_p loop) else RDGV_HAS_MEM_WRITE (v) = true; RDGV_DATAREFS (v).safe_push (dr); + has_nonaddressable_dataref_p |= may_be_nonaddressable_p (dr->ref); } } return true; @@ -2757,6 +2761,7 @@ distribute_loop (struct loop *loop, vec<gimple *> stmts, } datarefs_vec.create (20); + has_nonaddressable_dataref_p = false; rdg = build_rdg (loop, cd); if (!rdg) { @@ -2885,8 +2890,10 @@ distribute_loop (struct loop *loop, vec<gimple *> stmts, if (partitions.length () > 1) { /* Don't support loop nest distribution under runtime alias check - since it's not likely to enable many vectorization opportunities. */ - if (loop->inner) + since it's not likely to enable many vectorization opportunities. + Also if loop has any data reference which may be not addressable + since alias check needs to take, compare address of the object. */ + if (loop->inner || has_nonaddressable_dataref_p) merge_dep_scc_partitions (rdg, &partitions, false); else { diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c index a4cf64e..a44b4cb 100644 --- a/gcc/tree-ssa-loop-ivopts.c +++ b/gcc/tree-ssa-loop-ivopts.c @@ -2247,6 +2247,10 @@ may_be_nonaddressable_p (tree expr) { switch (TREE_CODE (expr)) { + case VAR_DECL: + /* Check if it's a register variable. */ + return DECL_HARD_REGISTER (expr); + case TARGET_MEM_REF: /* TARGET_MEM_REFs are translated directly to valid MEMs on the target, thus they are always addressable. */ |