diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.c-torture/compile/20040109-1.c | 25 |
2 files changed, 30 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dd32bd9..6b905bc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2004-01-09 Kazu Hirata <kazu@cs.umass.edu> + + PR target/13380. + * gcc.c-torture/compile/20040109-1.c: New. + 2004-01-08 Stuart Hastings <stuart@apple.com> * testsuite/gcc.dg/20020523-2.c (bail_if_no_sse): Moved cpu-ID code... diff --git a/gcc/testsuite/gcc.c-torture/compile/20040109-1.c b/gcc/testsuite/gcc.c-torture/compile/20040109-1.c new file mode 100644 index 0000000..028bd17 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/20040109-1.c @@ -0,0 +1,25 @@ +/* PR target/13380. + On m32r, the condition code register, (reg:SI 17), was replaced with + a pseudo reg, which would cause an unrecognized insn. */ + +void +foo (unsigned int a, unsigned int b) +{ + if (a > b) + { + while (a) + { + switch (b) + { + default: + a = 0; + case 2: + a = 0; + case 1: + a = 0; + case 0: + ; + } + } + } +} |