diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 9 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 26 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr89229-6a.c | 16 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr89229-6b.c | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr89229-6c.c | 6 |
7 files changed, 55 insertions, 24 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index af96a9b..6718f71 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2020-03-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89229 + * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and + MODE_SF. + * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov + for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL + and ext_sse_reg_operand check. + 2020-03-15 Lewis Hyatt <lhyatt@gmail.com> * common.opt: Avoid redundancy in the help text. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 924f955..d1910b4 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -5127,12 +5127,21 @@ ix86_output_ssemov (rtx_insn *insn, rtx *operands) else return "%vmovq\t{%1, %0|%0, %1}"; + case MODE_SI: + return "%vmovd\t{%1, %0|%0, %1}"; + case MODE_DF: if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1])) return "vmovsd\t{%d1, %0|%0, %d1}"; else return "%vmovsd\t{%1, %0|%0, %1}"; + case MODE_SF: + if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1])) + return "vmovss\t{%d1, %0|%0, %d1}"; + else + return "%vmovss\t{%1, %0|%0, %1}"; + case MODE_V1DF: gcc_assert (!TARGET_AVX); return "movlpd\t{%1, %0|%0, %1}"; diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6fa5db0..af39f90 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3490,24 +3490,7 @@ return standard_sse_constant_opcode (insn, operands); case TYPE_SSEMOV: - switch (get_attr_mode (insn)) - { - case MODE_SF: - if (TARGET_AVX && REG_P (operands[0]) && REG_P (operands[1])) - return "vmovss\t{%d1, %0|%0, %d1}"; - return "%vmovss\t{%1, %0|%0, %1}"; - - case MODE_V16SF: - return "vmovaps\t{%g1, %g0|%g0, %g1}"; - case MODE_V4SF: - return "%vmovaps\t{%1, %0|%0, %1}"; - - case MODE_SI: - return "%vmovd\t{%1, %0|%0, %1}"; - - default: - gcc_unreachable (); - } + return ix86_output_ssemov (insn, operands); case TYPE_MMXMOV: switch (get_attr_mode (insn)) @@ -3579,12 +3562,7 @@ better to maintain the whole registers in single format to avoid problems on using packed logical operations. */ (eq_attr "alternative" "6") - (cond [(and (ior (not (match_test "TARGET_PREFER_AVX256")) - (not (match_test "TARGET_AVX512VL"))) - (ior (match_operand 0 "ext_sse_reg_operand") - (match_operand 1 "ext_sse_reg_operand"))) - (const_string "V16SF") - (ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY") + (cond [(ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY") (match_test "TARGET_SSE_SPLIT_REGS")) (const_string "V4SF") ] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 02205f1..f79f1c7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2020-03-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/89229 + * gcc.target/i386/pr89229-6a.c: New test. + * gcc.target/i386/pr89229-6b.c: Likewise. + * gcc.target/i386/pr89229-6c.c: Likewise. + 2020-03-15 Lewis Hyatt <lhyatt@gmail.com> * gcc.misc-tests/help.exp: Adapt to new output for diff --git a/gcc/testsuite/gcc.target/i386/pr89229-6a.c b/gcc/testsuite/gcc.target/i386/pr89229-6a.c new file mode 100644 index 0000000..856115b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr89229-6a.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -march=skylake-avx512" } */ + +extern float d; + +void +foo1 (float x) +{ + register float xmm16 __asm ("xmm16") = x; + asm volatile ("" : "+v" (xmm16)); + register float xmm17 __asm ("xmm17") = xmm16; + asm volatile ("" : "+v" (xmm17)); + d = xmm17; +} + +/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr89229-6b.c b/gcc/testsuite/gcc.target/i386/pr89229-6b.c new file mode 100644 index 0000000..a74f716 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr89229-6b.c @@ -0,0 +1,6 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -march=skylake-avx512 -mno-avx512vl" } */ + +#include "pr89229-6a.c" + +/* { dg-final { scan-assembler-times "vmovaps\[^\n\r]*zmm1\[67]\[^\n\r]*zmm1\[67]" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr89229-6c.c b/gcc/testsuite/gcc.target/i386/pr89229-6c.c new file mode 100644 index 0000000..7a4d254 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr89229-6c.c @@ -0,0 +1,6 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -march=skylake-avx512 -mprefer-vector-width=512" } */ + +#include "pr89229-6a.c" + +/* { dg-final { scan-assembler-not "%zmm\[0-9\]+" } } */ |