diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 5 |
2 files changed, 8 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 34721f7..51a42761 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-03-26 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.c (aarch64_classify_address): Support + PC-relative load in SI modes and above only. + 2013-03-26 Xinyu Qi <xyqi@marvell.com> * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 343586e..d51b8d0 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -2926,9 +2926,10 @@ aarch64_classify_address (struct aarch64_address_info *info, case CONST: case SYMBOL_REF: case LABEL_REF: - /* load literal: pc-relative constant pool entry. */ + /* load literal: pc-relative constant pool entry. Only supported + for SI mode or larger. */ info->type = ADDRESS_SYMBOLIC; - if (outer_code != PARALLEL) + if (outer_code != PARALLEL && GET_MODE_SIZE (mode) >= 4) { rtx sym, addend; |