diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c | 12 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c | 12 |
5 files changed, 32 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f7bf3b2..464982e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-06-05 Hongtao Liu <hongtao.liu@intel.com> + + * config/i386/sse.md (define_mode_suffix vecmemsuffix): New. + (define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Enable + memory operand for it. + (define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>"): Ditto. + 2019-06-05 Martin Sebor <msebor@redhat.com> * config/i386/i386-features.c (ix86_get_function_versions_dispatcher): diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index d21f4fc..0997f43 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -595,6 +595,10 @@ (define_mode_attr ssequarterinsnmode [(V16SF "V4SF") (V8DF "V2DF") (V16SI "TI") (V8DI "TI")]) +(define_mode_attr vecmemsuffix + [(V16SF "{z}") (V8SF "{y}") (V4SF "{x}") + (V8DF "{z}") (V4DF "{y}") (V2DF "{x}")]) + (define_mode_attr ssedoublemodelower [(V16QI "v16hi") (V32QI "v32hi") (V64QI "v64hi") (V8HI "v8si") (V16HI "v16si") (V32HI "v32si") @@ -21317,11 +21321,11 @@ (define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>" [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k") (unspec:<avx512fmaskmode> - [(match_operand:VF_AVX512VL 1 "register_operand" "v") + [(match_operand:VF_AVX512VL 1 "vector_operand" "vm") (match_operand:QI 2 "const_0_to_255_operand" "n")] UNSPEC_FPCLASS))] "TARGET_AVX512DQ" - "vfpclass<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"; + "vfpclass<ssemodesuffix><vecmemsuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"; [(set_attr "type" "sse") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -21331,7 +21335,7 @@ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k") (and:<avx512fmaskmode> (unspec:<avx512fmaskmode> - [(match_operand:VF_128 1 "register_operand" "v") + [(match_operand:VF_128 1 "vector_operand" "vm") (match_operand:QI 2 "const_0_to_255_operand" "n")] UNSPEC_FPCLASS) (const_int 1)))] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 171fc8e..4f58a45 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2019-06-05 Hongtao Liu <hongtao.liu@intel.com> + + * gcc.target/i386/avx512dq-vfpclasspd-1.c: Adjust scan assember + for {x,y,z} suffix. + * gcc.target/i386/avx512dq-vfpclassps-1.c: Ditto. + 2019-06-05 Martin Sebor <msebor@redhat.com> * gcc.dg/format/gcc_diag-11.c: Skip until -Wformat-diag has diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c index 02f31bf..932f103 100644 --- a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-1.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512dq -mavx512vl -O2" } */ -/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclasspd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c index df109ea..f826e89 100644 --- a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-1.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-mavx512dq -mavx512vl -O2" } */ -/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfpclassps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> |