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-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.dg/zero_bits_compound-1.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 25f6df6..c62b37c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-09-28 Steve Ellcey <sellcey@cavium.com>
+
+ PR testsuite/87433
+ * gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.
+
2018-09-28 Eric Botcazou <ebotcazou@adacore.com>
* gcc.target/sparc/20160229-1.c: Minor tweak.
diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
index 63b8ac1..e715949 100644
--- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
+++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
@@ -4,7 +4,7 @@
/* Note: This test requires that char, int and long have different sizes and the
target has a way to do 32 -> 64 bit zero extension other than AND. */
-/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* } } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O3 -dP" } */