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-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/tree-ssa-forwprop.c22
2 files changed, 23 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8507c2e..8f5ec70 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
+ PR tree-optimization/92822
+ * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
+ out the don't-care elements of a vector whose significant elements
+ are duplicates, make the don't-care elements duplicates too.
+
+2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
+
PR tree-optimization/93434
* tree-predcom.c (split_data_refs_to_components): Record which
components have had aliasing loads removed. Prevent store-store
diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
index d63e87c..5203891 100644
--- a/gcc/tree-ssa-forwprop.c
+++ b/gcc/tree-ssa-forwprop.c
@@ -2455,16 +2455,26 @@ simplify_vector_constructor (gimple_stmt_iterator *gsi)
it and its source indexes to make the permutation supported.
For now it mimics a blend. */
vec_perm_builder sel (refnelts, refnelts, 1);
+ bool all_same_p = true;
for (i = 0; i < elts.length (); ++i)
- sel.quick_push (elts[i].second + elts[i].first * refnelts);
+ {
+ sel.quick_push (elts[i].second + elts[i].first * refnelts);
+ all_same_p &= known_eq (sel[i], sel[0]);
+ }
/* And fill the tail with "something". It's really don't care,
and ideally we'd allow VEC_PERM to have a smaller destination
- vector. As heuristic try to preserve a uniform orig[0] which
- facilitates later pattern-matching VEC_PERM_EXPR to a
- BIT_INSERT_EXPR. */
+ vector. As a heuristic:
+
+ (a) if what we have so far duplicates a single element, make the
+ tail do the same
+
+ (b) otherwise preserve a uniform orig[0]. This facilitates
+ later pattern-matching of VEC_PERM_EXPR to a BIT_INSERT_EXPR. */
for (; i < refnelts; ++i)
- sel.quick_push ((elts[0].second == 0 && elts[0].first == 0
- ? 0 : refnelts) + i);
+ sel.quick_push (all_same_p
+ ? sel[0]
+ : (elts[0].second == 0 && elts[0].first == 0
+ ? 0 : refnelts) + i);
vec_perm_indices indices (sel, orig[1] ? 2 : 1, refnelts);
if (!can_vec_perm_const_p (TYPE_MODE (perm_type), indices))
return false;