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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/expr.c11
-rw-r--r--gcc/testsuite/ChangeLog7
-rw-r--r--gcc/testsuite/gcc.target/aarch64/pr68674.c22
-rw-r--r--gcc/testsuite/gcc.target/arm/pr68674.c26
-rw-r--r--gcc/testsuite/gcc.target/i386/pr68674.c15
6 files changed, 85 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 16813c7..a20f860 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-22 Christian Bruel <christian.bruel@st.com>
+
+ PR target/68674
+ * expr.c (expand_expr_real_1): Reset DECL_MODE if VECTOR_TYPE_P changed.
+
2016-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/69403
diff --git a/gcc/expr.c b/gcc/expr.c
index 0ce5936..3b7f135 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -9597,7 +9597,16 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
decl_rtl = DECL_RTL (exp);
expand_decl_rtl:
gcc_assert (decl_rtl);
- decl_rtl = copy_rtx (decl_rtl);
+
+ /* DECL_MODE might change when TYPE_MODE depends on attribute target
+ settings for VECTOR_TYPE_P that might switch for the function. */
+ if (currently_expanding_to_rtl
+ && code == VAR_DECL && MEM_P (decl_rtl)
+ && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode)
+ decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0);
+ else
+ decl_rtl = copy_rtx (decl_rtl);
+
/* Record writes to register variables. */
if (modifier == EXPAND_WRITE
&& REG_P (decl_rtl)
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 64687d7..1cd3aab 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2016-01-21 Christian Bruel <christian.bruel@st.com>
+
+ PR target/68674
+ * gcc.target/i386/pr68674.c
+ * gcc.target/aarch64/pr68674.c
+ * gcc.target/arm/pr68674.c
+
2016-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/69403
diff --git a/gcc/testsuite/gcc.target/aarch64/pr68674.c b/gcc/testsuite/gcc.target/aarch64/pr68674.c
new file mode 100644
index 0000000..c8acce3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr68674.c
@@ -0,0 +1,22 @@
+/* PR target/68674 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=generic+nosimd" } */
+
+#include <arm_neon.h>
+
+int8x8_t a;
+extern int8x8_t b;
+int16x8_t e;
+
+void __attribute__((target("+simd")))
+foo1(void)
+{
+ e = (int16x8_t) vaddl_s8(a, b);
+}
+
+int8x8_t __attribute__((target("+simd")))
+foo2(void)
+{
+ return a;
+}
+
diff --git a/gcc/testsuite/gcc.target/arm/pr68674.c b/gcc/testsuite/gcc.target/arm/pr68674.c
new file mode 100644
index 0000000..a31a88a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr68674.c
@@ -0,0 +1,26 @@
+/* PR target/68674 */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -mfloat-abi=softfp" } */
+
+#pragma GCC target ("fpu=vfp")
+
+#include <arm_neon.h>
+
+int8x8_t a;
+extern int8x8_t b;
+int16x8_t e;
+
+void __attribute__((target("fpu=neon")))
+foo1(void)
+{
+ e = (int16x8_t) vaddl_s8(a, b);
+}
+
+int8x8_t __attribute__((target("fpu=neon")))
+foo2(void)
+{
+ return b;
+}
+
+
diff --git a/gcc/testsuite/gcc.target/i386/pr68674.c b/gcc/testsuite/gcc.target/i386/pr68674.c
new file mode 100644
index 0000000..37c5759
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr68674.c
@@ -0,0 +1,15 @@
+/* PR target/68674 */
+/* { dg-do compile } */
+/* { dg-require-effective-target avx } */
+/* { dg-options "-O2" } */
+
+typedef int v8si __attribute__((vector_size(32)));
+
+v8si a;
+
+ __attribute__((target("avx")))
+v8si
+foo()
+{
+ return a;
+}