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-rw-r--r--gcc/config/aarch64/aarch64.c6
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/pr95361.c11
2 files changed, 16 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 78db0a5..cffb945 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8180,7 +8180,11 @@ aarch64_expand_epilogue (bool for_sibcall)
if (callee_adjust != 0)
aarch64_pop_regs (reg1, reg2, callee_adjust, &cfi_ops);
- if (callee_adjust != 0 || maybe_gt (initial_adjust, 65536))
+ /* If we have no register restore information, the CFA must have been
+ defined in terms of the stack pointer since the end of the prologue. */
+ gcc_assert (cfi_ops || !frame_pointer_needed);
+
+ if (cfi_ops && (callee_adjust != 0 || maybe_gt (initial_adjust, 65536)))
{
/* Emit delayed restores and set the CFA to be SP + initial_adjust. */
insn = get_last_insn ();
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr95361.c b/gcc/testsuite/gcc.target/aarch64/sve/pr95361.c
new file mode 100644
index 0000000..ce70d0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr95361.c
@@ -0,0 +1,11 @@
+/* { dg-options "-O2" } */
+
+__SVInt8_t
+f (__SVInt8_t x, int y)
+{
+ if (y == 1)
+ asm volatile ("" ::: "z8");
+ if (y == 2)
+ asm volatile ("" ::: "z9");
+ return x;
+}