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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/mips/constraints.md4
-rw-r--r--gcc/doc/md.texi4
3 files changed, 9 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 670e941..fb011a1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-09-27 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/mips/constraints.md (d): Fix documentation.
+ * doc/md.texi (Machine Constraints): Update accordingly.
+
2016-09-27 Richard Biener <rguenther@suse.de>
* dwarf2out.c (dwarf2out_init): Move text_section_line_info,
diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md
index 56b363e..4b5619f 100644
--- a/gcc/config/mips/constraints.md
+++ b/gcc/config/mips/constraints.md
@@ -20,8 +20,8 @@
;; Register constraints
(define_register_constraint "d" "TARGET_MIPS16 ? M16_REGS : GR_REGS"
- "An address register. This is equivalent to @code{r} unless
- generating MIPS16 code.")
+ "A general-purpose register. This is equivalent to @code{r} unless
+ generating MIPS16 code, in which case the MIPS16 register set is used.")
(define_register_constraint "t" "T_REG"
"@internal")
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index c1015f0..201f0a5 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -2582,8 +2582,8 @@ A status register (@code{rmsr}, @code{$fcc1} to @code{$fcc7}).
@item MIPS---@file{config/mips/constraints.md}
@table @code
@item d
-An address register. This is equivalent to @code{r} unless
-generating MIPS16 code.
+A general-purpose register. This is equivalent to @code{r} unless
+generating MIPS16 code, in which case the MIPS16 register set is used.
@item f
A floating-point register (if available).