diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/expmed.c | 13 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/pr93235.c | 12 |
2 files changed, 22 insertions, 3 deletions
diff --git a/gcc/expmed.c b/gcc/expmed.c index d30948e..1fb6317 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -629,9 +629,16 @@ store_bit_field_using_insv (const extraction_insn *insv, rtx op0, /* If xop0 is a register, we need it in OP_MODE to make it acceptable to the format of insv. */ if (GET_CODE (xop0) == SUBREG) - /* We can't just change the mode, because this might clobber op0, - and we will need the original value of op0 if insv fails. */ - xop0 = gen_rtx_SUBREG (op_mode, SUBREG_REG (xop0), SUBREG_BYTE (xop0)); + { + /* If such a SUBREG can't be created, give up. */ + if (!validate_subreg (op_mode, GET_MODE (SUBREG_REG (xop0)), + SUBREG_REG (xop0), SUBREG_BYTE (xop0))) + return false; + /* We can't just change the mode, because this might clobber op0, + and we will need the original value of op0 if insv fails. */ + xop0 = gen_rtx_SUBREG (op_mode, SUBREG_REG (xop0), + SUBREG_BYTE (xop0)); + } if (REG_P (xop0) && GET_MODE (xop0) != op_mode) xop0 = gen_lowpart_SUBREG (op_mode, xop0); } diff --git a/gcc/testsuite/gcc.target/aarch64/pr93235.c b/gcc/testsuite/gcc.target/aarch64/pr93235.c new file mode 100644 index 0000000..829ae13 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr93235.c @@ -0,0 +1,12 @@ +/* PR middle-end/93235 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-strict-aliasing" } */ + +struct sfp16 { __fp16 f; }; +struct sfp16 +foo (short x) +{ + struct sfp16 a; + *(short*)&a.f = x; + return a; +} |