diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 21 |
2 files changed, 14 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 95da033..e640c39 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,10 +1,16 @@ +2008-02-05 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (floatunssisf2): Use + ix86_expand_convert_uns_sisf_sse also for TARGET_SSE. + (floatunssi<mode>2): Rename from floatunssisf2 and floatunssidf2. + Macroize expander using MODEF mode iterator. + 2008-02-05 Diego Novillo <dnovillo@google.com> http://gcc.gnu.org/ml/gcc-patches/2008-02/msg00140.html PR 33738 - * tree-vrp.c (vrp_evaluate_conditional): Revert fix for - PR 33738. + * tree-vrp.c (vrp_evaluate_conditional): Revert fix for PR 33738. 2008-02-05 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 4090ead..fce691c 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5303,24 +5303,15 @@ DONE; }) -(define_expand "floatunssisf2" - [(use (match_operand:SF 0 "register_operand" "")) +(define_expand "floatunssi<mode>2" + [(use (match_operand:MODEF 0 "register_operand" "")) (use (match_operand:SI 1 "nonimmediate_operand" ""))] - "!TARGET_64BIT && TARGET_SSE_MATH" + "!TARGET_64BIT && SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH" { - if (TARGET_SSE2) - ix86_expand_convert_uns_sisf_sse (operands[0], operands[1]); - else - x86_emit_floatuns (operands); + ix86_expand_convert_uns_si<mode>_sse (operands[0], operands[1]); DONE; }) -(define_expand "floatunssidf2" - [(use (match_operand:DF 0 "register_operand" "")) - (use (match_operand:SI 1 "nonimmediate_operand" ""))] - "!TARGET_64BIT && TARGET_SSE_MATH && TARGET_SSE2" - "ix86_expand_convert_uns_sidf_sse (operands[0], operands[1]); DONE;") - (define_expand "floatunsdisf2" [(use (match_operand:SF 0 "register_operand" "")) (use (match_operand:DI 1 "nonimmediate_operand" ""))] @@ -5330,8 +5321,8 @@ (define_expand "floatunsdidf2" [(use (match_operand:DF 0 "register_operand" "")) (use (match_operand:DI 1 "nonimmediate_operand" ""))] - "TARGET_SSE_MATH && TARGET_SSE2 - && (TARGET_64BIT || TARGET_KEEPS_VECTOR_ALIGNED_STACK)" + "(TARGET_64BIT || TARGET_KEEPS_VECTOR_ALIGNED_STACK) + && TARGET_SSE2 && TARGET_SSE_MATH" { if (TARGET_64BIT) x86_emit_floatuns (operands); |