diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 9 |
2 files changed, 12 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7eb0748..2cf949b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-08-13 Steve Ellcey <sellcey@mips.com> + + * config/mips/mips.md (prefetch): Use lw instead of ld on + loongson in 32bit mode. + 2013-08-13 Nick Clifton <nickc@redhat.com> * config.gcc: (avr-linux): Allow for tmake_file not being empty. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 397c40a..0cda169 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -6673,8 +6673,13 @@ "ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS" { if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A) - /* Loongson 2[ef] and Loongson 3a use load to $0 to perform prefetching. */ - return "ld\t$0,%a0"; + { + /* Loongson 2[ef] and Loongson 3a use load to $0 for prefetching. */ + if (TARGET_64BIT) + return "ld\t$0,%a0"; + else + return "lw\t$0,%a0"; + } operands[1] = mips_prefetch_cookie (operands[1], operands[2]); return "pref\t%1,%a0"; } |