diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/i386/sse.md | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr104977.c | 13 |
2 files changed, 14 insertions, 1 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index ed98120..21bf3c5 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -6723,7 +6723,7 @@ (match_dup 2) (const_int 3)))] "TARGET_AVX512FP16" - "v<complexopname>sh\t{<round_scalarcz_mask_op4>%2, %1, %0<mask_scalarcz_operand4>|%0<mask_scalarcz_operand4>, %1, %2<round_scalarcz_maskcz_mask_op4>}" + "v<complexopname>sh\t{<round_scalarcz_mask_op4>%2, %1, %0<mask_scalarcz_operand4>|%0<mask_scalarcz_operand4>, %1, %2<round_scalarcz_mask_op4>}" [(set_attr "type" "ssemuladd") (set_attr "mode" "V8HF")]) diff --git a/gcc/testsuite/gcc.target/i386/pr104977.c b/gcc/testsuite/gcc.target/i386/pr104977.c new file mode 100644 index 0000000..9faa4db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104977.c @@ -0,0 +1,13 @@ +/* PR target/104977 */ +/* { dg-do assemble } */ +/* { dg-options "-O2 -mavx512fp16 -masm=intel" } */ +/* { dg-require-effective-target avx512fp16 } */ +/* { dg-require-effective-target masm_intel } */ + +#include<immintrin.h> + +__m128h +foo (__m128h a, __m128h b, __m128h c, __mmask8 m) +{ + return _mm_fcmadd_round_sch (a, b, c, 8); +} |