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-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/i386/i386.md10
2 files changed, 13 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 14c6183..5e826d0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-02-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/89229
+ * config/i386/i386.md (*movoi_internal_avx): Set mode to XI for
+ upper 16 vector registers without TARGET_AVX512VL.
+ (*movti_internal): Likewise.
+
2019-02-08 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/89234
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c149236..3d9141a 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1933,8 +1933,9 @@
(set_attr "type" "sselog1,sselog1,ssemov,ssemov")
(set_attr "prefix" "vex")
(set (attr "mode")
- (cond [(ior (match_operand 0 "ext_sse_reg_operand")
- (match_operand 1 "ext_sse_reg_operand"))
+ (cond [(and (not (match_test "TARGET_AVX512VL"))
+ (ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand")))
(const_string "XI")
(and (eq_attr "alternative" "1")
(match_test "TARGET_AVX512VL"))
@@ -2012,8 +2013,9 @@
(set (attr "mode")
(cond [(eq_attr "alternative" "0,1")
(const_string "DI")
- (ior (match_operand 0 "ext_sse_reg_operand")
- (match_operand 1 "ext_sse_reg_operand"))
+ (and (not (match_test "TARGET_AVX512VL"))
+ (ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand")))
(const_string "XI")
(and (eq_attr "alternative" "3")
(match_test "TARGET_AVX512VL"))