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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/arm/arm.md63
-rw-r--r--gcc/testsuite/ChangeLog7
-rw-r--r--gcc/testsuite/gcc.target/arm/smlaltb-1.c13
-rw-r--r--gcc/testsuite/gcc.target/arm/smlaltt-1.c13
-rw-r--r--gcc/testsuite/gcc.target/arm/smlatb-1.c13
-rw-r--r--gcc/testsuite/gcc.target/arm/smlatt-1.c13
7 files changed, 127 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a1feeb0..7d8ac5c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2011-06-07 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/arm/arm.md (*maddhidi4tb, *maddhidi4tt): New define_insns.
+ (*maddhisi4tb, *maddhisi4tt): New define_insns.
+
2011-06-07 Bernd Schmidt <bernds@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index f5b97f6..4e84826 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1815,6 +1815,36 @@
(set_attr "predicable" "yes")]
)
+;; Note: there is no maddhisi4ibt because this one is canonical form
+(define_insn "*maddhisi4tb"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (plus:SI (mult:SI (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16))
+ (sign_extend:SI
+ (match_operand:HI 2 "s_register_operand" "r")))
+ (match_operand:SI 3 "s_register_operand" "r")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlatb%?\\t%0, %1, %2, %3"
+ [(set_attr "insn" "smlaxy")
+ (set_attr "predicable" "yes")]
+)
+
+(define_insn "*maddhisi4tt"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (plus:SI (mult:SI (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16))
+ (ashiftrt:SI
+ (match_operand:SI 2 "s_register_operand" "r")
+ (const_int 16)))
+ (match_operand:SI 3 "s_register_operand" "r")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlatt%?\\t%0, %1, %2, %3"
+ [(set_attr "insn" "smlaxy")
+ (set_attr "predicable" "yes")]
+)
+
(define_insn "*maddhidi4"
[(set (match_operand:DI 0 "s_register_operand" "=r")
(plus:DI
@@ -1828,6 +1858,39 @@
[(set_attr "insn" "smlalxy")
(set_attr "predicable" "yes")])
+;; Note: there is no maddhidi4ibt because this one is canonical form
+(define_insn "*maddhidi4tb"
+ [(set (match_operand:DI 0 "s_register_operand" "=r")
+ (plus:DI
+ (mult:DI (sign_extend:DI
+ (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16)))
+ (sign_extend:DI
+ (match_operand:HI 2 "s_register_operand" "r")))
+ (match_operand:DI 3 "s_register_operand" "0")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlaltb%?\\t%Q0, %R0, %1, %2"
+ [(set_attr "insn" "smlalxy")
+ (set_attr "predicable" "yes")])
+
+(define_insn "*maddhidi4tt"
+ [(set (match_operand:DI 0 "s_register_operand" "=r")
+ (plus:DI
+ (mult:DI (sign_extend:DI
+ (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16)))
+ (sign_extend:DI
+ (ashiftrt:SI
+ (match_operand:SI 2 "s_register_operand" "r")
+ (const_int 16))))
+ (match_operand:DI 3 "s_register_operand" "0")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlaltt%?\\t%Q0, %R0, %1, %2"
+ [(set_attr "insn" "smlalxy")
+ (set_attr "predicable" "yes")])
+
(define_expand "mulsf3"
[(set (match_operand:SF 0 "s_register_operand" "")
(mult:SF (match_operand:SF 1 "s_register_operand" "")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7686e2a..a83814a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,12 @@
2011-06-07 Andrew Stubbs <ams@codesourcery.com>
+ * gcc.target/arm/smlatb-1.c: New file.
+ * gcc.target/arm/smlatt-1.c: New file.
+ * gcc.target/arm/smlaltb-1.c: New file.
+ * gcc.target/arm/smlaltt-1.c: New file.
+
+2011-06-07 Andrew Stubbs <ams@codesourcery.com>
+
* gcc.target/arm/mla-2.c: New test.
2011-06-07 Jakub Jelinek <jakub@redhat.com>
diff --git a/gcc/testsuite/gcc.target/arm/smlaltb-1.c b/gcc/testsuite/gcc.target/arm/smlaltb-1.c
new file mode 100644
index 0000000..b83fc74
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlaltb-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+long long int
+foo (long long x, int in)
+{
+ short a = in & 0xffff;
+ short b = (in & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlaltb" } } */
diff --git a/gcc/testsuite/gcc.target/arm/smlaltt-1.c b/gcc/testsuite/gcc.target/arm/smlaltt-1.c
new file mode 100644
index 0000000..2604d9b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlaltt-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+long long int
+foo (long long x, int in1, int in2)
+{
+ short a = (in1 & 0xffff0000) >> 16;
+ short b = (in2 & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlaltt" } } */
diff --git a/gcc/testsuite/gcc.target/arm/smlatb-1.c b/gcc/testsuite/gcc.target/arm/smlatb-1.c
new file mode 100644
index 0000000..820dcdd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlatb-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+int
+foo (int x, int in)
+{
+ short a = in & 0xffff;
+ short b = (in & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlatb" } } */
diff --git a/gcc/testsuite/gcc.target/arm/smlatt-1.c b/gcc/testsuite/gcc.target/arm/smlatt-1.c
new file mode 100644
index 0000000..2a60634
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlatt-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+int
+foo (int x, int in1, int in2)
+{
+ short a = (in1 & 0xffff0000) >> 16;
+ short b = (in2 & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlatt" } } */