diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c | 43 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c | 43 |
3 files changed, 94 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b2dacc5..d023de3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,13 @@ 2018-06-01 Carl Love <cel@us.ibm.com> +Commit 260294 on 2018-05-16 by Carl Love was supposed to add the +following files. + + * gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file. + * gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file. + +2018-06-01 Carl Love <cel@us.ibm.com> + * gcc.target/powerpc/altivec-12.c (main): Fix declaration of ucz to make it consistent with the naming convention in the file. * gcc.target/powerpc/altivec-7-be.c: Move BE specific checks diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c new file mode 100644 index 0000000..835b24f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c @@ -0,0 +1,43 @@ +/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power7" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ + + +/* Expected instruction counts for Big Endian */ + +/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvadddp" 1 } } */ +/* { dg-final { scan-assembler-times "xxlnor" 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */ +/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmindp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */ +/* { dg-final { scan-assembler-times "vperm" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */ +/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */ +/* { dg-final { scan-assembler-times "xxland" 13 } } */ +/* { dg-final { scan-assembler-times "xxlxor" 2 } } */ +/* { dg-final { scan-assembler-times "xxsel" 2 } } */ +/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */ +/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */ + +/* Source code for the test in vsx-vector-6.h */ +#include "vsx-vector-6.h" diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c new file mode 100644 index 0000000..3b81df8 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c @@ -0,0 +1,43 @@ +/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power8" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + + +/* Expected instruction counts for Big Endian */ + +/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvadddp" 1 } } */ +/* { dg-final { scan-assembler-times "xxlnor" 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */ +/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmindp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */ +/* { dg-final { scan-assembler-times "vperm" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */ +/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */ +/* { dg-final { scan-assembler-times "xxland" 13 } } */ +/* { dg-final { scan-assembler-times "xxlxor" 2 } } */ +/* { dg-final { scan-assembler-times "xxsel" 2 } } */ +/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */ +/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */ + +/* Source code for the test in vsx-vector-6.h */ +#include "vsx-vector-6.h" |