diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/x86-tune.def | 32 |
2 files changed, 22 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 351b1f0..41d3baf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-10-10 Jan Hubicka <hubicka@ucw.cz> + + * x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI, X86_TUNE_ADJUST_UNROLL, + X86_TUNE_ONE_IF_CONV_INSN): Move to right spot in the file. + 2017-10-10 Richard Sandiford <richard.sandiford@linaro.org> * wide-int.h (wide_int_ref_storage): Make host_dependent_precision @@ -360,6 +365,7 @@ * builtins.def (BUILT_IN_SETJMP): Revert latest change. 2017-10-08 Jan Hubicka <hubicka@ucw.cz> +2017-10-08 Jan Hubicka <hubicka@ucw.cz> * i386.c (ix86_expand_set_or_movmem): Disable 512bit loops for targets that preffer 128bit. diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 63f69b4..9d01761 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -284,6 +284,22 @@ DEF_TUNE (X86_TUNE_USE_BT, "use_bt", m_CORE_ALL | m_BONNELL | m_SILVERMONT | m_KNL | m_KNM | m_INTEL | m_LAKEMONT | m_AMD_MULTIPLE | m_GENERIC) +/* X86_TUNE_AVOID_FALSE_DEP_FOR_BMI: Avoid false dependency + for bit-manipulation instructions. */ +DEF_TUNE (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI, "avoid_false_dep_for_bmi", + m_SANDYBRIDGE | m_HASWELL | m_GENERIC) + +/* X86_TUNE_ADJUST_UNROLL: This enables adjusting the unroll factor based + on hardware capabilities. Bdver3 hardware has a loop buffer which makes + unrolling small loop less important. For, such architectures we adjust + the unroll factor so that the unrolled loop fits the loop buffer. */ +DEF_TUNE (X86_TUNE_ADJUST_UNROLL, "adjust_unroll_factor", m_BDVER3 | m_BDVER4) + +/* X86_TUNE_ONE_IF_CONV_INSNS: Restrict a number of cmov insns in + if-converted sequence to one. */ +DEF_TUNE (X86_TUNE_ONE_IF_CONV_INSN, "one_if_conv_insn", + m_SILVERMONT | m_KNL | m_KNM | m_INTEL | m_CORE_ALL | m_GENERIC) + /*****************************************************************************/ /* 387 instruction selection tuning */ /*****************************************************************************/ @@ -503,11 +519,6 @@ DEF_TUNE (X86_TUNE_NOT_VECTORMODE, "not_vectormode", m_K6) DEF_TUNE (X86_TUNE_AVOID_VECTOR_DECODE, "avoid_vector_decode", m_K8) -/* X86_TUNE_AVOID_FALSE_DEP_FOR_BMI: Avoid false dependency - for bit-manipulation instructions. */ -DEF_TUNE (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI, "avoid_false_dep_for_bmi", - m_SANDYBRIDGE | m_HASWELL | m_GENERIC) - /*****************************************************************************/ /* This never worked well before. */ /*****************************************************************************/ @@ -525,14 +536,3 @@ DEF_TUNE (X86_TUNE_QIMODE_MATH, "qimode_math", ~0U) arithmetic to 32bit via PROMOTE_MODE macro. This code generation scheme is usually used for RISC targets. */ DEF_TUNE (X86_TUNE_PROMOTE_QI_REGS, "promote_qi_regs", 0U) - -/* X86_TUNE_ADJUST_UNROLL: This enables adjusting the unroll factor based - on hardware capabilities. Bdver3 hardware has a loop buffer which makes - unrolling small loop less important. For, such architectures we adjust - the unroll factor so that the unrolled loop fits the loop buffer. */ -DEF_TUNE (X86_TUNE_ADJUST_UNROLL, "adjust_unroll_factor", m_BDVER3 | m_BDVER4) - -/* X86_TUNE_ONE_IF_CONV_INSNS: Restrict a number of cmov insns in - if-converted sequence to one. */ -DEF_TUNE (X86_TUNE_ONE_IF_CONV_INSN, "one_if_conv_insn", - m_SILVERMONT | m_KNL | m_KNM | m_INTEL | m_CORE_ALL | m_GENERIC) |