diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/doc/sourcebuild.texi | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/vect/pr65947-3.c | 9 | ||||
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 8 |
3 files changed, 16 insertions, 4 deletions
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index b625f1e..49316a5 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1527,6 +1527,9 @@ optabs on vectors. Target supports fully-masked (also known as fully-predicated) loops, so that vector loops can handle partial as well as full vectors. +@item vect_masked_load +Target supports vector masked loads. + @item vect_masked_store Target supports vector masked stores. diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-3.c b/gcc/testsuite/gcc.dg/vect/pr65947-3.c index 8a2608c..f1bfad6 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-3.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-3.c @@ -51,9 +51,10 @@ main (void) return 0; } -/* XFAILed because of the fix for PR97307 which sinks the load of a[i], preventing - if-conversion to happen. */ -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail *-*-* } } } */ -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 1 "vect" } } */ +/* Since the fix for PR97307 which sinks the load of a[i], preventing + if-conversion to happen, targets that cannot do masked loads only + vectorize the inline copy. */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { target vect_masked_load } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 1 "vect" { target { ! vect_masked_load } } } } */ /* { dg-final { scan-tree-dump-times "optimizing condition reduction with FOLD_EXTRACT_LAST" 2 "vect" { target vect_fold_extract_last } } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 15f0649..ecf8be3 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -7194,6 +7194,14 @@ proc check_effective_target_vect_load_lanes { } { || [istarget aarch64*-*-*] }}] } +# Return 1 if the target supports vector masked loads. + +proc check_effective_target_vect_masked_load { } { + return [expr { [check_avx_available] + || [check_effective_target_aarch64_sve] + || [istarget amdgcn*-*-*] } ] +} + # Return 1 if the target supports vector masked stores. proc check_effective_target_vect_masked_store { } { |