diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/rtlanal.c | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 68d8be2..1ad3fd0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-09-19 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/87361 + * rtlanal.c (nonzero_bits1): Revert accidental change. + 2018-09-19 Richard Biener <rguenther@suse.de> PR tree-optimization/87349 diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 366df7c..e8b6b9c 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -4758,17 +4758,17 @@ nonzero_bits1 (const_rtx x, scalar_int_mode mode, const_rtx known_x, nonzero &= cached_nonzero_bits (SUBREG_REG (x), mode, known_x, known_mode, known_ret); - /* On many CISC machines, accessing an object in a wider mode + /* On many CISC machines, accessing an object in a wider mode causes the high-order bits to become undefined. So they are not known to be zero. */ rtx_code extend_op; if ((!WORD_REGISTER_OPERATIONS /* If this is a typical RISC machine, we only have to worry about the way loads are extended. */ - || !MEM_P (SUBREG_REG (x)) || ((extend_op = load_extend_op (inner_mode)) == SIGN_EXTEND ? val_signbit_known_set_p (inner_mode, nonzero) - : extend_op != ZERO_EXTEND)) + : extend_op != ZERO_EXTEND) + || (!MEM_P (SUBREG_REG (x)) && !REG_P (SUBREG_REG (x)))) && xmode_width > inner_width) nonzero |= (GET_MODE_MASK (GET_MODE (x)) & ~GET_MODE_MASK (inner_mode)); |