diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c')
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c | 42 |
1 files changed, 14 insertions, 28 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c index 8d2a365..e78590f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c @@ -2,12 +2,6 @@ #include "arm-neon-ref.h" #include "compute-ref-data.h" -/* Expected values of cumulative_saturation flag. */ -int VECT_VAR(expected_cumulative_sat,int,16,4) = 0; -int VECT_VAR(expected_cumulative_sat,int,32,2) = 0; -int VECT_VAR(expected_cumulative_sat,int,16,8) = 0; -int VECT_VAR(expected_cumulative_sat,int,32,4) = 0; - /* Expected results. */ VECT_VAR_DECL(expected,int,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff }; VECT_VAR_DECL(expected,int,32,2) [] = { 0xffffffff, 0xffffffff }; @@ -16,13 +10,6 @@ VECT_VAR_DECL(expected,int,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff, VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }; -/* Expected values of cumulative_saturation flag when saturation - occurs. */ -int VECT_VAR(expected_cumulative_sat2,int,16,4) = 1; -int VECT_VAR(expected_cumulative_sat2,int,32,2) = 1; -int VECT_VAR(expected_cumulative_sat2,int,16,8) = 1; -int VECT_VAR(expected_cumulative_sat2,int,32,4) = 1; - /* Expected results when saturation occurs. */ VECT_VAR_DECL(expected2,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff }; VECT_VAR_DECL(expected2,int,32,2) [] = { 0x7fffffff, 0x7fffffff }; @@ -40,21 +27,20 @@ VECT_VAR_DECL(expected2,int,32,4) [] = { 0x7fffffff, 0x7fffffff, void FNNAME (INSN_NAME) (void) { /* vector_res = vqdmulh(vector,vector2,lane), then store the result. */ -#define TEST_VQDMULH2(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \ +#define TEST_VQDMULH2(INSN, Q, T1, T2, W, N, CMT) \ Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N)); \ VECT_VAR(vector_res, T1, W, N) = \ INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \ VECT_VAR(vector2, T1, W, N)); \ vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \ - VECT_VAR(vector_res, T1, W, N)); \ - CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT) + VECT_VAR(vector_res, T1, W, N)) /* Two auxliary macros are necessary to expand INSN. */ -#define TEST_VQDMULH1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \ - TEST_VQDMULH2(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) +#define TEST_VQDMULH1(INSN, Q, T1, T2, W, N, CMT) \ + TEST_VQDMULH2(INSN, Q, T1, T2, W, N, CMT) -#define TEST_VQDMULH(Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \ - TEST_VQDMULH1(INSN_NAME, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) +#define TEST_VQDMULH(Q, T1, T2, W, N, CMT) \ + TEST_VQDMULH1(INSN_NAME, Q, T1, T2, W, N, CMT) DECL_VARIABLE(vector, int, 16, 4); DECL_VARIABLE(vector, int, 32, 2); @@ -84,10 +70,10 @@ void FNNAME (INSN_NAME) (void) VDUP(vector2, q, int, s, 16, 8, 0x33); VDUP(vector2, q, int, s, 32, 4, 0x22); - TEST_VQDMULH(, int, s, 16, 4, expected_cumulative_sat, ""); - TEST_VQDMULH(, int, s, 32, 2, expected_cumulative_sat, ""); - TEST_VQDMULH(q, int, s, 16, 8, expected_cumulative_sat, ""); - TEST_VQDMULH(q, int, s, 32, 4, expected_cumulative_sat, ""); + TEST_VQDMULH(, int, s, 16, 4, ""); + TEST_VQDMULH(, int, s, 32, 2, ""); + TEST_VQDMULH(q, int, s, 16, 8, ""); + TEST_VQDMULH(q, int, s, 32, 4, ""); CHECK (TEST_MSG, int, 16, 4, PRIx16, expected, ""); CHECK (TEST_MSG, int, 32, 2, PRIx32, expected, ""); @@ -104,10 +90,10 @@ void FNNAME (INSN_NAME) (void) VDUP(vector2, q, int, s, 32, 4, 0x80000000); #define TEST_MSG2 "with saturation" - TEST_VQDMULH(, int, s, 16, 4, expected_cumulative_sat2, TEST_MSG2); - TEST_VQDMULH(, int, s, 32, 2, expected_cumulative_sat2, TEST_MSG2); - TEST_VQDMULH(q, int, s, 16, 8, expected_cumulative_sat2, TEST_MSG2); - TEST_VQDMULH(q, int, s, 32, 4, expected_cumulative_sat2, TEST_MSG2); + TEST_VQDMULH(, int, s, 16, 4, TEST_MSG2); + TEST_VQDMULH(, int, s, 32, 2, TEST_MSG2); + TEST_VQDMULH(q, int, s, 16, 8, TEST_MSG2); + TEST_VQDMULH(q, int, s, 32, 4, TEST_MSG2); CHECK (TEST_MSG, int, 16, 4, PRIx16, expected2, TEST_MSG2); CHECK (TEST_MSG, int, 32, 2, PRIx32, expected2, TEST_MSG2); |