diff options
Diffstat (limited to 'gcc/simplify-rtx.c')
| -rw-r--r-- | gcc/simplify-rtx.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index f5c530a..4354b5b 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -40,7 +40,7 @@ along with GCC; see the file COPYING3. If not see occasionally need to sign extend from low to high as if low were a signed wide int. */ #define HWI_SIGN_EXTEND(low) \ - ((((HOST_WIDE_INT) low) < 0) ? ((HOST_WIDE_INT) -1) : ((HOST_WIDE_INT) 0)) + ((((HOST_WIDE_INT) low) < 0) ? HOST_WIDE_INT_M1 : ((HOST_WIDE_INT) 0)) static rtx neg_const_int (machine_mode, const_rtx); static bool plus_minus_operand_p (const_rtx); @@ -111,8 +111,8 @@ mode_signbit_p (machine_mode mode, const_rtx x) return false; if (width < HOST_BITS_PER_WIDE_INT) - val &= ((unsigned HOST_WIDE_INT) 1 << width) - 1; - return val == ((unsigned HOST_WIDE_INT) 1 << (width - 1)); + val &= (HOST_WIDE_INT_1U << width) - 1; + return val == (HOST_WIDE_INT_1U << (width - 1)); } /* Test whether VAL is equal to the most significant bit of mode MODE @@ -132,7 +132,7 @@ val_signbit_p (machine_mode mode, unsigned HOST_WIDE_INT val) return false; val &= GET_MODE_MASK (mode); - return val == ((unsigned HOST_WIDE_INT) 1 << (width - 1)); + return val == (HOST_WIDE_INT_1U << (width - 1)); } /* Test whether the most significant bit of mode MODE is set in VAL. @@ -149,7 +149,7 @@ val_signbit_known_set_p (machine_mode mode, unsigned HOST_WIDE_INT val) if (width == 0 || width > HOST_BITS_PER_WIDE_INT) return false; - val &= (unsigned HOST_WIDE_INT) 1 << (width - 1); + val &= HOST_WIDE_INT_1U << (width - 1); return val != 0; } @@ -167,7 +167,7 @@ val_signbit_known_clear_p (machine_mode mode, unsigned HOST_WIDE_INT val) if (width == 0 || width > HOST_BITS_PER_WIDE_INT) return false; - val &= (unsigned HOST_WIDE_INT) 1 << (width - 1); + val &= HOST_WIDE_INT_1U << (width - 1); return val == 0; } @@ -5188,7 +5188,7 @@ simplify_const_relational_operation (enum rtx_code code, int sign_bitnum = GET_MODE_PRECISION (mode) - 1; int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum && (UINTVAL (inner_const) - & ((unsigned HOST_WIDE_INT) 1 + & (HOST_WIDE_INT_1U << sign_bitnum))); switch (code) @@ -5376,12 +5376,12 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode, if (HOST_BITS_PER_WIDE_INT != op1val) { /* First zero-extend. */ - val &= ((unsigned HOST_WIDE_INT) 1 << op1val) - 1; + val &= (HOST_WIDE_INT_1U << op1val) - 1; /* If desired, propagate sign bit. */ if (code == SIGN_EXTRACT - && (val & ((unsigned HOST_WIDE_INT) 1 << (op1val - 1))) + && (val & (HOST_WIDE_INT_1U << (op1val - 1))) != 0) - val |= ~ (((unsigned HOST_WIDE_INT) 1 << op1val) - 1); + val |= ~ ((HOST_WIDE_INT_1U << op1val) - 1); } return gen_int_mode (val, mode); @@ -5518,7 +5518,7 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode, if (n_elts == HOST_BITS_PER_WIDE_INT) mask = -1; else - mask = ((unsigned HOST_WIDE_INT) 1 << n_elts) - 1; + mask = (HOST_WIDE_INT_1U << n_elts) - 1; if (!(sel & mask) && !side_effects_p (op0)) return op1; @@ -5534,7 +5534,7 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode, unsigned int i; for (i = 0; i < n_elts; i++) - RTVEC_ELT (v, i) = ((sel & ((unsigned HOST_WIDE_INT) 1 << i)) + RTVEC_ELT (v, i) = ((sel & (HOST_WIDE_INT_1U << i)) ? CONST_VECTOR_ELT (trueop0, i) : CONST_VECTOR_ELT (trueop1, i)); return gen_rtx_CONST_VECTOR (mode, v); |