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-rw-r--r--gcc/rtl.c40
1 files changed, 34 insertions, 6 deletions
diff --git a/gcc/rtl.c b/gcc/rtl.c
index 1aa794c..4a30d21 100644
--- a/gcc/rtl.c
+++ b/gcc/rtl.c
@@ -158,10 +158,13 @@ static size_t rtvec_alloc_sizes;
Store the length, and initialize all elements to zero. */
rtvec
-rtvec_alloc (int n)
+rtvec_alloc (size_t n)
{
rtvec rt;
+ /* rtvec_def.num_elem is an int. */
+ gcc_assert (n < INT_MAX);
+
rt = ggc_alloc_rtvec_sized (n);
/* Clear out the vector. */
memset (&rt->elem[0], 0, n * sizeof (rtx));
@@ -295,14 +298,13 @@ copy_rtx (rtx orig)
case SYMBOL_REF:
case CODE_LABEL:
case PC:
- case CC0:
case RETURN:
case SIMPLE_RETURN:
case SCRATCH:
/* SCRATCH must be shared because they represent distinct values. */
return orig;
case CLOBBER:
- /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
+ /* Share clobbers of hard registers, but do not share pseudo reg
clobbers or clobbers of hard registers that originated as pseudos.
This is needed to allow safe register renaming. */
if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER
@@ -388,14 +390,15 @@ shallow_copy_rtx (const_rtx orig MEM_STAT_DECL)
case SYMBOL_REF:
case CODE_LABEL:
case PC:
- case CC0:
case RETURN:
case SIMPLE_RETURN:
case SCRATCH:
break;
default:
- /* For all other RTXes clear the used flag on the copy. */
- RTX_FLAG (copy, used) = 0;
+ /* For all other RTXes clear the used flag on the copy.
+ CALL_INSN use "used" flag to indicate it's a fake call. */
+ if (!INSN_P (orig))
+ RTX_FLAG (copy, used) = 0;
break;
}
return copy;
@@ -466,6 +469,11 @@ rtx_equal_p_cb (const_rtx x, const_rtx y, rtx_equal_p_callback_function cb)
CASE_CONST_UNIQUE:
return 0;
+ case CONST_VECTOR:
+ if (!same_vector_encodings_p (x, y))
+ return false;
+ break;
+
case DEBUG_IMPLICIT_PTR:
return DEBUG_IMPLICIT_PTR_DECL (x)
== DEBUG_IMPLICIT_PTR_DECL (y);
@@ -608,6 +616,11 @@ rtx_equal_p (const_rtx x, const_rtx y)
CASE_CONST_UNIQUE:
return 0;
+ case CONST_VECTOR:
+ if (!same_vector_encodings_p (x, y))
+ return false;
+ break;
+
case DEBUG_IMPLICIT_PTR:
return DEBUG_IMPLICIT_PTR_DECL (x)
== DEBUG_IMPLICIT_PTR_DECL (y);
@@ -723,6 +736,21 @@ rtvec_all_equal_p (const_rtvec vec)
}
}
+/* Return true if VEC contains a linear series of integers
+ { START, START+1, START+2, ... }. */
+
+bool
+rtvec_series_p (rtvec vec, int start)
+{
+ for (int i = 0; i < GET_NUM_ELEM (vec); i++)
+ {
+ rtx x = RTVEC_ELT (vec, i);
+ if (!CONST_INT_P (x) || INTVAL (x) != i + start)
+ return false;
+ }
+ return true;
+}
+
/* Return an indication of which type of insn should have X as a body.
In generator files, this can be UNKNOWN if the answer is only known
at (GCC) runtime. Otherwise the value is CODE_LABEL, INSN, CALL_INSN