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-rw-r--r--gcc/lra-constraints.c128
1 files changed, 76 insertions, 52 deletions
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index a43f8dc..6e6f04b 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -138,7 +138,7 @@ static int bb_reload_num;
/* The current insn being processed and corresponding its single set
(NULL otherwise), its data (basic block, the insn data, the insn
static data, and the mode of each operand). */
-static rtx curr_insn;
+static rtx_insn *curr_insn;
static rtx curr_insn_set;
static basic_block curr_bb;
static lra_insn_recog_data_t curr_id;
@@ -491,7 +491,7 @@ get_equiv (rtx x)
return that value after elimination for INSN, otherwise return
X. */
static rtx
-get_equiv_with_elimination (rtx x, rtx insn)
+get_equiv_with_elimination (rtx x, rtx_insn *insn)
{
rtx res = get_equiv (x);
@@ -834,7 +834,7 @@ narrow_reload_pseudo_class (rtx reg, enum reg_class cl)
matched input operands INS. */
static void
match_reload (signed char out, signed char *ins, enum reg_class goal_class,
- rtx *before, rtx *after)
+ rtx_insn **before, rtx_insn **after)
{
int i, in;
rtx new_in_reg, new_out_reg, reg, clobber;
@@ -1003,7 +1003,7 @@ get_op_class (rtx op)
/* Return generated insn mem_pseudo:=val if TO_P or val:=mem_pseudo
otherwise. If modes of MEM_PSEUDO and VAL are different, use
SUBREG for VAL to make them equal. */
-static rtx
+static rtx_insn *
emit_spill_move (bool to_p, rtx mem_pseudo, rtx val)
{
if (GET_MODE (mem_pseudo) != GET_MODE (val))
@@ -1024,9 +1024,9 @@ emit_spill_move (bool to_p, rtx mem_pseudo, rtx val)
LRA_SUBREG_P (mem_pseudo) = 1;
}
}
- return (to_p
- ? gen_move_insn (mem_pseudo, val)
- : gen_move_insn (val, mem_pseudo));
+ return as_a <rtx_insn *> (to_p
+ ? gen_move_insn (mem_pseudo, val)
+ : gen_move_insn (val, mem_pseudo));
}
/* Process a special case insn (register move), return true if we
@@ -1038,7 +1038,8 @@ static bool
check_and_process_move (bool *change_p, bool *sec_mem_p ATTRIBUTE_UNUSED)
{
int sregno, dregno;
- rtx dest, src, dreg, sreg, old_sreg, new_reg, before, scratch_reg;
+ rtx dest, src, dreg, sreg, old_sreg, new_reg, scratch_reg;
+ rtx_insn *before;
enum reg_class dclass, sclass, secondary_class;
enum machine_mode sreg_mode;
secondary_reload_info sri;
@@ -1164,7 +1165,7 @@ check_and_process_move (bool *change_p, bool *sec_mem_p ATTRIBUTE_UNUSED)
}
before = get_insns ();
end_sequence ();
- lra_process_new_insns (curr_insn, before, NULL_RTX, "Inserting the move");
+ lra_process_new_insns (curr_insn, before, NULL, "Inserting the move");
if (new_reg != NULL_RTX)
{
if (GET_CODE (src) == SUBREG)
@@ -1238,7 +1239,8 @@ static int curr_swapped;
automodified value; handle that case by adding the required output
reloads to list AFTER. Return true if the RTL was changed. */
static bool
-process_addr_reg (rtx *loc, rtx *before, rtx *after, enum reg_class cl)
+process_addr_reg (rtx *loc, rtx_insn **before, rtx_insn **after,
+ enum reg_class cl)
{
int regno;
enum reg_class rclass, new_class;
@@ -1314,7 +1316,8 @@ process_addr_reg (rtx *loc, rtx *before, rtx *after, enum reg_class cl)
the insn to be inserted after curr insn. ORIGREG and NEWREG
are the original reg and new reg for reload. */
static void
-insert_move_for_subreg (rtx *before, rtx *after, rtx origreg, rtx newreg)
+insert_move_for_subreg (rtx_insn **before, rtx_insn **after, rtx origreg,
+ rtx newreg)
{
if (before)
{
@@ -1342,14 +1345,14 @@ static bool
simplify_operand_subreg (int nop, enum machine_mode reg_mode)
{
int hard_regno;
- rtx before, after;
+ rtx_insn *before, *after;
enum machine_mode mode;
rtx reg, new_reg;
rtx operand = *curr_id->operand_loc[nop];
enum reg_class regclass;
enum op_type type;
- before = after = NULL_RTX;
+ before = after = NULL;
if (GET_CODE (operand) != SUBREG)
return false;
@@ -2753,7 +2756,7 @@ equiv_address_substitution (struct address_info *ad)
To do all necessary transformations use function
process_address. */
static bool
-process_address_1 (int nop, rtx *before, rtx *after)
+process_address_1 (int nop, rtx_insn **before, rtx_insn **after)
{
struct address_info ad;
rtx new_reg;
@@ -2890,7 +2893,8 @@ process_address_1 (int nop, rtx *before, rtx *after)
{
int regno;
enum reg_class cl;
- rtx set, insns, last_insn;
+ rtx set;
+ rtx_insn *insns, *last_insn;
/* Try to reload base into register only if the base is invalid
for the address but with valid offset, case (4) above. */
start_sequence ();
@@ -2967,7 +2971,7 @@ process_address_1 (int nop, rtx *before, rtx *after)
/* Do address reloads until it is necessary. Use process_address_1 as
a helper function. Return true for any RTL changes. */
static bool
-process_address (int nop, rtx *before, rtx *after)
+process_address (int nop, rtx_insn **before, rtx_insn **after)
{
bool res = false;
@@ -2994,7 +2998,7 @@ emit_inc (enum reg_class new_rclass, rtx in, rtx value, int inc_amount)
/* Nonzero if increment after copying. */
int post = (GET_CODE (value) == POST_DEC || GET_CODE (value) == POST_INC
|| GET_CODE (value) == POST_MODIFY);
- rtx last;
+ rtx_insn *last;
rtx inc;
rtx add_insn;
int code;
@@ -3154,7 +3158,7 @@ curr_insn_transform (void)
int commutative;
signed char goal_alt_matched[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
signed char match_inputs[MAX_RECOG_OPERANDS + 1];
- rtx before, after;
+ rtx_insn *before, *after;
bool alt_p = false;
/* Flag that the insn has been changed through a transformation. */
bool change_p;
@@ -3252,7 +3256,7 @@ curr_insn_transform (void)
/* Reload address registers and displacements. We do it before
finding an alternative because of memory constraints. */
- before = after = NULL_RTX;
+ before = after = NULL;
for (i = 0; i < n_operands; i++)
if (! curr_static_id->operand[i].is_operator
&& process_address (i, &before, &after))
@@ -3371,7 +3375,7 @@ curr_insn_transform (void)
secondary memory moves we can not reuse the original
insn. */
after = emit_spill_move (false, new_reg, dest);
- lra_process_new_insns (curr_insn, NULL_RTX, after,
+ lra_process_new_insns (curr_insn, NULL, after,
"Inserting the sec. move");
/* We may have non null BEFORE here (e.g. after address
processing. */
@@ -3380,14 +3384,14 @@ curr_insn_transform (void)
emit_insn (before);
before = get_insns ();
end_sequence ();
- lra_process_new_insns (curr_insn, before, NULL_RTX, "Changing on");
+ lra_process_new_insns (curr_insn, before, NULL, "Changing on");
lra_set_insn_deleted (curr_insn);
}
else if (dest == rld)
{
*curr_id->operand_loc[0] = new_reg;
after = emit_spill_move (false, new_reg, dest);
- lra_process_new_insns (curr_insn, NULL_RTX, after,
+ lra_process_new_insns (curr_insn, NULL, after,
"Inserting the sec. move");
}
else
@@ -3399,7 +3403,7 @@ curr_insn_transform (void)
emit_insn (before);
before = get_insns ();
end_sequence ();
- lra_process_new_insns (curr_insn, before, NULL_RTX,
+ lra_process_new_insns (curr_insn, before, NULL,
"Inserting the sec. move");
}
lra_update_insn_regno_info (curr_insn);
@@ -3848,7 +3852,7 @@ loc_equivalence_callback (rtx loc, const_rtx, void *data)
return NULL_RTX;
rtx subst = (data == NULL
- ? get_equiv (loc) : get_equiv_with_elimination (loc, (rtx) data));
+ ? get_equiv (loc) : get_equiv_with_elimination (loc, (rtx_insn *) data));
if (subst != loc)
return subst;
@@ -4376,6 +4380,16 @@ substitute_pseudo (rtx *loc, int old_regno, rtx new_reg)
return result;
}
+/* Call substitute_pseudo within an insn. This won't update the insn ptr,
+ just the contents of the insn. */
+
+static bool
+substitute_pseudo_within_insn (rtx_insn *insn, int old_regno, rtx new_reg)
+{
+ rtx loc = insn;
+ return substitute_pseudo (&loc, old_regno, new_reg);
+}
+
/* Return first non-debug insn in list USAGE_INSNS. */
static rtx
skip_usage_debug_insns (rtx usage_insns)
@@ -4447,14 +4461,15 @@ static bitmap_head check_only_regs;
class of ORIGINAL REGNO. */
static bool
inherit_reload_reg (bool def_p, int original_regno,
- enum reg_class cl, rtx insn, rtx next_usage_insns)
+ enum reg_class cl, rtx_insn *insn, rtx next_usage_insns)
{
if (optimize_function_for_size_p (cfun))
return false;
enum reg_class rclass = lra_get_allocno_class (original_regno);
rtx original_reg = regno_reg_rtx[original_regno];
- rtx new_reg, new_insns, usage_insn;
+ rtx new_reg, usage_insn;
+ rtx_insn *new_insns;
lra_assert (! usage_insns[original_regno].after_p);
if (lra_dump_file != NULL)
@@ -4535,7 +4550,7 @@ inherit_reload_reg (bool def_p, int original_regno,
}
return false;
}
- substitute_pseudo (&insn, original_regno, new_reg);
+ substitute_pseudo_within_insn (insn, original_regno, new_reg);
lra_update_insn_regno_info (insn);
if (! def_p)
/* We now have a new usage insn for original regno. */
@@ -4548,10 +4563,10 @@ inherit_reload_reg (bool def_p, int original_regno,
bitmap_set_bit (&check_only_regs, original_regno);
bitmap_set_bit (&lra_inheritance_pseudos, REGNO (new_reg));
if (def_p)
- lra_process_new_insns (insn, NULL_RTX, new_insns,
+ lra_process_new_insns (insn, NULL, new_insns,
"Add original<-inheritance");
else
- lra_process_new_insns (insn, new_insns, NULL_RTX,
+ lra_process_new_insns (insn, new_insns, NULL,
"Add inheritance<-original");
while (next_usage_insns != NULL_RTX)
{
@@ -4568,7 +4583,7 @@ inherit_reload_reg (bool def_p, int original_regno,
next_usage_insns = XEXP (next_usage_insns, 1);
}
substitute_pseudo (&usage_insn, original_regno, new_reg);
- lra_update_insn_regno_info (usage_insn);
+ lra_update_insn_regno_info (as_a <rtx_insn *> (usage_insn));
if (lra_dump_file != NULL)
{
fprintf (lra_dump_file,
@@ -4719,12 +4734,14 @@ choose_split_class (enum reg_class allocno_class,
if BEFORE_P is true. Return true if we succeed in such
transformation. */
static bool
-split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
+split_reg (bool before_p, int original_regno, rtx_insn *insn,
+ rtx next_usage_insns)
{
enum reg_class rclass;
rtx original_reg;
int hard_regno, nregs;
- rtx new_reg, save, restore, usage_insn;
+ rtx new_reg, usage_insn;
+ rtx_insn *restore, *save;
bool after_p;
bool call_save_p;
@@ -4830,7 +4847,7 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
lra_assert (DEBUG_INSN_P (usage_insn));
next_usage_insns = XEXP (next_usage_insns, 1);
substitute_pseudo (&usage_insn, original_regno, new_reg);
- lra_update_insn_regno_info (usage_insn);
+ lra_update_insn_regno_info (as_a <rtx_insn *> (usage_insn));
if (lra_dump_file != NULL)
{
fprintf (lra_dump_file, " Split reuse change %d->%d:\n",
@@ -4840,12 +4857,13 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
}
lra_assert (NOTE_P (usage_insn) || NONDEBUG_INSN_P (usage_insn));
lra_assert (usage_insn != insn || (after_p && before_p));
- lra_process_new_insns (usage_insn, after_p ? NULL_RTX : restore,
- after_p ? restore : NULL_RTX,
+ lra_process_new_insns (as_a <rtx_insn *> (usage_insn),
+ after_p ? NULL : restore,
+ after_p ? restore : NULL,
call_save_p
? "Add reg<-save" : "Add reg<-split");
- lra_process_new_insns (insn, before_p ? save : NULL_RTX,
- before_p ? NULL_RTX : save,
+ lra_process_new_insns (insn, before_p ? save : NULL,
+ before_p ? NULL : save,
call_save_p
? "Add save<-reg" : "Add split<-reg");
if (nregs > 1)
@@ -4871,7 +4889,7 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
static bool
split_if_necessary (int regno, enum machine_mode mode,
HARD_REG_SET potential_reload_hard_regs,
- bool before_p, rtx insn, int max_uid)
+ bool before_p, rtx_insn *insn, int max_uid)
{
bool res = false;
int i, nregs = 1;
@@ -4901,12 +4919,13 @@ static bitmap_head live_regs;
inheritance/split transformation. The function removes dead moves
too. */
static void
-update_ebb_live_info (rtx head, rtx tail)
+update_ebb_live_info (rtx_insn *head, rtx_insn *tail)
{
unsigned int j;
int i, regno;
bool live_p;
- rtx prev_insn, set;
+ rtx_insn *prev_insn;
+ rtx set;
bool remove_p;
basic_block last_bb, prev_bb, curr_bb;
bitmap_iterator bi;
@@ -5041,10 +5060,10 @@ add_to_inherit (int regno, rtx insns)
/* Return the last non-debug insn in basic block BB, or the block begin
note if none. */
-static rtx
+static rtx_insn *
get_last_insertion_point (basic_block bb)
{
- rtx insn;
+ rtx_insn *insn;
FOR_BB_INSNS_REVERSE (bb, insn)
if (NONDEBUG_INSN_P (insn) || NOTE_INSN_BASIC_BLOCK_P (insn))
@@ -5057,7 +5076,7 @@ get_last_insertion_point (basic_block bb)
static void
get_live_on_other_edges (basic_block from, basic_block to, bitmap res)
{
- rtx last;
+ rtx_insn *last;
struct lra_insn_reg *reg;
edge e;
edge_iterator ei;
@@ -5101,11 +5120,12 @@ static const int max_small_class_regs_num = 2;
splitting even more but it is to expensive and the current approach
works well enough. */
static bool
-inherit_in_ebb (rtx head, rtx tail)
+inherit_in_ebb (rtx_insn *head, rtx_insn *tail)
{
int i, src_regno, dst_regno, nregs;
bool change_p, succ_p, update_reloads_num_p;
- rtx prev_insn, next_usage_insns, set, last_insn;
+ rtx_insn *prev_insn, *last_insn;
+ rtx next_usage_insns, set;
enum reg_class cl;
struct lra_insn_reg *reg;
basic_block last_processed_bb, curr_bb = NULL;
@@ -5305,7 +5325,8 @@ inherit_in_ebb (rtx head, rtx tail)
change_p = true;
if (CALL_P (curr_insn))
{
- rtx cheap, pat, dest, restore;
+ rtx cheap, pat, dest;
+ rtx_insn *restore;
int regno, hard_regno;
calls_num++;
@@ -5604,7 +5625,8 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
{
basic_block bb;
int regno, sregno, prev_sregno, dregno, restore_regno;
- rtx set, prev_set, prev_insn;
+ rtx set, prev_set;
+ rtx_insn *prev_insn;
bool change_p, done_p;
change_p = ! bitmap_empty_p (remove_pseudos);
@@ -5738,8 +5760,8 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
{
if (change_p && bitmap_bit_p (remove_pseudos, regno))
{
- substitute_pseudo (&curr_insn, regno,
- regno_reg_rtx[restore_regno]);
+ substitute_pseudo_within_insn (
+ curr_insn, regno, regno_reg_rtx[restore_regno]);
restored_regs_p = true;
}
else
@@ -5780,7 +5802,8 @@ undo_optional_reloads (void)
bool change_p, keep_p;
unsigned int regno, uid;
bitmap_iterator bi, bi2;
- rtx insn, set, src, dest;
+ rtx_insn *insn;
+ rtx set, src, dest;
bitmap_head removed_optional_reload_pseudos, insn_bitmap;
bitmap_initialize (&removed_optional_reload_pseudos, &reg_obstack);
@@ -5861,8 +5884,9 @@ undo_optional_reloads (void)
we remove the inheritance pseudo and the optional
reload. */
}
- substitute_pseudo (&insn, regno,
- regno_reg_rtx[lra_reg_info[regno].restore_regno]);
+ substitute_pseudo_within_insn (
+ insn, regno,
+ regno_reg_rtx[lra_reg_info[regno].restore_regno]);
lra_update_insn_regno_info (insn);
if (lra_dump_file != NULL)
{
generated by cgit v1.1 at 2025-08-10 04:17:20 +0000