3 files changed, 29 insertions, 90 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index ed78df8..14aab94 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -4731,7 +4731,7 @@ it is unsafe to call @code{gen_reg_rtx} to allocate a new pseudo.
 
 The constraints on a @samp{mov@var{m}} must permit moving any hard
 register to any other hard register provided that
-@code{HARD_REGNO_MODE_OK} permits mode @var{m} in both registers and
+@code{TARGET_HARD_REGNO_MODE_OK} permits mode @var{m} in both registers and
 @code{TARGET_REGISTER_MOVE_COST} applied to their classes returns a value
 of 2.
 
@@ -4744,7 +4744,7 @@ point members.
 There may also be a need to support fixed point @samp{mov@var{m}}
 instructions in and out of floating point registers.  Unfortunately, I
 have forgotten why this was so, and I don't know whether it is still
-true.  If @code{HARD_REGNO_MODE_OK} rejects fixed point values in
+true.  If @code{TARGET_HARD_REGNO_MODE_OK} rejects fixed point values in
 floating point registers, then the constraints of the fixed point
 @samp{mov@var{m}} instructions must be designed to avoid ever trying to
 reload into a floating point register.
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 0c77b53..35141ac 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2017,8 +2017,9 @@ consecutive registers are needed for a given mode.
 A C expression for the number of consecutive hard registers, starting
 at register number @var{regno}, required to hold a value of mode
 @var{mode}.  This macro must never return zero, even if a register
-cannot hold the requested mode - indicate that with HARD_REGNO_MODE_OK
-and/or CANNOT_CHANGE_MODE_CLASS instead.
+cannot hold the requested mode - indicate that with
+@code{TARGET_HARD_REGNO_MODE_OK} and/or @code{CANNOT_CHANGE_MODE_CLASS}
+instead.
 
 On a machine where all registers are exactly one word, a suitable
 definition of this macro is
@@ -2066,22 +2067,18 @@ happens for example on SPARC 64-bit where the natural size of
 floating-point registers is still 32-bit.
 @end defmac
 
-@defmac HARD_REGNO_MODE_OK (@var{regno}, @var{mode})
-A C expression that is nonzero if it is permissible to store a value
+@deftypefn {Target Hook} bool TARGET_HARD_REGNO_MODE_OK (unsigned int @var{regno}, machine_mode @var{mode})
+This hook returns true if it is permissible to store a value
 of mode @var{mode} in hard register number @var{regno} (or in several
-registers starting with that one).  For a machine where all registers
-are equivalent, a suitable definition is
-
-@smallexample
-#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
-@end smallexample
+registers starting with that one).  The default definition returns true
+unconditionally.
 
 You need not include code to check for the numbers of fixed registers,
 because the allocation mechanism considers them to be always occupied.
 
 @cindex register pairs
 On some machines, double-precision values must be kept in even/odd
-register pairs.  You can implement that by defining this macro to reject
+register pairs.  You can implement that by defining this hook to reject
 odd register numbers for such modes.
 
 The minimum requirement for a mode to be OK in a register is that the
@@ -2091,9 +2088,9 @@ value into the register and back out not alter it.
 
 Since the same instruction used to move @code{word_mode} will work for
 all narrower integer modes, it is not necessary on any machine for
-@code{HARD_REGNO_MODE_OK} to distinguish between these modes, provided
-you define patterns @samp{movhi}, etc., to take advantage of this.  This
-is useful because of the interaction between @code{HARD_REGNO_MODE_OK}
+this hook to distinguish between these modes, provided you define
+patterns @samp{movhi}, etc., to take advantage of this.  This is
+useful because of the interaction between @code{TARGET_HARD_REGNO_MODE_OK}
 and @code{MODES_TIEABLE_P}; it is very desirable for all integer modes
 to be tieable.
 
@@ -2108,16 +2105,16 @@ On some machines, though, the converse is true: fixed-point machine
 modes may not go in floating registers.  This is true if the floating
 registers normalize any value stored in them, because storing a
 non-floating value there would garble it.  In this case,
-@code{HARD_REGNO_MODE_OK} should reject fixed-point machine modes in
+@code{TARGET_HARD_REGNO_MODE_OK} should reject fixed-point machine modes in
 floating registers.  But if the floating registers do not automatically
 normalize, if you can store any bit pattern in one and retrieve it
 unchanged without a trap, then any machine mode may go in a floating
-register, so you can define this macro to say so.
+register, so you can define this hook to say so.
 
 The primary significance of special floating registers is rather that
 they are the registers acceptable in floating point arithmetic
 instructions.  However, this is of no concern to
-@code{HARD_REGNO_MODE_OK}.  You handle it by writing the proper
+@code{TARGET_HARD_REGNO_MODE_OK}.  You handle it by writing the proper
 constraints for those instructions.
 
 On some machines, the floating registers are especially slow to access,
@@ -2125,7 +2122,7 @@ so that it is better to store a value in a stack frame than in such a
 register if floating point arithmetic is not being done.  As long as the
 floating registers are not in class @code{GENERAL_REGS}, they will not
 be used unless some pattern's constraint asks for one.
-@end defmac
+@end deftypefn
 
 @defmac HARD_REGNO_RENAME_OK (@var{from}, @var{to})
 A C expression that is nonzero if it is OK to rename a hard register
@@ -2142,9 +2139,9 @@ The default is always nonzero.
 A C expression that is nonzero if a value of mode
 @var{mode1} is accessible in mode @var{mode2} without copying.
 
-If @code{HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and
-@code{HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always the same for
-any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1}, @var{mode2})}
+If @code{TARGET_HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and
+@code{TARGET_HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always the same
+for any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1}, @var{mode2})}
 should be nonzero.  If they differ for any @var{r}, you should define
 this macro to return zero unless some other mechanism ensures the
 accessibility of the value in a narrower mode.
@@ -2331,7 +2328,7 @@ When a value occupying several consecutive registers is expected in a
 certain class, all the registers used must belong to that class.
 Therefore, register classes cannot be used to enforce a requirement for
 a register pair to start with an even-numbered register.  The way to
-specify this requirement is with @code{HARD_REGNO_MODE_OK}.
+specify this requirement is with @code{TARGET_HARD_REGNO_MODE_OK}.
 
 Register classes used for input-operands of bitwise-and or shift
 instructions have a special requirement: each such class must have, for
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 3fec545..edcd9a2 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -1808,8 +1808,9 @@ consecutive registers are needed for a given mode.
 A C expression for the number of consecutive hard registers, starting
 at register number @var{regno}, required to hold a value of mode
 @var{mode}.  This macro must never return zero, even if a register
-cannot hold the requested mode - indicate that with HARD_REGNO_MODE_OK
-and/or CANNOT_CHANGE_MODE_CLASS instead.
+cannot hold the requested mode - indicate that with
+@code{TARGET_HARD_REGNO_MODE_OK} and/or @code{CANNOT_CHANGE_MODE_CLASS}
+instead.
 
 On a machine where all registers are exactly one word, a suitable
 definition of this macro is
@@ -1857,66 +1858,7 @@ happens for example on SPARC 64-bit where the natural size of
 floating-point registers is still 32-bit.
 @end defmac
 
-@defmac HARD_REGNO_MODE_OK (@var{regno}, @var{mode})
-A C expression that is nonzero if it is permissible to store a value
-of mode @var{mode} in hard register number @var{regno} (or in several
-registers starting with that one).  For a machine where all registers
-are equivalent, a suitable definition is
-
-@smallexample
-#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
-@end smallexample
-
-You need not include code to check for the numbers of fixed registers,
-because the allocation mechanism considers them to be always occupied.
-
-@cindex register pairs
-On some machines, double-precision values must be kept in even/odd
-register pairs.  You can implement that by defining this macro to reject
-odd register numbers for such modes.
-
-The minimum requirement for a mode to be OK in a register is that the
-@samp{mov@var{mode}} instruction pattern support moves between the
-register and other hard register in the same class and that moving a
-value into the register and back out not alter it.
-
-Since the same instruction used to move @code{word_mode} will work for
-all narrower integer modes, it is not necessary on any machine for
-@code{HARD_REGNO_MODE_OK} to distinguish between these modes, provided
-you define patterns @samp{movhi}, etc., to take advantage of this.  This
-is useful because of the interaction between @code{HARD_REGNO_MODE_OK}
-and @code{MODES_TIEABLE_P}; it is very desirable for all integer modes
-to be tieable.
-
-Many machines have special registers for floating point arithmetic.
-Often people assume that floating point machine modes are allowed only
-in floating point registers.  This is not true.  Any registers that
-can hold integers can safely @emph{hold} a floating point machine
-mode, whether or not floating arithmetic can be done on it in those
-registers.  Integer move instructions can be used to move the values.
-
-On some machines, though, the converse is true: fixed-point machine
-modes may not go in floating registers.  This is true if the floating
-registers normalize any value stored in them, because storing a
-non-floating value there would garble it.  In this case,
-@code{HARD_REGNO_MODE_OK} should reject fixed-point machine modes in
-floating registers.  But if the floating registers do not automatically
-normalize, if you can store any bit pattern in one and retrieve it
-unchanged without a trap, then any machine mode may go in a floating
-register, so you can define this macro to say so.
-
-The primary significance of special floating registers is rather that
-they are the registers acceptable in floating point arithmetic
-instructions.  However, this is of no concern to
-@code{HARD_REGNO_MODE_OK}.  You handle it by writing the proper
-constraints for those instructions.
-
-On some machines, the floating registers are especially slow to access,
-so that it is better to store a value in a stack frame than in such a
-register if floating point arithmetic is not being done.  As long as the
-floating registers are not in class @code{GENERAL_REGS}, they will not
-be used unless some pattern's constraint asks for one.
-@end defmac
+@hook TARGET_HARD_REGNO_MODE_OK
 
 @defmac HARD_REGNO_RENAME_OK (@var{from}, @var{to})
 A C expression that is nonzero if it is OK to rename a hard register
@@ -1933,9 +1875,9 @@ The default is always nonzero.
 A C expression that is nonzero if a value of mode
 @var{mode1} is accessible in mode @var{mode2} without copying.
 
-If @code{HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and
-@code{HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always the same for
-any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1}, @var{mode2})}
+If @code{TARGET_HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and
+@code{TARGET_HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always the same
+for any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1}, @var{mode2})}
 should be nonzero.  If they differ for any @var{r}, you should define
 this macro to return zero unless some other mechanism ensures the
 accessibility of the value in a narrower mode.
@@ -2114,7 +2056,7 @@ When a value occupying several consecutive registers is expected in a
 certain class, all the registers used must belong to that class.
 Therefore, register classes cannot be used to enforce a requirement for
 a register pair to start with an even-numbered register.  The way to
-specify this requirement is with @code{HARD_REGNO_MODE_OK}.
+specify this requirement is with @code{TARGET_HARD_REGNO_MODE_OK}.
 
 Register classes used for input-operands of bitwise-and or shift
 instructions have a special requirement: each such class must have, for