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-rw-r--r--gcc/config/alpha/alpha.h2
-rw-r--r--gcc/config/arm/arm.h3
-rw-r--r--gcc/config/bfin/bfin.h4
-rw-r--r--gcc/config/cris/cris.h3
-rw-r--r--gcc/config/i386/i386-c.c6
-rw-r--r--gcc/config/i386/i386.c13
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/config/lm32/lm32.h2
-rw-r--r--gcc/config/mcore/mcore.h1
-rw-r--r--gcc/config/mcore/mcore.md4
-rw-r--r--gcc/config/mep/mep.h2
-rw-r--r--gcc/config/mips/mips.h3
-rw-r--r--gcc/config/mmix/mmix.h2
-rw-r--r--gcc/config/rs6000/rs6000.h3
-rw-r--r--gcc/config/s390/s390.h2
-rw-r--r--gcc/config/score/score-conv.h4
-rw-r--r--gcc/config/sh/sh.h2
-rw-r--r--gcc/config/spu/spu.h3
18 files changed, 17 insertions, 44 deletions
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index be885c1..bdf3159 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -144,8 +144,6 @@ enum alpha_fp_trap_mode
ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
};
-extern int target_flags;
-
extern enum alpha_trap_precision alpha_tp;
extern enum alpha_fp_rounding_mode alpha_fprm;
extern enum alpha_fp_trap_mode alpha_fptm;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 9bbe346..55442f5 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -989,6 +989,9 @@ extern int arm_structure_size_boundary;
? ARM_HARD_FRAME_POINTER_REGNUM \
: THUMB_HARD_FRAME_POINTER_REGNUM)
+#define HARD_FRAME_POINTER_IS_FRAME_POINTER 0
+#define HARD_FRAME_POINTER_IS_ARG_POINTER 0
+
#define FP_REGNUM HARD_FRAME_POINTER_REGNUM
/* Register to use for pushing function arguments. */
diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h
index 30b298d..11cc5ca 100644
--- a/gcc/config/bfin/bfin.h
+++ b/gcc/config/bfin/bfin.h
@@ -72,10 +72,6 @@ extern unsigned int bfin_workarounds;
/* Print subsidiary information on the compiler version in use. */
#define TARGET_VERSION fprintf (stderr, " (BlackFin bfin)")
-/* Run-time compilation parameters selecting different hardware subsets. */
-
-extern int target_flags;
-
/* Predefinition in the preprocessor for this target machine */
#ifndef TARGET_CPU_CPP_BUILTINS
#define TARGET_CPU_CPP_BUILTINS() \
diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h
index d302c9f..cd4a22d2 100644
--- a/gcc/config/cris/cris.h
+++ b/gcc/config/cris/cris.h
@@ -280,9 +280,6 @@ extern int cris_cpu_version;
} \
while (0)
-/* This needs to be at least 32 bits. */
-extern int target_flags;
-
/* Previously controlled by target_flags. */
#define TARGET_ELF 1
diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index c03c851..1993c62 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -1,5 +1,5 @@
/* Subroutines used for macro/preprocessor support on the ia-32.
- Copyright (C) 2008, 2009
+ Copyright (C) 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of GCC.
@@ -297,8 +297,8 @@ ix86_pragma_target_parse (tree args, tree pop_target)
/* Figure out the previous/current isa, arch, tune and the differences. */
prev_opt = TREE_TARGET_OPTION (prev_tree);
cur_opt = TREE_TARGET_OPTION (cur_tree);
- prev_isa = prev_opt->ix86_isa_flags;
- cur_isa = cur_opt->ix86_isa_flags;
+ prev_isa = prev_opt->x_ix86_isa_flags;
+ cur_isa = cur_opt->x_ix86_isa_flags;
diff_isa = (prev_isa ^ cur_isa);
prev_arch = (enum processor_type) prev_opt->arch;
prev_tune = (enum processor_type) prev_opt->tune;
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c13479a..2077521 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1898,7 +1898,6 @@ int x86_prefetch_sse;
static int ix86_regparm;
/* -mstackrealign option */
-extern int ix86_force_align_arg_pointer;
static const char ix86_force_align_arg_pointer_string[]
= "force_align_arg_pointer";
@@ -3860,7 +3859,7 @@ ix86_function_specific_print (FILE *file, int indent,
struct cl_target_option *ptr)
{
char *target_string
- = ix86_target_string (ptr->ix86_isa_flags, ptr->target_flags,
+ = ix86_target_string (ptr->x_ix86_isa_flags, ptr->x_target_flags,
NULL, NULL, NULL, false);
fprintf (file, "%*sarch = %d (%s)\n",
@@ -4117,8 +4116,8 @@ ix86_valid_target_attribute_tree (tree args)
ix86_option_override_internal, and then save the options away.
The string options are are attribute options, and will be undone
when we copy the save structure. */
- if (ix86_isa_flags != def->ix86_isa_flags
- || target_flags != def->target_flags
+ if (ix86_isa_flags != def->x_ix86_isa_flags
+ || target_flags != def->x_target_flags
|| option_strings[IX86_FUNCTION_SPECIFIC_ARCH]
|| option_strings[IX86_FUNCTION_SPECIFIC_TUNE]
|| option_strings[IX86_FUNCTION_SPECIFIC_FPMATH])
@@ -4235,12 +4234,12 @@ ix86_can_inline_p (tree caller, tree callee)
/* Callee's isa options should a subset of the caller's, i.e. a SSE4 function
can inline a SSE2 function but a SSE2 function can't inline a SSE4
function. */
- if ((caller_opts->ix86_isa_flags & callee_opts->ix86_isa_flags)
- != callee_opts->ix86_isa_flags)
+ if ((caller_opts->x_ix86_isa_flags & callee_opts->x_ix86_isa_flags)
+ != callee_opts->x_ix86_isa_flags)
ret = false;
/* See if we have the same non-isa options. */
- else if (caller_opts->target_flags != callee_opts->target_flags)
+ else if (caller_opts->x_target_flags != callee_opts->x_target_flags)
ret = false;
/* See if arch, tune, etc. are the same. */
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index e1c13ac..62f35ca 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -447,8 +447,6 @@ extern int x86_prefetch_sse;
#define TARGET_ANY_GNU_TLS (TARGET_GNU_TLS || TARGET_GNU2_TLS)
#define TARGET_SUN_TLS 0
-extern int ix86_isa_flags;
-
#ifndef TARGET_64BIT_DEFAULT
#define TARGET_64BIT_DEFAULT 0
#endif
diff --git a/gcc/config/lm32/lm32.h b/gcc/config/lm32/lm32.h
index 2698d40..f629d0f 100644
--- a/gcc/config/lm32/lm32.h
+++ b/gcc/config/lm32/lm32.h
@@ -68,8 +68,6 @@
#undef LIB_SPEC
#define LIB_SPEC "%{!T*:-T sim.ld}"
-extern int target_flags;
-
/* Add -G xx support. */
#undef SWITCH_TAKES_ARG
diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h
index 5044811..11047c9 100644
--- a/gcc/config/mcore/mcore.h
+++ b/gcc/config/mcore/mcore.h
@@ -134,7 +134,6 @@ extern char * mcore_current_function_name;
#define STACK_BOUNDARY (TARGET_8ALIGN ? 64 : 32)
/* Largest increment in UNITS we allow the stack to grow in a single operation. */
-extern int mcore_stack_increment;
#define STACK_UNITS_MAXSTEP 4096
/* Allocation boundary (in *bits*) for the code of a function. */
diff --git a/gcc/config/mcore/mcore.md b/gcc/config/mcore/mcore.md
index 65b9158..532181d 100644
--- a/gcc/config/mcore/mcore.md
+++ b/gcc/config/mcore/mcore.md
@@ -1,5 +1,5 @@
;; Machine description the Motorola MCore
-;; Copyright (C) 1993, 1999, 2000, 2004, 2005, 2007
+;; Copyright (C) 1993, 1999, 2000, 2004, 2005, 2007, 2009, 2010
;; Free Software Foundation, Inc.
;; Contributed by Motorola.
@@ -697,8 +697,6 @@
""
"
{
- extern int flag_omit_frame_pointer;
-
/* If this is an add to the frame pointer, then accept it as is so
that we can later fold in the fp/sp offset from frame pointer
elimination. */
diff --git a/gcc/config/mep/mep.h b/gcc/config/mep/mep.h
index 1bebf3b..ad2cf30 100644
--- a/gcc/config/mep/mep.h
+++ b/gcc/config/mep/mep.h
@@ -108,8 +108,6 @@ crtbegin.o%s"
} \
while (0)
-extern int target_flags;
-
/* Controlled by MeP-Integrator. */
#define TARGET_H1 0
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 4f44130..608c209 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1736,6 +1736,9 @@ enum mips_code_readable_setting {
#define HARD_FRAME_POINTER_REGNUM \
(TARGET_MIPS16 ? GP_REG_FIRST + 17 : GP_REG_FIRST + 30)
+#define HARD_FRAME_POINTER_IS_FRAME_POINTER 0
+#define HARD_FRAME_POINTER_IS_ARG_POINTER 0
+
/* Register in which static-chain is passed to a function. */
#define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 15)
diff --git a/gcc/config/mmix/mmix.h b/gcc/config/mmix/mmix.h
index 5908a75..b4fc856 100644
--- a/gcc/config/mmix/mmix.h
+++ b/gcc/config/mmix/mmix.h
@@ -140,8 +140,6 @@ struct GTY(()) machine_function
} \
while (0)
-extern int target_flags;
-
#define TARGET_DEFAULT \
(MASK_BRANCH_PREDICT | MASK_BASE_ADDRESSES | MASK_USE_RETURN_INSN)
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 24edf6c..627e638 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -471,7 +471,6 @@ extern int rs6000_float_gprs;
extern int rs6000_alignment_flags;
extern const char *rs6000_sched_insert_nops_str;
extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
-extern int rs6000_xilinx_fpu;
/* Describe which vector unit to use for a given machine mode. */
enum rs6000_vector {
@@ -2417,9 +2416,7 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */
/* #define MACHINE_no_sched_speculative_load */
/* General flags. */
-extern int flag_pic;
extern int optimize;
-extern int flag_expensive_optimizations;
extern int frame_pointer_needed;
/* Classification of the builtin functions to properly set the declaration tree
diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index fcc63b0..8c8554f 100644
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -869,8 +869,6 @@ do { \
/* Position independent code. */
-extern int flag_pic;
-
#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
diff --git a/gcc/config/score/score-conv.h b/gcc/config/score/score-conv.h
index e042dc1..3a40090 100644
--- a/gcc/config/score/score-conv.h
+++ b/gcc/config/score/score-conv.h
@@ -1,5 +1,5 @@
/* score-conv.h for Sunplus S+CORE processor
- Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+ Copyright (C) 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
This file is part of GCC.
@@ -20,8 +20,6 @@
#ifndef GCC_SCORE_CONV_H
#define GCC_SCORE_CONV_H
-extern int target_flags;
-
#define GP_REG_FIRST 0U
#define GP_REG_LAST 31U
#define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1U)
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 2e9ee76..d196e39 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -503,8 +503,6 @@ extern enum sh_divide_strategy_e sh_div_strategy;
#define SUBTARGET_OVERRIDE_OPTIONS (void) 0
-extern const char *sh_fixed_range_str;
-
/* Target machine storage layout. */
diff --git a/gcc/config/spu/spu.h b/gcc/config/spu/spu.h
index 878cb63..9f72cb2 100644
--- a/gcc/config/spu/spu.h
+++ b/gcc/config/spu/spu.h
@@ -24,9 +24,6 @@
#define INIT_EXPANDERS spu_init_expanders()
-extern int target_flags;
-extern const char *spu_fixed_range_string;
-
/* Which processor to generate code or schedule for. */
enum processor_type
{
generated by cgit v1.1 at 2025-03-04 16:28:30 +0000