diff options
Diffstat (limited to 'gcc/config/sparc/sparc.c')
| -rw-r--r-- | gcc/config/sparc/sparc.c | 48 |
1 files changed, 42 insertions, 6 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 3ad1a7f..ca34630 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -222,6 +222,30 @@ struct processor_costs niagara_costs = { 0, /* shift penalty */ }; +static const +struct processor_costs niagara2_costs = { + COSTS_N_INSNS (3), /* int load */ + COSTS_N_INSNS (3), /* int signed load */ + COSTS_N_INSNS (3), /* int zeroed load */ + COSTS_N_INSNS (3), /* float load */ + COSTS_N_INSNS (6), /* fmov, fneg, fabs */ + COSTS_N_INSNS (6), /* fadd, fsub */ + COSTS_N_INSNS (6), /* fcmp */ + COSTS_N_INSNS (6), /* fmov, fmovr */ + COSTS_N_INSNS (6), /* fmul */ + COSTS_N_INSNS (19), /* fdivs */ + COSTS_N_INSNS (33), /* fdivd */ + COSTS_N_INSNS (19), /* fsqrts */ + COSTS_N_INSNS (33), /* fsqrtd */ + COSTS_N_INSNS (5), /* imul */ + COSTS_N_INSNS (5), /* imulX */ + 0, /* imul bit factor */ + COSTS_N_INSNS (31), /* idiv, average of 12 - 41 cycle range */ + COSTS_N_INSNS (31), /* idivX, average of 12 - 41 cycle range */ + COSTS_N_INSNS (1), /* movcc/movr */ + 0, /* shift penalty */ +}; + const struct processor_costs *sparc_costs = &cypress_costs; #ifdef HAVE_AS_RELAX_OPTION @@ -623,6 +647,7 @@ sparc_override_options (void) { TARGET_CPU_ultrasparc, "ultrasparc" }, { TARGET_CPU_ultrasparc3, "ultrasparc3" }, { TARGET_CPU_niagara, "niagara" }, + { TARGET_CPU_niagara2, "niagara2" }, { 0, 0 } }; const struct cpu_default *def; @@ -660,6 +685,7 @@ sparc_override_options (void) { "ultrasparc3", PROCESSOR_ULTRASPARC3, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS}, /* UltraSPARC T1 */ { "niagara", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS}, + { "niagara2", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9}, { 0, 0, 0, 0 } }; const struct cpu_table *cpu; @@ -770,7 +796,8 @@ sparc_override_options (void) if (align_functions == 0 && (sparc_cpu == PROCESSOR_ULTRASPARC || sparc_cpu == PROCESSOR_ULTRASPARC3 - || sparc_cpu == PROCESSOR_NIAGARA)) + || sparc_cpu == PROCESSOR_NIAGARA + || sparc_cpu == PROCESSOR_NIAGARA2)) align_functions = 32; /* Validate PCC_STRUCT_RETURN. */ @@ -822,6 +849,9 @@ sparc_override_options (void) case PROCESSOR_NIAGARA: sparc_costs = &niagara_costs; break; + case PROCESSOR_NIAGARA2: + sparc_costs = &niagara2_costs; + break; }; #ifdef TARGET_DEFAULT_LONG_DOUBLE_128 @@ -832,7 +862,8 @@ sparc_override_options (void) if (!PARAM_SET_P (PARAM_SIMULTANEOUS_PREFETCHES)) set_param_value ("simultaneous-prefetches", ((sparc_cpu == PROCESSOR_ULTRASPARC - || sparc_cpu == PROCESSOR_NIAGARA) + || sparc_cpu == PROCESSOR_NIAGARA + || sparc_cpu == PROCESSOR_NIAGARA2) ? 2 : (sparc_cpu == PROCESSOR_ULTRASPARC3 ? 8 : 3))); @@ -840,7 +871,8 @@ sparc_override_options (void) set_param_value ("l1-cache-line-size", ((sparc_cpu == PROCESSOR_ULTRASPARC || sparc_cpu == PROCESSOR_ULTRASPARC3 - || sparc_cpu == PROCESSOR_NIAGARA) + || sparc_cpu == PROCESSOR_NIAGARA + || sparc_cpu == PROCESSOR_NIAGARA2) ? 64 : 32)); } @@ -7236,7 +7268,8 @@ sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt) emit_insn (gen_flush (validize_mem (gen_rtx_MEM (SImode, tramp)))); if (sparc_cpu != PROCESSOR_ULTRASPARC && sparc_cpu != PROCESSOR_ULTRASPARC3 - && sparc_cpu != PROCESSOR_NIAGARA) + && sparc_cpu != PROCESSOR_NIAGARA + && sparc_cpu != PROCESSOR_NIAGARA2) emit_insn (gen_flush (validize_mem (gen_rtx_MEM (SImode, plus_constant (tramp, 8))))); @@ -7279,7 +7312,8 @@ sparc64_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt) if (sparc_cpu != PROCESSOR_ULTRASPARC && sparc_cpu != PROCESSOR_ULTRASPARC3 - && sparc_cpu != PROCESSOR_NIAGARA) + && sparc_cpu != PROCESSOR_NIAGARA + && sparc_cpu != PROCESSOR_NIAGARA2) emit_insn (gen_flushdi (validize_mem (gen_rtx_MEM (DImode, plus_constant (tramp, 8))))); /* Call __enable_execute_stack after writing onto the stack to make sure @@ -7459,7 +7493,8 @@ sparc_sched_init (FILE *dump ATTRIBUTE_UNUSED, static int sparc_use_sched_lookahead (void) { - if (sparc_cpu == PROCESSOR_NIAGARA) + if (sparc_cpu == PROCESSOR_NIAGARA + || sparc_cpu == PROCESSOR_NIAGARA2) return 0; if (sparc_cpu == PROCESSOR_ULTRASPARC || sparc_cpu == PROCESSOR_ULTRASPARC3) @@ -7477,6 +7512,7 @@ sparc_issue_rate (void) switch (sparc_cpu) { case PROCESSOR_NIAGARA: + case PROCESSOR_NIAGARA2: default: return 1; case PROCESSOR_V9: |