diff options
Diffstat (limited to 'gcc/config/sparc/sparc.c')
| -rw-r--r-- | gcc/config/sparc/sparc.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 9a7e467..469b03d 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -672,6 +672,7 @@ static void sparc_print_operand_address (FILE *, machine_mode, rtx); static reg_class_t sparc_secondary_reload (bool, rtx, reg_class_t, machine_mode, secondary_reload_info *); +static machine_mode sparc_secondary_memory_needed_mode (machine_mode); static scalar_int_mode sparc_cstore_mode (enum insn_code icode); static void sparc_atomic_assign_expand_fenv (tree *, tree *, tree *); static bool sparc_fixed_condition_code_regs (unsigned int *, unsigned int *); @@ -859,6 +860,8 @@ char sparc_hard_reg_printed[8]; #undef TARGET_SECONDARY_RELOAD #define TARGET_SECONDARY_RELOAD sparc_secondary_reload +#undef TARGET_SECONDARY_MEMORY_NEEDED_MODE +#define TARGET_SECONDARY_MEMORY_NEEDED_MODE sparc_secondary_memory_needed_mode #undef TARGET_CONDITIONAL_REGISTER_USAGE #define TARGET_CONDITIONAL_REGISTER_USAGE sparc_conditional_register_usage @@ -13050,6 +13053,30 @@ sparc_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, return NO_REGS; } +/* Implement TARGET_SECONDARY_MEMORY_NEEDED_MODE. + + get_secondary_mem widens its argument to BITS_PER_WORD which loses on v9 + because the movsi and movsf patterns don't handle r/f moves. + For v8 we copy the default definition. */ + +static machine_mode +sparc_secondary_memory_needed_mode (machine_mode mode) +{ + if (TARGET_ARCH64) + { + if (GET_MODE_BITSIZE (mode) < 32) + return mode_for_size (32, GET_MODE_CLASS (mode), 0).require (); + return mode; + } + else + { + if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD) + return mode_for_size (BITS_PER_WORD, + GET_MODE_CLASS (mode), 0).require (); + return mode; + } +} + /* Emit code to conditionally move either OPERANDS[2] or OPERANDS[3] into OPERANDS[0] in MODE. OPERANDS[1] is the operator of the condition. */ |