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Diffstat (limited to 'gcc/config/sh/sh.c')
-rw-r--r--gcc/config/sh/sh.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index c68b077..e9487f1 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -321,6 +321,7 @@ static bool sh_legitimate_combined_insn (rtx_insn* insn);
static bool sh_fixed_condition_code_regs (unsigned int* p1, unsigned int* p2);
static void sh_init_sync_libfuncs (void) ATTRIBUTE_UNUSED;
+static bool sh_hard_regno_mode_ok (unsigned int, machine_mode);
static const struct attribute_spec sh_attribute_table[] =
{
@@ -641,6 +642,9 @@ static const struct attribute_spec sh_attribute_table[] =
#undef TARGET_CANNOT_FORCE_CONST_MEM
#define TARGET_CANNOT_FORCE_CONST_MEM sh_cannot_force_const_mem_p
+#undef TARGET_HARD_REGNO_MODE_OK
+#define TARGET_HARD_REGNO_MODE_OK sh_hard_regno_mode_ok
+
struct gcc_target targetm = TARGET_INITIALIZER;
@@ -10494,7 +10498,8 @@ sh_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
return target;
}
-/* Return true if hard register REGNO can hold a value of machine-mode MODE.
+/* Implement TARGET_HARD_REGNO_MODE_OK.
+
We can allow any mode in any general register. The special registers
only allow SImode. Don't allow any mode in the PR.
@@ -10509,7 +10514,7 @@ sh_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
We want to allow TImode FP regs so that when V4SFmode is loaded as TImode,
it won't be ferried through GP registers first. */
-bool
+static bool
sh_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
{
if (SPECIAL_REGISTER_P (regno))
@@ -10569,7 +10574,7 @@ sh_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
}
/* Specify the modes required to caller save a given hard regno.
- choose_hard_reg_mode chooses mode based on HARD_REGNO_MODE_OK
+ choose_hard_reg_mode chooses mode based on TARGET_HARD_REGNO_MODE_OK
and returns ?Imode for float regs when sh_hard_regno_mode_ok
permits integer modes on them. That makes LRA's split process
unhappy. See PR55212.