diff options
Diffstat (limited to 'gcc/config/mips/mips.md')
| -rw-r--r-- | gcc/config/mips/mips.md | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index aae78fa..cfff63e 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3242,9 +3242,9 @@ (match_operand:GPR 2 "and_reg_operand")))]) ;; The middle-end is not allowed to convert ANDing with 0xffff_ffff into a -;; zero_extendsidi2 because of TRULY_NOOP_TRUNCATION, so handle these here. -;; Note that this variant does not trigger for SI mode because we require -;; a 64-bit HOST_WIDE_INT and 0xffff_ffff wouldn't be a canonical +;; zero_extendsidi2 because of TARGET_TRULY_NOOP_TRUNCATION, so handle these +;; here. Note that this variant does not trigger for SI mode because we +;; require a 64-bit HOST_WIDE_INT and 0xffff_ffff wouldn't be a canonical ;; sign-extended SImode value. ;; ;; These are possible combinations for operand 1 and 2. The table @@ -3426,7 +3426,7 @@ ;; modes is a no-op, as it is for most other GCC ports. Truncating ;; DImode values to SImode is not a no-op for TARGET_64BIT since we ;; need to make sure that the lower 32 bits are properly sign-extended -;; (see TRULY_NOOP_TRUNCATION). Truncating DImode values into modes +;; (see TARGET_TRULY_NOOP_TRUNCATION). Truncating DImode values into modes ;; smaller than SImode is equivalent to two separate truncations: ;; ;; A B @@ -3644,7 +3644,7 @@ ;; Those for integer source operand are ordered widest source type first. ;; When TARGET_64BIT, all SImode integer and accumulator registers -;; should already be in sign-extended form (see TRULY_NOOP_TRUNCATION +;; should already be in sign-extended form (see TARGET_TRULY_NOOP_TRUNCATION ;; and truncdisi2). We can therefore get rid of register->register ;; instructions if we constrain the source to be in the same register as ;; the destination. |