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Diffstat (limited to 'gcc/config/mips/irix-csr.c')
-rw-r--r--gcc/config/mips/irix-csr.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/gcc/config/mips/irix-csr.c b/gcc/config/mips/irix-csr.c
new file mode 100644
index 0000000..ef37345
--- /dev/null
+++ b/gcc/config/mips/irix-csr.c
@@ -0,0 +1,17 @@
+#if _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
+#include <sys/fpu.h>
+
+/* n32 and n64 applications usually run with the MIPS IV Flush to Zero
+ bit set. Clear it here so that gcc-generated code will handle
+ subnormals correctly by default. */
+
+static void __attribute__((constructor))
+clear_flush_to_zero (void)
+{
+ union fpc_csr csr;
+
+ csr.fc_word = get_fpc_csr ();
+ csr.fc_struct.flush = 0;
+ set_fpc_csr (csr.fc_word);
+}
+#endif