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-rw-r--r--gcc/config/ia64/ia64.c4
-rw-r--r--gcc/config/ia64/ia64.h18
2 files changed, 2 insertions, 20 deletions
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index d1f44d6..b9b85a0 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -1626,8 +1626,8 @@ ia64_split_tmode_move (rtx operands[])
/* ??? Fixing GR->FR XFmode moves during reload is hard. You need to go
through memory plus an extra GR scratch register. Except that you can
- either get the first from SECONDARY_MEMORY_NEEDED or the second from
- SECONDARY_RELOAD_CLASS, but not both.
+ either get the first from TARGET_SECONDARY_MEMORY_NEEDED or the second
+ from SECONDARY_RELOAD_CLASS, but not both.
We got into problems in the first place by allowing a construct like
(subreg:XF (reg:TI)), which we got from a union containing a long double.
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index cdb91a3..7eefa44 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -767,24 +767,6 @@ enum reg_class
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
ia64_secondary_reload_class (CLASS, MODE, X)
-/* Certain machines have the property that some registers cannot be copied to
- some other registers without using memory. Define this macro on those
- machines to be a C expression that is nonzero if objects of mode M in
- registers of CLASS1 can only be copied to registers of class CLASS2 by
- storing a register of CLASS1 into memory and loading that memory location
- into a register of CLASS2. */
-
-#if 0
-/* ??? May need this, but since we've disallowed XFmode in GR_REGS,
- I'm not quite sure how it could be invoked. The normal problems
- with unions should be solved with the addressof fiddling done by
- movxf and friends. */
-#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
- (((MODE) == XFmode || (MODE) == XCmode) \
- && (((CLASS1) == GR_REGS && (CLASS2) == FR_REGS) \
- || ((CLASS1) == FR_REGS && (CLASS2) == GR_REGS)))
-#endif
-
/* A C expression for the maximum number of consecutive registers of
class CLASS needed to hold a value of mode MODE.
This is closely related to TARGET_HARD_REGNO_NREGS. */