diff options
Diffstat (limited to 'gcc/config/ia64/ia64.md')
| -rw-r--r-- | gcc/config/ia64/ia64.md | 51 |
1 files changed, 10 insertions, 41 deletions
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 635100c..2713eb6 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -584,11 +584,12 @@ [(set_attr "itanium_class" "ialu")]) ;; With no offsettable memory references, we've got to have a scratch -;; around to play with the second word. +;; around to play with the second word. However, in order to avoid a +;; reload nightmare we lie, claim we don't need one, and fix it up +;; in ia64_split_tmode_move. (define_expand "movti" - [(parallel [(set (match_operand:TI 0 "general_operand" "") - (match_operand:TI 1 "general_operand" "")) - (clobber (match_scratch:DI 2 ""))])] + [(set (match_operand:TI 0 "general_operand" "") + (match_operand:TI 1 "general_operand" ""))] "" { rtx op1 = ia64_expand_move (operands[0], operands[1]); @@ -599,8 +600,7 @@ (define_insn_and_split "*movti_internal" [(set (match_operand:TI 0 "nonimmediate_operand" "=r,r,m") - (match_operand:TI 1 "general_operand" "ri,m,r")) - (clobber (match_scratch:DI 2 "=X,&r,&r"))] + (match_operand:TI 1 "general_operand" "ri,m,r"))] "ia64_move_ok (operands[0], operands[1])" "#" "reload_completed" @@ -612,20 +612,6 @@ [(set_attr "itanium_class" "unknown") (set_attr "predicable" "no")]) -(define_expand "reload_inti" - [(parallel [(set (match_operand:TI 0 "register_operand" "=r") - (match_operand:TI 1 "memory_operand" "m")) - (clobber (match_operand:DI 2 "register_operand" "=&r"))])] - "" - "") - -(define_expand "reload_outti" - [(parallel [(set (match_operand:TI 0 "memory_operand" "=m") - (match_operand:TI 1 "register_operand" "r")) - (clobber (match_operand:DI 2 "register_operand" "=&r"))])] - "" - "") - ;; Floating Point Moves ;; ;; Note - Patterns for SF mode moves are compulsory, but @@ -764,13 +750,10 @@ [(set_attr "itanium_class" "fmisc,fld,stf")]) ;; Better code generation via insns that deal with TFmode register pairs -;; directly. -;; With no offsettable memory references, we've got to have a scratch -;; around to play with the second word. +;; directly. Same concerns apply as for TImode. (define_expand "movtf" - [(parallel [(set (match_operand:TF 0 "general_operand" "") - (match_operand:TF 1 "general_operand" "")) - (clobber (match_scratch:DI 2 ""))])] + [(set (match_operand:TF 0 "general_operand" "") + (match_operand:TF 1 "general_operand" ""))] "" { rtx op1 = ia64_expand_move (operands[0], operands[1]); @@ -781,8 +764,7 @@ (define_insn_and_split "*movtf_internal" [(set (match_operand:TF 0 "nonimmediate_operand" "=r,r,m") - (match_operand:TF 1 "general_operand" "ri,m,r")) - (clobber (match_scratch:DI 2 "=X,&r,&r"))] + (match_operand:TF 1 "general_operand" "ri,m,r"))] "ia64_move_ok (operands[0], operands[1])" "#" "reload_completed" @@ -794,19 +776,6 @@ [(set_attr "itanium_class" "unknown") (set_attr "predicable" "no")]) -(define_expand "reload_intf" - [(parallel [(set (match_operand:TF 0 "register_operand" "=r") - (match_operand:TF 1 "memory_operand" "m")) - (clobber (match_operand:DI 2 "register_operand" "=&r"))])] - "" - "") - -(define_expand "reload_outtf" - [(parallel [(set (match_operand:TF 0 "memory_operand" "=m") - (match_operand:TF 1 "register_operand" "r")) - (clobber (match_operand:DI 2 "register_operand" "=&r"))])] - "" - "") ;; :::::::::::::::::::: ;; :: |