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-rw-r--r--gcc/config/i386/i386.md619
1 files changed, 321 insertions, 298 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2b48b0a..c981d09 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -911,7 +911,17 @@
DONE;
}")
-(define_insn "cmpsi_0"
+(define_insn "cmpsi_ccz_1"
+ [(set (reg:CCZ 17)
+ (compare:CCZ (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
+ (match_operand:SI 1 "const0_operand" "n,n")))]
+ ""
+ "@
+ test{l}\\t{%0, %0|%0, %0}
+ cmp{l}\\t{%1, %0|%0, %1}"
+ [(set_attr "type" "icmp")])
+
+(define_insn "cmpsi_ccno_1"
[(set (reg:CCNO 17)
(compare:CCNO (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
(match_operand:SI 1 "const0_operand" "n,n")))]
@@ -929,17 +939,17 @@
"cmp{l}\\t{%1, %0|%0, %1}"
[(set_attr "type" "icmp")])
-(define_insn "cmphi_0"
- [(set (reg:CCNO 17)
- (compare:CCNO (match_operand:HI 0 "nonimmediate_operand" "r,?mr")
- (match_operand:HI 1 "const0_operand" "n,n")))]
- ""
+(define_insn "*cmphi_0"
+ [(set (reg 17)
+ (compare (match_operand:HI 0 "nonimmediate_operand" "r,?mr")
+ (match_operand:HI 1 "const0_operand" "n,n")))]
+ "ix86_match_ccmode (insn, CCNOmode)"
"@
test{w}\\t{%0, %0|%0, %0}
cmp{w}\\t{%1, %0|%0, %1}"
[(set_attr "type" "icmp")])
-(define_insn "cmphi_1"
+(define_insn "*cmphi_1"
[(set (reg:CC 17)
(compare:CC (match_operand:HI 0 "nonimmediate_operand" "rm,r")
(match_operand:HI 1 "general_operand" "ri,mr")))]
@@ -947,7 +957,17 @@
"cmp{w}\\t{%1, %0|%0, %1}"
[(set_attr "type" "icmp")])
-(define_insn "cmpqi_0"
+(define_insn "cmpqi_ccz_1"
+ [(set (reg:CCZ 17)
+ (compare:CCZ (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
+ (match_operand:QI 1 "const0_operand" "n,n")))]
+ ""
+ "@
+ test{b}\\t{%0, %0|%0, %0}
+ cmp{b}\\t{$0, %0|%0, 0}"
+ [(set_attr "type" "icmp")])
+
+(define_insn "*cmpqi_ccno_1"
[(set (reg:CCNO 17)
(compare:CCNO (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
(match_operand:QI 1 "const0_operand" "n,n")))]
@@ -957,7 +977,7 @@
cmp{b}\\t{$0, %0|%0, 0}"
[(set_attr "type" "icmp")])
-(define_insn "cmpqi_1"
+(define_insn "*cmpqi_1"
[(set (reg:CC 17)
(compare:CC (match_operand:QI 0 "nonimmediate_operand" "qm,q")
(match_operand:QI 1 "general_operand" "qi,mq")))]
@@ -979,15 +999,15 @@
[(set_attr "type" "icmp")])
(define_insn "*cmpqi_ext_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(subreg:QI
(zero_extract:SI
(match_operand 0 "ext_register_operand" "q")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 1 "const0_operand" "n")))]
- ""
+ "ix86_match_ccmode (insn, CCNOmode)"
"test{b}\\t%h0, %h0"
[(set_attr "type" "icmp")])
@@ -3347,14 +3367,15 @@
"")
(define_insn "*addsi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
(match_operand:SI 2 "general_operand" "rmni,rni"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
(plus:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (PLUS, SImode, operands)
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (PLUS, SImode, operands)
/* Current assemblers are broken and do not allow @GOTOFF in
ought but a memory context. */
&& ! pic_symbolic_operand (operands[2], VOIDmode)"
@@ -3458,14 +3479,15 @@
(const_string "alu")))])
(define_insn "*addhi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
(match_operand:HI 2 "general_operand" "rmni,rni"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
(plus:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (PLUS, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (PLUS, HImode, operands)"
"*
{
switch (get_attr_type (insn))
@@ -3564,14 +3586,15 @@
(const_string "alu")))])
(define_insn "*addqi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
(match_operand:QI 2 "general_operand" "qmni,qni"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
(plus:QI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (PLUS, QImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (PLUS, QImode, operands)"
"*
{
switch (get_attr_type (insn))
@@ -3784,26 +3807,15 @@
[(set_attr "type" "alu")])
(define_insn "*subsi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
- (minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
- (match_operand:SI 2 "general_operand" "ri,rm"))
- (const_int 0)))
- (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
- (minus:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (MINUS, SImode, operands)"
- "sub{l}\\t{%2, %0|%0, %2}"
- [(set_attr "type" "alu")])
-
-(define_insn "*subsi_3"
- [(set (reg:CC 17)
- (compare:CC
+ [(set (reg 17)
+ (compare
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
(match_operand:SI 2 "general_operand" "ri,rm"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
(minus:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (MINUS, SImode, operands)"
+ "ix86_match_ccmode (insn, CCmode)
+ && ix86_binary_operator_ok (MINUS, SImode, operands)"
"sub{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -3825,26 +3837,15 @@
[(set_attr "type" "alu")])
(define_insn "*subhi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
- (minus:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
- (match_operand:HI 2 "general_operand" "ri,rm"))
- (const_int 0)))
- (set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
- (minus:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (MINUS, HImode, operands)"
- "sub{w}\\t{%2, %0|%0, %2}"
- [(set_attr "type" "alu")])
-
-(define_insn "*subhi_3"
- [(set (reg:CC 17)
- (compare:CC
+ [(set (reg 17)
+ (compare
(minus:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
(match_operand:HI 2 "general_operand" "ri,rm"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
(minus:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (MINUS, HImode, operands)"
+ "ix86_match_ccmode (insn, CCmode)
+ && ix86_binary_operator_ok (MINUS, HImode, operands)"
"sub{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -3866,26 +3867,15 @@
[(set_attr "type" "alu")])
(define_insn "*subqi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
- (minus:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
- (match_operand:QI 2 "general_operand" "qi,qm"))
- (const_int 0)))
- (set (match_operand:HI 0 "nonimmediate_operand" "=qm,q")
- (minus:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (MINUS, QImode, operands)"
- "sub{b}\\t{%2, %0|%0, %2}"
- [(set_attr "type" "alu")])
-
-(define_insn "*subqi_3"
- [(set (reg:CC 17)
- (compare:CC
+ [(set (reg 17)
+ (compare
(minus:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "general_operand" "qi,qm"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=qm,q")
(minus:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (MINUS, QImode, operands)"
+ "ix86_match_ccmode (insn, CCmode)
+ && ix86_binary_operator_ok (MINUS, QImode, operands)"
"sub{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4301,27 +4291,50 @@
;; On Pentium, "test imm, reg" is pairable only with eax, ax, and al.
;; Note that this excludes ah.
-(define_insn "testsi_1"
- [(set (reg:CCNO 17)
- (compare:CCNO (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
- (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
- (const_int 0)))]
+(define_insn "*testsi_ccz_1"
+ [(set (reg:CCZ 17)
+ (compare:CCZ
+ (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
+ (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
+ (const_int 0)))]
""
"test{l}\\t{%1, %0|%0, %1}"
[(set_attr "type" "icmp")
(set_attr "pent_pair" "uv,np,uv")])
-(define_insn "*testhi_1"
+(define_insn "testsi_ccno_1"
[(set (reg:CCNO 17)
- (compare:CCNO (and:HI (match_operand:HI 0 "nonimmediate_operand" "%*a,r,rm")
- (match_operand:HI 1 "nonmemory_operand" "n,n,rn"))
- (const_int 0)))]
+ (compare:CCNO
+ (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
+ (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
+ (const_int 0)))]
""
+ "test{l}\\t{%1, %0|%0, %1}"
+ [(set_attr "type" "icmp")
+ (set_attr "pent_pair" "uv,np,uv")])
+
+(define_insn "*testhi_1"
+ [(set (reg 17)
+ (compare (and:HI (match_operand:HI 0 "nonimmediate_operand" "%*a,r,rm")
+ (match_operand:HI 1 "nonmemory_operand" "n,n,rn"))
+ (const_int 0)))]
+ "ix86_match_ccmode (insn, CCNOmode)"
"test{w}\\t{%1, %0|%0, %1}"
[(set_attr "type" "icmp")
(set_attr "pent_pair" "uv,np,uv")])
-(define_insn "testqi_1"
+(define_insn "testqi_ccz_1"
+ [(set (reg:CCZ 17)
+ (compare:CCZ
+ (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm")
+ (match_operand:QI 1 "nonmemory_operand" "n,n,qn"))
+ (const_int 0)))]
+ ""
+ "test{b}\\t{%1, %0|%0, %1}"
+ [(set_attr "type" "icmp")
+ (set_attr "pent_pair" "uv,np,uv")])
+
+(define_insn "testqi_ccno_1"
[(set (reg:CCNO 17)
(compare:CCNO (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm")
(match_operand:QI 1 "nonmemory_operand" "n,n,qn"))
@@ -4331,11 +4344,22 @@
[(set_attr "type" "icmp")
(set_attr "pent_pair" "uv,np,uv")])
-;; ??? A bug in recog prevents it from recognizing a const_int as an
-;; operand to zero_extend in andqi_ext_1. It was checking explicitly
-;; for a QImode operand, which of course failed.
+(define_insn "*testqi_ext_ccz_0"
+ [(set (reg:CCZ 17)
+ (compare:CCZ
+ (and:SI
+ (zero_extract:SI
+ (match_operand 0 "ext_register_operand" "q")
+ (const_int 8)
+ (const_int 8))
+ (match_operand 1 "const_int_operand" "n"))
+ (const_int 0)))]
+ "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff"
+ "test{b}\\t{%1, %h0|%h0, %1}"
+ [(set_attr "type" "icmp")
+ (set_attr "pent_pair" "np")])
-(define_insn "testqi_ext_0"
+(define_insn "testqi_ext_ccno_0"
[(set (reg:CCNO 17)
(compare:CCNO
(and:SI
@@ -4351,8 +4375,8 @@
(set_attr "pent_pair" "np")])
(define_insn "*testqi_ext_1"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(and:SI
(zero_extract:SI
(match_operand 0 "ext_register_operand" "q")
@@ -4361,13 +4385,13 @@
(zero_extend:SI
(match_operand:QI 1 "nonimmediate_operand" "qm")))
(const_int 0)))]
- ""
+ "ix86_match_ccmode (insn, CCNOmode)"
"test{b}\\t{%1, %h0|%h0, %1}"
[(set_attr "type" "icmp")])
(define_insn "*testqi_ext_2"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(and:SI
(zero_extract:SI
(match_operand 0 "ext_register_operand" "q")
@@ -4378,31 +4402,32 @@
(const_int 8)
(const_int 8)))
(const_int 0)))]
- ""
+ "ix86_match_ccmode (insn, CCNOmode)"
"test{b}\\t{%h1, %h0|%h0, %h1}"
[(set_attr "type" "icmp")])
;; Combine likes to form bit extractions for some tests. Humor it.
(define_insn "*testqi_ext_3"
- [(set (reg:CCNO 17)
- (compare:CCNO (zero_extract:SI
- (match_operand 0 "nonimmediate_operand" "rm")
- (match_operand:SI 1 "const_int_operand" "")
- (match_operand:SI 2 "const_int_operand" ""))
- (const_int 0)))]
- "GET_MODE (operands[0]) == SImode
- || GET_MODE (operands[0]) == HImode
- || GET_MODE (operands[0]) == QImode"
+ [(set (reg 17)
+ (compare (zero_extract:SI
+ (match_operand 0 "nonimmediate_operand" "rm")
+ (match_operand:SI 1 "const_int_operand" "")
+ (match_operand:SI 2 "const_int_operand" ""))
+ (const_int 0)))]
+ "ix86_match_ccmode (insn, CCNOmode)
+ && (GET_MODE (operands[0]) == SImode
+ || GET_MODE (operands[0]) == HImode
+ || GET_MODE (operands[0]) == QImode)"
"#")
(define_split
- [(set (reg:CCNO 17)
- (compare:CCNO (zero_extract:SI
- (match_operand 0 "nonimmediate_operand" "rm")
- (match_operand:SI 1 "const_int_operand" "")
- (match_operand:SI 2 "const_int_operand" ""))
- (const_int 0)))]
- ""
+ [(set (reg 17)
+ (compare (zero_extract:SI
+ (match_operand 0 "nonimmediate_operand" "rm")
+ (match_operand:SI 1 "const_int_operand" "")
+ (match_operand:SI 2 "const_int_operand" ""))
+ (const_int 0)))]
+ "ix86_match_ccmode (insn, CCNOmode)"
[(set (reg:CCNO 17) (compare:CCNO (match_dup 3) (const_int 0)))]
"
{
@@ -4506,13 +4531,14 @@
[(set_attr "type" "alu,alu,imovx")])
(define_insn "*andsi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
- (match_operand:SI 2 "general_operand" "rim,ri"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
+ (match_operand:SI 2 "general_operand" "rim,ri"))
+ (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
(and:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (AND, SImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (AND, SImode, operands)"
"and{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4566,13 +4592,14 @@
[(set_attr "type" "alu,alu,imovx")])
(define_insn "*andhi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
- (match_operand:HI 2 "general_operand" "rim,ri"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
+ (match_operand:HI 2 "general_operand" "rim,ri"))
+ (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
(and:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (AND, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (AND, HImode, operands)"
"and{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4598,14 +4625,15 @@
[(set_attr "type" "alu")])
(define_insn "*andqi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (and:QI
- (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
- (match_operand:QI 2 "general_operand" "qim,qi,i"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (and:QI
+ (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
+ (match_operand:QI 2 "general_operand" "qim,qi,i"))
+ (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r")
(and:QI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (AND, QImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (AND, QImode, operands)"
"@
and{b}\\t{%2, %0|%0, %2}
and{b}\\t{%2, %0|%0, %2}
@@ -4635,8 +4663,8 @@
;; often in fp comparisons.
(define_insn "*andqi_ext_0_cc"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(and:SI
(zero_extract:SI
(match_operand 1 "ext_register_operand" "q")
@@ -4653,7 +4681,8 @@
(const_int 8)
(const_int 8))
(match_dup 2)))]
- "(unsigned HOST_WIDE_INT)INTVAL (operands[2]) <= 0xff"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && (unsigned HOST_WIDE_INT)INTVAL (operands[2]) <= 0xff"
"and{b}\\t{%2, %h0|%h0, %2}"
[(set_attr "type" "alu")])
@@ -4714,13 +4743,14 @@
[(set_attr "type" "alu")])
(define_insn "*iorsi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
- (match_operand:SI 2 "general_operand" "rim,ri"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
+ (match_operand:SI 2 "general_operand" "rim,ri"))
+ (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
(ior:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (IOR, SImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (IOR, SImode, operands)"
"or{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4742,13 +4772,14 @@
[(set_attr "type" "alu")])
(define_insn "*iorhi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
- (match_operand:HI 2 "general_operand" "rim,ri"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
+ (match_operand:HI 2 "general_operand" "rim,ri"))
+ (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
(ior:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (IOR, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (IOR, HImode, operands)"
"or{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4774,13 +4805,14 @@
[(set_attr "type" "alu")])
(define_insn "*iorqi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
- (match_operand:QI 2 "general_operand" "qim,qi"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
+ (match_operand:QI 2 "general_operand" "qim,qi"))
+ (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
(ior:QI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (IOR, QImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (IOR, QImode, operands)"
"or{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4807,13 +4839,14 @@
[(set_attr "type" "alu")])
(define_insn "*xorsi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
- (match_operand:SI 2 "general_operand" "rim,ri"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
+ (match_operand:SI 2 "general_operand" "rim,ri"))
+ (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
(xor:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (XOR, SImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (XOR, SImode, operands)"
"xor{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4835,13 +4868,14 @@
[(set_attr "type" "alu")])
(define_insn "*xorhi_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
- (match_operand:HI 2 "general_operand" "rim,ri"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
+ (match_operand:HI 2 "general_operand" "rim,ri"))
+ (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
(xor:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (XOR, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (XOR, HImode, operands)"
"xor{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4867,14 +4901,15 @@
[(set_attr "type" "alu")])
(define_insn "*xorqi_cc_1"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
(match_operand:QI 2 "general_operand" "qim,qi"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
(xor:QI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (XOR, QImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (XOR, QImode, operands)"
"xor{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "alu")])
@@ -4922,8 +4957,8 @@
(clobber (reg:CC 17))]
"reload_completed"
[(parallel
- [(set (reg:CCNO 17)
- (compare:CCNO (neg:SI (match_dup 2)) (const_int 0)))
+ [(set (reg:CCZ 17)
+ (compare:CCZ (neg:SI (match_dup 2)) (const_int 0)))
(set (match_dup 0) (neg:SI (match_dup 2)))])
(parallel
[(set (match_dup 1)
@@ -4953,20 +4988,14 @@
"neg{l}\\t%0"
[(set_attr "type" "negnot")])
-(define_insn "*negsi2_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO (neg:SI (match_operand:SI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
- (neg:SI (match_dup 1)))]
- "ix86_unary_operator_ok (NEG, SImode, operands)"
- "neg{l}\\t%0"
- [(set_attr "type" "negnot")])
+;; The problem with neg is that it does not perform (compare x 0),
+;; it really performs (compare 0 x), which leaves us with the zero
+;; flag being the only useful item.
-(define_insn "*negsi2_cmp"
- [(set (reg:CC 17)
- (compare:CC (neg:SI (match_operand:SI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
+(define_insn "*negsi2_cmpz"
+ [(set (reg:CCZ 17)
+ (compare:CCZ (neg:SI (match_operand:SI 1 "nonimmediate_operand" "0"))
+ (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(neg:SI (match_dup 1)))]
"ix86_unary_operator_ok (NEG, SImode, operands)"
@@ -4988,20 +5017,10 @@
"neg{w}\\t%0"
[(set_attr "type" "negnot")])
-(define_insn "*neghi2_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO (neg:HI (match_operand:HI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
- (neg:HI (match_dup 1)))]
- "ix86_unary_operator_ok (NEG, HImode, operands)"
- "neg{w}\\t%0"
- [(set_attr "type" "negnot")])
-
-(define_insn "*neghi2_cmp"
- [(set (reg:CC 17)
- (compare:CC (neg:HI (match_operand:HI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
+(define_insn "*neghi2_cmpz"
+ [(set (reg:CCZ 17)
+ (compare:CCZ (neg:HI (match_operand:HI 1 "nonimmediate_operand" "0"))
+ (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(neg:HI (match_dup 1)))]
"ix86_unary_operator_ok (NEG, HImode, operands)"
@@ -5023,20 +5042,10 @@
"neg{b}\\t%0"
[(set_attr "type" "negnot")])
-(define_insn "*negqi2_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO (neg:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
- (neg:QI (match_dup 1)))]
- "ix86_unary_operator_ok (NEG, QImode, operands)"
- "neg{b}\\t%0"
- [(set_attr "type" "negnot")])
-
-(define_insn "*negqi2_cmp"
- [(set (reg:CC 17)
- (compare:CC (neg:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
+(define_insn "*negqi2_cmpz"
+ [(set (reg:CCZ 17)
+ (compare:CCZ (neg:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
+ (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(neg:QI (match_dup 1)))]
"ix86_unary_operator_ok (NEG, QImode, operands)"
@@ -5416,22 +5425,23 @@
[(set_attr "type" "negnot")])
(define_insn "*one_cmplsi2_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (not:SI (match_operand:SI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (not:SI (match_operand:SI 1 "nonimmediate_operand" "0"))
+ (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(not:SI (match_dup 1)))]
- "ix86_unary_operator_ok (NOT, SImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_unary_operator_ok (NOT, SImode, operands)"
"#"
[(set_attr "type" "alu1")])
(define_split
- [(set (reg:CCNO 17)
- (compare:CCNO (not:SI (match_operand:SI 1 "nonimmediate_operand" ""))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (not:SI (match_operand:SI 1 "nonimmediate_operand" ""))
+ (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "")
(not:SI (match_dup 1)))]
- ""
+ "ix86_match_ccmode (insn, CCNOmode)"
[(parallel [(set (reg:CCNO 17)
(compare:CCNO (xor:SI (match_dup 1) (const_int -1))
(const_int 0)))
@@ -5453,22 +5463,23 @@
[(set_attr "type" "negnot")])
(define_insn "*one_cmplhi2_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (not:HI (match_operand:HI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (not:HI (match_operand:HI 1 "nonimmediate_operand" "0"))
+ (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(not:HI (match_dup 1)))]
- "ix86_unary_operator_ok (NEG, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_unary_operator_ok (NEG, HImode, operands)"
"#"
[(set_attr "type" "alu1")])
(define_split
- [(set (reg:CCNO 17)
- (compare:CCNO (not:HI (match_operand:HI 1 "nonimmediate_operand" ""))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (not:HI (match_operand:HI 1 "nonimmediate_operand" ""))
+ (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "")
(not:HI (match_dup 1)))]
- ""
+ "ix86_match_ccmode (insn, CCNOmode)"
[(parallel [(set (reg:CCNO 17)
(compare:CCNO (xor:HI (match_dup 1) (const_int -1))
(const_int 0)))
@@ -5493,22 +5504,23 @@
[(set_attr "type" "negnot")])
(define_insn "*one_cmplqi2_2"
- [(set (reg:CCNO 17)
- (compare:CCNO (not:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (not:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
+ (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(not:QI (match_dup 1)))]
- "ix86_unary_operator_ok (NOT, QImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_unary_operator_ok (NOT, QImode, operands)"
"#"
[(set_attr "type" "alu1")])
(define_split
- [(set (reg:CCNO 17)
- (compare:CCNO (not:QI (match_operand:QI 1 "nonimmediate_operand" ""))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (not:QI (match_operand:QI 1 "nonimmediate_operand" ""))
+ (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "")
(not:QI (match_dup 1)))]
- ""
+ "ix86_match_ccmode (insn, CCNOmode)"
[(parallel [(set (reg:CCNO 17)
(compare:CCNO (xor:QI (match_dup 1) (const_int -1))
(const_int 0)))
@@ -5611,16 +5623,16 @@
(set_attr "ppro_uops" "few")])
(define_expand "x86_shift_adj_1"
- [(set (reg:CCNO 17)
- (compare:CCNO (and:QI (match_operand:QI 2 "register_operand" "")
- (const_int 32))
- (const_int 0)))
+ [(set (reg:CCZ 17)
+ (compare:CCZ (and:QI (match_operand:QI 2 "register_operand" "")
+ (const_int 32))
+ (const_int 0)))
(set (match_operand:SI 0 "register_operand" "")
- (if_then_else:SI (ne (reg:CCNO 17) (const_int 0))
+ (if_then_else:SI (ne (reg:CCZ 17) (const_int 0))
(match_operand:SI 1 "register_operand" "")
(match_dup 0)))
(set (match_dup 1)
- (if_then_else:SI (ne (reg:CCNO 17) (const_int 0))
+ (if_then_else:SI (ne (reg:CCZ 17) (const_int 0))
(match_operand:SI 3 "register_operand" "r")
(match_dup 1)))]
"TARGET_CMOVE"
@@ -5636,9 +5648,9 @@
rtx label = gen_label_rtx ();
rtx tmp;
- emit_insn (gen_testqi_1 (operands[2], GEN_INT (32)));
+ emit_insn (gen_testqi_ccz_1 (operands[2], GEN_INT (32)));
- tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
+ tmp = gen_rtx_REG (CCZmode, FLAGS_REG);
tmp = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
gen_rtx_LABEL_REF (VOIDmode, label),
@@ -5723,14 +5735,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashlsi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashift:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (ASHIFT, SImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
"*
{
switch (get_attr_type (insn))
@@ -5799,14 +5812,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashlhi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashift:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (ASHIFT, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
"*
{
switch (get_attr_type (insn))
@@ -5889,14 +5903,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashlqi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(ashift:QI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (ASHIFT, QImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
"*
{
switch (get_attr_type (insn))
@@ -6003,9 +6018,9 @@
rtx label = gen_label_rtx ();
rtx tmp;
- emit_insn (gen_testqi_1 (operands[2], GEN_INT (32)));
+ emit_insn (gen_testqi_ccz_1 (operands[2], GEN_INT (32)));
- tmp = gen_rtx_REG (CCNOmode, FLAGS_REG);
+ tmp = gen_rtx_REG (CCZmode, FLAGS_REG);
tmp = gen_rtx_EQ (VOIDmode, tmp, const0_rtx);
tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp,
gen_rtx_LABEL_REF (VOIDmode, label),
@@ -6058,14 +6073,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashrsi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
"@
sar{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
@@ -6093,14 +6109,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashrhi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
"@
sar{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
@@ -6128,14 +6145,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashrqi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
"@
sar{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
@@ -6220,14 +6238,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*lshrsi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(lshiftrt:SI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
"@
shr{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
@@ -6255,14 +6274,15 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*lshrhi3_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(lshiftrt:HI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
"@
shr{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
@@ -6290,16 +6310,16 @@
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*lshrqi2_cmpno"
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(lshiftrt:QI (match_dup 1) (match_dup 2)))]
- "ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
- "@
- shr{b}\\t{%2, %0|%0, %2}"
+ "ix86_match_ccmode (insn, CCNOmode)
+ && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
+ "shr{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
;; Rotate instructions
@@ -6930,11 +6950,11 @@
"TARGET_USE_LOOP && reload_completed
&& ! (REGNO (operands[1]) == 2 && rtx_equal_p (operands[1], operands[2]))"
[(set (match_dup 2) (match_dup 1))
- (parallel [(set (reg:CCNO 17)
- (compare:CCNO (plus:SI (match_dup 2) (const_int -1))
+ (parallel [(set (reg:CCZ 17)
+ (compare:CCZ (plus:SI (match_dup 2) (const_int -1))
(const_int 0)))
(set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))])
- (set (pc) (if_then_else (ne (reg:CCNO 17) (const_int 0))
+ (set (pc) (if_then_else (ne (reg:CCZ 17) (const_int 0))
(match_dup 0)
(pc)))]
"")
@@ -6952,12 +6972,12 @@
(clobber (reg:CC 17))]
"TARGET_USE_LOOP && reload_completed"
[(set (match_dup 3) (match_dup 1))
- (parallel [(set (reg:CCNO 17)
- (compare:CCNO (plus:SI (match_dup 3) (const_int -1))
- (const_int 0)))
+ (parallel [(set (reg:CCZ 17)
+ (compare:CCZ (plus:SI (match_dup 3) (const_int -1))
+ (const_int 0)))
(set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
(set (match_dup 2) (match_dup 3))
- (set (pc) (if_then_else (ne (reg:CCNO 17) (const_int 0))
+ (set (pc) (if_then_else (ne (reg:CCZ 17) (const_int 0))
(match_dup 0)
(pc)))]
"")
@@ -7333,7 +7353,7 @@
emit_insn (gen_ffssi_1 (out, in));
emit_insn (gen_rtx_SET (VOIDmode, out,
gen_rtx_IF_THEN_ELSE (SImode,
- gen_rtx_EQ (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG),
+ gen_rtx_EQ (VOIDmode, gen_rtx_REG (CCZmode, FLAGS_REG),
const0_rtx),
tmp,
out)));
@@ -7341,8 +7361,8 @@
emit_move_insn (operands[0], out);
}
- /* Pentium bsf instruction is extremly slow. Following code is recommended by
- the Intel Optimizing Manual as resonable replacement:
+ /* Pentium bsf instruction is extremly slow. The following code is
+ recommended by the Intel Optimizing Manual as a reasonable replacement:
TEST EAX,EAX
JZ SHORT BS2
XOR ECX,ECX
@@ -7382,7 +7402,7 @@
emit_move_insn (gen_rtx_MEM (DFmode, XEXP (mem, 0)), fptmp);
emit_move_insn (out, hi);
emit_insn (gen_lshrsi3 (out, out, GEN_INT (20)));
- emit_insn (gen_subsi3 (out, out, GEN_INT (0x3fe)));
+ emit_insn (gen_subsi3 (out, out, GEN_INT (0x3ff - 1)));
emit_label (label);
LABEL_NUSES (label) = 1;
@@ -7395,7 +7415,7 @@
emit_insn (gen_ffssi_1 (out, in));
emit_insn (gen_rtx_SET (VOIDmode,
gen_rtx_STRICT_LOW_PART (VOIDmode, gen_lowpart (QImode, tmp)),
- gen_rtx_EQ (QImode, gen_rtx_REG (CCmode, FLAGS_REG),
+ gen_rtx_EQ (QImode, gen_rtx_REG (CCZmode, FLAGS_REG),
const0_rtx)));
emit_insn (gen_negsi2 (tmp, tmp));
emit_insn (gen_iorsi3 (out, out, tmp));
@@ -7405,12 +7425,10 @@
DONE;
}")
-;; %%% The CCmode here is not strictly correct -- only Z is defined.
-;; But I don't think this can be used except for from above.
(define_insn "ffssi_1"
- [(set (reg:CC 17)
- (compare:CC (match_operand:SI 1 "nonimmediate_operand" "rm")
- (const_int 0)))
+ [(set (reg:CCZ 17)
+ (compare:CCZ (match_operand:SI 1 "nonimmediate_operand" "rm")
+ (const_int 0)))
(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_dup 1)] 5))]
""
@@ -8950,13 +8968,14 @@
GET_MODE (operands[3]) = SImode;")
(define_split
- [(set (reg:CCNO 17)
- (compare:CCNO (and (match_operand 1 "aligned_operand" "")
- (match_operand 2 "const_int_operand" ""))
- (const_int 0)))
+ [(set (reg 17)
+ (compare (and (match_operand 1 "aligned_operand" "")
+ (match_operand 2 "const_int_operand" ""))
+ (const_int 0)))
(set (match_operand 0 "register_operand" "")
(and (match_dup 1) (match_dup 2)))]
"! TARGET_PARTIAL_REG_STALL && reload_completed
+ && ix86_match_ccmode (insn, CCNOmode)
&& (GET_MODE (operands[0]) == HImode
|| (GET_MODE (operands[0]) == QImode
&& (TARGET_PROMOTE_QImode || optimize_size)))"
@@ -8971,11 +8990,12 @@
operands[1] = gen_lowpart (SImode, operands[1]);")
(define_split
- [(set (reg:CCNO 17)
- (compare:CCNO (and (match_operand 0 "aligned_operand" "")
- (match_operand 1 "const_int_operand" ""))
- (const_int 0)))]
+ [(set (reg 17)
+ (compare (and (match_operand 0 "aligned_operand" "")
+ (match_operand 1 "const_int_operand" ""))
+ (const_int 0)))]
"! TARGET_PARTIAL_REG_STALL && reload_completed
+ && ix86_match_ccmode (insn, CCNOmode)
&& (GET_MODE (operands[0]) == HImode
|| (GET_MODE (operands[0]) == QImode
&& (TARGET_PROMOTE_QImode || optimize_size)))"
@@ -9144,13 +9164,13 @@
;; Don't compare memory with zero, load and use a test instead.
(define_peephole2
- [(set (reg:CCNO 17)
- (compare:CCNO (match_operand:SI 0 "memory_operand" "")
- (const_int 0)))
+ [(set (reg 17)
+ (compare (match_operand:SI 0 "memory_operand" "")
+ (const_int 0)))
(match_scratch:SI 3 "r")]
- "! optimize_size"
- [(set (match_dup 3) (match_dup 0))
- (set (reg:CCNO 17) (compare:CCNO (match_dup 3) (const_int 0)))]
+ "ix86_match_ccmode (insn, CCNOmode) && ! optimize_size"
+ [(set (match_dup 3) (match_dup 0))
+ (set (reg:CCNO 17) (compare:CCNO (match_dup 3) (const_int 0)))]
"")
;; NOT is not pairable on Pentium, while XOR is, but one byte longer.
@@ -9214,12 +9234,13 @@
;; versions if we're concerned about partial register stalls.
(define_peephole2
- [(set (reg:CCNO 17)
- (compare:CCNO (and:SI (match_operand:SI 0 "register_operand" "")
- (match_operand:SI 1 "immediate_operand" ""))
- (const_int 0)))]
- "(true_regnum (operands[0]) != 0
- || CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K'))
+ [(set (reg 17)
+ (compare (and:SI (match_operand:SI 0 "register_operand" "")
+ (match_operand:SI 1 "immediate_operand" ""))
+ (const_int 0)))]
+ "ix86_match_ccmode (insn, CCNOmode)
+ && (true_regnum (operands[0]) != 0
+ || CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K'))
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
[(parallel
[(set (reg:CCNO 17)
@@ -9234,11 +9255,12 @@
;; on ! TARGET_PARTIAL_REG_STALL
(define_peephole2
- [(set (reg:CCNO 17)
- (compare:CCNO (and:QI (match_operand:QI 0 "register_operand" "")
- (match_operand:QI 1 "immediate_operand" ""))
- (const_int 0)))]
+ [(set (reg 17)
+ (compare (and:QI (match_operand:QI 0 "register_operand" "")
+ (match_operand:QI 1 "immediate_operand" ""))
+ (const_int 0)))]
"! TARGET_PARTIAL_REG_STALL
+ && ix86_match_ccmode (insn, CCNOmode)
&& true_regnum (operands[0]) != 0
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
[(parallel
@@ -9251,8 +9273,8 @@
"")
(define_peephole2
- [(set (reg:CCNO 17)
- (compare:CCNO
+ [(set (reg 17)
+ (compare
(and:SI
(zero_extract:SI
(match_operand 0 "ext_register_operand" "q")
@@ -9261,6 +9283,7 @@
(match_operand 1 "const_int_operand" "n"))
(const_int 0)))]
"! TARGET_PARTIAL_REG_STALL
+ && ix86_match_ccmode (insn, CCNOmode)
&& true_regnum (operands[0]) != 0
&& find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
[(parallel [(set (reg:CCNO 17)
generated by cgit v1.1 at 2026-01-04 05:43:21 +0000