diff options
| -rw-r--r-- | gcc/ChangeLog | 15 | ||||
| -rw-r--r-- | gcc/config/bfin/bfin-modes.def | 2 | ||||
| -rw-r--r-- | gcc/config/m32c/m32c-modes.def | 2 | ||||
| -rw-r--r-- | gcc/config/msp430/msp430-modes.def | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000-modes.def | 2 | ||||
| -rw-r--r-- | gcc/config/sh/sh-modes.def | 4 | ||||
| -rw-r--r-- | gcc/genmodes.c | 14 | ||||
| -rw-r--r-- | gcc/machmode.def | 8 |
8 files changed, 32 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4c1cc9c..ba0bf86 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2013-10-29 Mike Stump <mikestump@comcast.net> + + * machmode.def (PARTIAL_INT_MODE): Add precision and name. + * genmodes.c (PARTIAL_INT_MODE): Add precision and name. + (make_vector_mode): Increase namebuf to 16. + (emit_insn_modes_h): When processing BImode, don't + also match partial int modes. + (emit_class_narrowest_mode): Likewise. + + * config/bfin/bfin-modes.def: Add precision to PDI. + * config/m32c/m32c-modes.def: Add precision to PSI. + * config/msp430/msp430-modes.def: Add precision to PSI. + * config/rs6000/rs6000-modes.def: Add precision to PTI. + * config/sh/sh-modes.def: Add precision to PSI and PDI. + 2013-10-29 Oleg Endo <olegendo@gcc.gnu.org> PR target/54236 diff --git a/gcc/config/bfin/bfin-modes.def b/gcc/config/bfin/bfin-modes.def index cf03a1a..da0303c 100644 --- a/gcc/config/bfin/bfin-modes.def +++ b/gcc/config/bfin/bfin-modes.def @@ -19,7 +19,7 @@ <http://www.gnu.org/licenses/>. */ /* PDImode for the 40-bit accumulators. */ -PARTIAL_INT_MODE (DI); +PARTIAL_INT_MODE (DI, 40, PDI); /* Two of those - covering both accumulators for vector multiplications. */ VECTOR_MODE (INT, PDI, 2); diff --git a/gcc/config/m32c/m32c-modes.def b/gcc/config/m32c/m32c-modes.def index 2050c91..ad266fb 100644 --- a/gcc/config/m32c/m32c-modes.def +++ b/gcc/config/m32c/m32c-modes.def @@ -22,7 +22,7 @@ /*INT_MODE (PI, 3);*/ /* 24-bit pointers, in 32-bit units */ -PARTIAL_INT_MODE (SI); +PARTIAL_INT_MODE (SI, 24, PSI); /* 48-bit MULEX result */ /* INT_MODE (MI, 6); */ diff --git a/gcc/config/msp430/msp430-modes.def b/gcc/config/msp430/msp430-modes.def index 9e7b701..4e94a6d 100644 --- a/gcc/config/msp430/msp430-modes.def +++ b/gcc/config/msp430/msp430-modes.def @@ -1,3 +1,3 @@ /* 20-bit address */ -PARTIAL_INT_MODE (SI); +PARTIAL_INT_MODE (SI, 20, PSI); diff --git a/gcc/config/rs6000/rs6000-modes.def b/gcc/config/rs6000/rs6000-modes.def index 5124e16..a77aa26 100644 --- a/gcc/config/rs6000/rs6000-modes.def +++ b/gcc/config/rs6000/rs6000-modes.def @@ -45,4 +45,4 @@ VECTOR_MODES (FLOAT, 32); /* V16HF V8SF V4DF */ /* Replacement for TImode that only is allowed in GPRs. We also use PTImode for quad memory atomic operations to force getting an even/odd register combination. */ -PARTIAL_INT_MODE (TI); +PARTIAL_INT_MODE (TI, 128, PTI); diff --git a/gcc/config/sh/sh-modes.def b/gcc/config/sh/sh-modes.def index aec0079..aa56038 100644 --- a/gcc/config/sh/sh-modes.def +++ b/gcc/config/sh/sh-modes.def @@ -18,9 +18,9 @@ along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ /* The SH uses a partial integer mode to represent the FPSCR register. */ -PARTIAL_INT_MODE (SI); +PARTIAL_INT_MODE (SI, 22, PSI); /* PDI mode is used to represent a function address in a target register. */ -PARTIAL_INT_MODE (DI); +PARTIAL_INT_MODE (DI, 64, PDI); /* Vector modes. */ VECTOR_MODE (INT, QI, 2); /* V2QI */ diff --git a/gcc/genmodes.c b/gcc/genmodes.c index 0aa5de6..12a98f3 100644 --- a/gcc/genmodes.c +++ b/gcc/genmodes.c @@ -644,10 +644,10 @@ reset_float_format (const char *name, const char *format, m->format = format; } -/* Partial integer modes are specified by relation to a full integer mode. - For now, we do not attempt to narrow down their bit sizes. */ -#define PARTIAL_INT_MODE(M) \ - make_partial_integer_mode (#M, "P" #M, -1U, __FILE__, __LINE__) +/* Partial integer modes are specified by relation to a full integer + mode. */ +#define PARTIAL_INT_MODE(M,PREC,NAME) \ + make_partial_integer_mode (#M, #NAME, PREC, __FILE__, __LINE__) static void ATTRIBUTE_UNUSED make_partial_integer_mode (const char *base, const char *name, unsigned int precision, @@ -684,7 +684,7 @@ make_vector_mode (enum mode_class bclass, struct mode_data *v; enum mode_class vclass = vector_class (bclass); struct mode_data *component = find_mode (base); - char namebuf[8]; + char namebuf[16]; if (vclass == MODE_RANDOM) return; @@ -932,7 +932,7 @@ enum machine_mode\n{"); end will try to use it for bitfields in structures and the like, which we do not want. Only the target md file should generate BImode widgets. */ - if (first && first->precision == 1) + if (first && first->precision == 1 && c == MODE_INT) first = first->next; if (first && last) @@ -1202,7 +1202,7 @@ emit_class_narrowest_mode (void) /* Bleah, all this to get the comment right for MIN_MODE_INT. */ tagged_printf ("MIN_%s", mode_class_names[c], modes[c] - ? (modes[c]->precision != 1 + ? ((c != MODE_INT || modes[c]->precision != 1) ? modes[c]->name : (modes[c]->next ? modes[c]->next->name diff --git a/gcc/machmode.def b/gcc/machmode.def index 1062f18..8c4cd73 100644 --- a/gcc/machmode.def +++ b/gcc/machmode.def @@ -121,11 +121,11 @@ along with GCC; see the file COPYING3. If not see to FORMAT. Use in an ARCH-modes.def to reset the format of one of the float modes defined in this file. - PARTIAL_INT_MODE (MODE); + PARTIAL_INT_MODE (MODE, PRECISION, NAME); declares a mode of class PARTIAL_INT with the same size as - MODE (which must be an INT mode). The name of the new mode - is made by prefixing a P to the name MODE. This statement - may grow a PRECISION argument in the future. + MODE (which must be an INT mode) and precision PREC. + Optionally, NAME is the new name of the mode. NAME is the + name of the mode. VECTOR_MODE (CLASS, MODE, COUNT); Declare a vector mode whose component mode is MODE (of class |